1 #include "pseudo_irg.h"
11 #ifdef obstack_chunk_alloc
12 # undef obstack_chunk_alloc
13 # define obstack_chunk_alloc malloc
15 # define obstack_chunk_alloc malloc
16 # define obstack_chunk_free free
19 #include "../bearch.h" /* the general register allocator interface */
20 #include "bearch_ia32_t.h"
22 #include "ia32_new_nodes.h" /* ia32 nodes interface */
23 #include "gen_ia32_regalloc_if.h" /* the generated interface (register type and class defenitions) */
24 #include "ia32_gen_decls.h" /* interface declaration emitter */
25 #include "ia32_transform.h"
26 #include "ia32_emitter.h"
27 #include "ia32_map_regs.h"
29 #define DEBUG_MODULE "ir.be.isa.ia32"
32 static set *cur_reg_set = NULL;
36 /**************************************************
39 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
40 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
41 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
42 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
45 **************************************************/
47 static ir_node *my_skip_proj(const ir_node *n) {
54 * Return register requirements for an ia32 node.
55 * If the node returns a tuple (mode_T) then the proj's
56 * will be asked for this information.
58 static const arch_register_req_t *ia32_get_irn_reg_req(const arch_irn_ops_t *self, arch_register_req_t *req, const ir_node *irn, int pos) {
59 const ia32_register_req_t *irn_req;
60 long node_pos = pos == -1 ? 0 : pos;
61 ir_mode *mode = get_irn_mode(irn);
62 firm_dbg_module_t *mod = firm_dbg_register(DEBUG_MODULE);
64 if (mode == mode_T || mode == mode_M) {
65 DBG((mod, LEVEL_1, "ignoring mode_T, mode_M node %+F\n", irn));
69 DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn));
73 node_pos = translate_proj_pos(irn);
79 irn = my_skip_proj(irn);
81 DBG((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos));
84 if (is_ia32_irn(irn)) {
86 irn_req = get_ia32_in_req(irn, pos);
89 irn_req = get_ia32_out_req(irn, node_pos);
92 DBG((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos));
94 memcpy(req, &(irn_req->req), sizeof(*req));
96 if (arch_register_req_is(&(irn_req->req), should_be_same) ||
97 arch_register_req_is(&(irn_req->req), should_be_different)) {
98 assert(irn_req->pos >= 0 && "should be same/different constraint for in -> out NYI");
99 req->other = get_irn_n(irn, irn_req->pos);
105 /* treat Phi like Const with default requirements */
107 DBG((mod, LEVEL_1, "returning standard reqs for %+F\n", irn));
108 if (mode_is_float(mode))
109 memcpy(req, &(ia32_default_req_ia32_floating_point.req), sizeof(*req));
110 else if (mode_is_int(mode) || mode_is_reference(mode))
111 memcpy(req, &(ia32_default_req_ia32_general_purpose.req), sizeof(*req));
112 else if (mode == mode_T || mode == mode_M) {
113 DBG((mod, LEVEL_1, "ignoring Phi node %+F\n", irn));
117 assert(0 && "unsupported Phi-Mode");
119 else if (get_irn_op(irn) == op_Start) {
120 DBG((mod, LEVEL_1, "returning reqs none for ProjX -> Start (%+F )\n", irn));
122 case pn_Start_X_initial_exec:
123 case pn_Start_P_value_arg_base:
124 case pn_Start_P_globals:
125 memcpy(req, &(ia32_default_req_none.req), sizeof(*req));
127 case pn_Start_P_frame_base:
128 memcpy(req, &(ia32_default_req_none.req), sizeof(*req));
130 case pn_Start_T_args:
131 assert(0 && "ProjT(pn_Start_T_args) should not be asked");
134 else if (get_irn_op(irn) == op_Return && pos > 0) {
135 DBG((mod, LEVEL_1, "returning reqs EAX for %+F\n", irn));
136 memcpy(req, &(ia32_default_req_ia32_general_purpose_eax.req), sizeof(*req));
139 DBG((mod, LEVEL_1, "returning NULL for %+F (not ia32)\n", irn));
147 static void ia32_set_irn_reg(const arch_irn_ops_t *self, ir_node *irn, const arch_register_t *reg) {
151 pos = translate_proj_pos(irn);
152 irn = my_skip_proj(irn);
155 if (is_ia32_irn(irn)) {
156 const arch_register_t **slots;
158 slots = get_ia32_slots(irn);
162 ia32_set_firm_reg(self, irn, reg, cur_reg_set);
166 static const arch_register_t *ia32_get_irn_reg(const arch_irn_ops_t *self, const ir_node *irn) {
168 const arch_register_t *reg = NULL;
171 pos = translate_proj_pos(irn);
172 irn = my_skip_proj(irn);
175 if (is_ia32_irn(irn)) {
176 const arch_register_t **slots;
177 slots = get_ia32_slots(irn);
181 reg = ia32_get_firm_reg(self, irn, cur_reg_set);
187 static arch_irn_class_t ia32_classify(const arch_irn_ops_t *self, const ir_node *irn) {
188 irn = my_skip_proj(irn);
190 return arch_irn_class_branch;
191 else if (is_ia32_irn(irn))
192 return arch_irn_class_normal;
197 static arch_irn_flags_t ia32_get_flags(const arch_irn_ops_t *self, const ir_node *irn) {
198 irn = my_skip_proj(irn);
199 if (is_ia32_irn(irn))
200 return get_ia32_flags(irn);
202 ir_printf("don't know flags of %+F\n", irn);
207 /* fill register allocator interface */
209 static const arch_irn_ops_t ia32_irn_ops = {
210 ia32_get_irn_reg_req,
219 /**************************************************
222 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
223 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
224 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
225 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
228 **************************************************/
230 typedef struct _ia32_isa_t {
231 const arch_isa_if_t *impl;
236 * Transforms the standard firm graph into
239 static void ia32_prepare_graph(void *self) {
240 ia32_code_gen_t *cg = self;
242 if (! is_pseudo_ir_graph(cg->irg))
243 irg_walk_blkwise_graph(cg->irg, NULL, ia32_transform_node, cg);
249 * Dummy functions for hooks we don't need but which must be filled.
251 static void ia32_before_sched(void *self) {
254 static void ia32_before_ra(void *self) {
260 * Emits the code, closes the output file and frees
261 * the code generator interface.
263 static void ia32_codegen(void *self) {
264 ia32_code_gen_t *cg = self;
265 ir_graph *irg = cg->irg;
268 if (cg->emit_decls) {
269 ia32_gen_decls(cg->out);
273 // ia32_finish_irg(irg);
274 ia32_gen_routine(out, irg, cg->arch_env);
278 /* de-allocate code generator */
279 del_set(cg->reg_set);
283 static void *ia32_cg_init(FILE *F, ir_graph *irg, const arch_env_t *arch_env);
285 static const arch_code_generator_if_t ia32_code_gen_if = {
288 ia32_before_sched, /* before scheduling hook */
289 ia32_before_ra, /* before register allocation hook */
290 ia32_codegen /* emit && done */
294 * Initializes the code generator.
296 static void *ia32_cg_init(FILE *F, ir_graph *irg, const arch_env_t *arch_env) {
297 ia32_isa_t *isa = (ia32_isa_t *)arch_env->isa;
298 ia32_code_gen_t *cg = malloc(sizeof(*cg));
300 cg->impl = &ia32_code_gen_if;
302 cg->reg_set = new_set(cmp_irn_reg_assoc, 1024);
303 cg->mod = firm_dbg_register("be.transform.ia32");
305 cg->arch_env = arch_env;
309 if (isa->num_codegens > 1)
314 cur_reg_set = cg->reg_set;
316 return (arch_code_generator_t *)cg;
321 /*****************************************************************
322 * ____ _ _ _____ _____
323 * | _ \ | | | | |_ _|/ ____| /\
324 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
325 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
326 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
327 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
329 *****************************************************************/
332 * Initializes the backend ISA and opens the output file.
334 static void *ia32_init(void) {
335 static int inited = 0;
336 ia32_isa_t *isa = malloc(sizeof(*isa));
338 isa->impl = &ia32_isa_if;
345 isa->num_codegens = 0;
347 ia32_register_init();
348 ia32_create_opcodes();
356 * Closes the output file and frees the ISA structure.
358 static void ia32_done(void *self) {
364 static int ia32_get_n_reg_class(const void *self) {
368 static const arch_register_class_t *ia32_get_reg_class(const void *self, int i) {
369 assert(i >= 0 && i < N_CLASSES && "Invalid ia32 register class requested.");
370 return &ia32_reg_classes[i];
373 static const arch_irn_ops_t *ia32_get_irn_ops(const arch_irn_handler_t *self, const ir_node *irn) {
374 return &ia32_irn_ops;
377 const arch_irn_handler_t ia32_irn_handler = {
381 const arch_irn_handler_t *ia32_get_irn_handler(const void *self) {
382 return &ia32_irn_handler;
388 * Initializes the code generator interface.
390 static const arch_code_generator_if_t *ia32_get_code_generator_if(void *self) {
391 return &ia32_code_gen_if;
395 * Returns the default scheduler
397 static const list_sched_selector_t *ia32_get_list_sched_selector(const void *self) {
398 return reg_pressure_selector;
402 static void ia32_register_options(lc_opt_entry_t *ent)
405 #endif /* WITH_LIBCORE */
407 const arch_isa_if_t ia32_isa_if = {
409 ia32_register_options,
413 ia32_get_n_reg_class,
415 ia32_get_irn_handler,
416 ia32_get_code_generator_if,
417 ia32_get_list_sched_selector