2 * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Preference Guided Register Assignment
23 * @author Matthias Braun
26 * The idea is to allocate registers in 2 passes:
27 * 1. A first pass to determine "preferred" registers for live-ranges. This
28 * calculates for each register and each live-range a value indicating
29 * the usefulness. (You can roughly think of the value as the negative
30 * costs needed for copies when the value is in the specific registers...)
32 * 2. Walk blocks and assigns registers in a greedy fashion. Preferring
33 * registers with high preferences. When register constraints are not met,
34 * add copies and split live-ranges.
37 * - make use of free registers in the permute_values code
50 #include "iredges_t.h"
51 #include "irgraph_t.h"
59 #include "raw_bitset.h"
60 #include "unionfind.h"
62 #include "hungarian.h"
65 #include "bechordal_t.h"
74 #include "bespillutil.h"
79 #define USE_FACTOR 1.0f
80 #define DEF_FACTOR 1.0f
81 #define NEIGHBOR_FACTOR 0.2f
82 #define AFF_SHOULD_BE_SAME 0.5f
84 #define SPLIT_DELTA 1.0f
85 #define MAX_OPTIMISTIC_SPLIT_RECURSION 0
87 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
89 static struct obstack obst;
91 static const arch_register_class_t *cls;
93 static unsigned n_regs;
94 static unsigned *normal_regs;
95 static int *congruence_classes;
96 static ir_node **block_order;
97 static size_t n_block_order;
98 static int create_preferences = true;
99 static int create_congruence_classes = true;
100 static int propagate_phi_registers = true;
102 static const lc_opt_table_entry_t options[] = {
103 LC_OPT_ENT_BOOL("prefs", "use preference based coloring", &create_preferences),
104 LC_OPT_ENT_BOOL("congruences", "create congruence classes", &create_congruence_classes),
105 LC_OPT_ENT_BOOL("prop_phi", "propagate phi registers", &propagate_phi_registers),
109 /** currently active assignments (while processing a basic block)
110 * maps registers to values(their current copies) */
111 static ir_node **assignments;
114 * allocation information: last_uses, register preferences
115 * the information is per firm-node.
117 struct allocation_info_t {
118 unsigned last_uses[2]; /**< bitset indicating last uses (input pos) */
119 ir_node *current_value; /**< copy of the value that should be used */
120 ir_node *original_value; /**< for copies point to original value */
121 float prefs[]; /**< register preferences */
123 typedef struct allocation_info_t allocation_info_t;
125 /** helper datastructure used when sorting register preferences */
130 typedef struct reg_pref_t reg_pref_t;
132 /** per basic-block information */
133 struct block_info_t {
134 bool processed; /**< indicate whether block is processed */
135 ir_node *assignments[]; /**< register assignments at end of block */
137 typedef struct block_info_t block_info_t;
140 * Get the allocation info for a node.
141 * The info is allocated on the first visit of a node.
143 static allocation_info_t *get_allocation_info(ir_node *node)
145 allocation_info_t *info = (allocation_info_t*)get_irn_link(node);
147 info = OALLOCFZ(&obst, allocation_info_t, prefs, n_regs);
148 info->current_value = node;
149 info->original_value = node;
150 set_irn_link(node, info);
156 static allocation_info_t *try_get_allocation_info(const ir_node *node)
158 return (allocation_info_t*) get_irn_link(node);
162 * Get allocation information for a basic block
164 static block_info_t *get_block_info(ir_node *block)
166 block_info_t *info = (block_info_t*)get_irn_link(block);
168 assert(is_Block(block));
170 info = OALLOCFZ(&obst, block_info_t, assignments, n_regs);
171 set_irn_link(block, info);
178 * Link the allocation info of a node to a copy.
179 * Afterwards, both nodes uses the same allocation info.
180 * Copy must not have an allocation info assigned yet.
182 * @param copy the node that gets the allocation info assigned
183 * @param value the original node
185 static void mark_as_copy_of(ir_node *copy, ir_node *value)
187 allocation_info_t *info = get_allocation_info(value);
188 allocation_info_t *copy_info = get_allocation_info(copy);
190 /* find original value */
191 ir_node *original = info->original_value;
192 if (original != value) {
193 info = get_allocation_info(original);
196 assert(info->original_value == original);
197 info->current_value = copy;
199 /* the copy should not be linked to something else yet */
200 assert(copy_info->original_value == copy);
201 copy_info->original_value = original;
203 /* copy over allocation preferences */
204 memcpy(copy_info->prefs, info->prefs, n_regs * sizeof(copy_info->prefs[0]));
208 * Calculate the penalties for every register on a node and its live neighbors.
210 * @param live_nodes the set of live nodes at the current position, may be NULL
211 * @param penalty the penalty to subtract from
212 * @param limited a raw bitset containing the limited set for the node
213 * @param node the node
215 static void give_penalties_for_limits(const ir_nodeset_t *live_nodes,
216 float penalty, const unsigned* limited,
219 allocation_info_t *info = get_allocation_info(node);
221 /* give penalty for all forbidden regs */
222 for (unsigned r = 0; r < n_regs; ++r) {
223 if (rbitset_is_set(limited, r))
226 info->prefs[r] -= penalty;
229 /* all other live values should get a penalty for allowed regs */
230 if (live_nodes == NULL)
233 penalty *= NEIGHBOR_FACTOR;
234 size_t n_allowed = rbitset_popcount(limited, n_regs);
236 /* only create a very weak penalty if multiple regs are allowed */
237 penalty = (penalty * 0.8f) / n_allowed;
239 foreach_ir_nodeset(live_nodes, neighbor, iter) {
240 allocation_info_t *neighbor_info;
242 /* TODO: if op is used on multiple inputs we might not do a
244 if (neighbor == node)
247 neighbor_info = get_allocation_info(neighbor);
248 for (unsigned r = 0; r < n_regs; ++r) {
249 if (!rbitset_is_set(limited, r))
252 neighbor_info->prefs[r] -= penalty;
258 * Calculate the preferences of a definition for the current register class.
259 * If the definition uses a limited set of registers, reduce the preferences
260 * for the limited register on the node and its neighbors.
262 * @param live_nodes the set of live nodes at the current node
263 * @param weight the weight
264 * @param node the current node
266 static void check_defs(const ir_nodeset_t *live_nodes, float weight,
269 const arch_register_req_t *req = arch_get_irn_register_req(node);
270 if (req->type & arch_register_req_type_limited) {
271 const unsigned *limited = req->limited;
272 float penalty = weight * DEF_FACTOR;
273 give_penalties_for_limits(live_nodes, penalty, limited, node);
276 if (req->type & arch_register_req_type_should_be_same) {
277 ir_node *insn = skip_Proj(node);
278 allocation_info_t *info = get_allocation_info(node);
279 int arity = get_irn_arity(insn);
281 float factor = 1.0f / rbitset_popcount(&req->other_same, arity);
282 for (int i = 0; i < arity; ++i) {
283 if (!rbitset_is_set(&req->other_same, i))
286 ir_node *op = get_irn_n(insn, i);
288 /* if we the value at the should_be_same input doesn't die at the
289 * node, then it is no use to propagate the constraints (since a
290 * copy will emerge anyway) */
291 if (ir_nodeset_contains(live_nodes, op))
294 allocation_info_t *op_info = get_allocation_info(op);
295 for (unsigned r = 0; r < n_regs; ++r) {
296 op_info->prefs[r] += info->prefs[r] * factor;
303 * Walker: Runs an a block calculates the preferences for any
304 * node and every register from the considered register class.
306 static void analyze_block(ir_node *block, void *data)
308 float weight = (float)get_block_execfreq(block);
309 ir_nodeset_t live_nodes;
312 ir_nodeset_init(&live_nodes);
313 be_liveness_end_of_block(lv, cls, block, &live_nodes);
315 sched_foreach_reverse(block, node) {
319 if (create_preferences) {
321 be_foreach_definition(node, cls, value,
322 check_defs(&live_nodes, weight, value);
327 int arity = get_irn_arity(node);
329 /* the allocation info node currently only uses 1 unsigned value
330 to mark last used inputs. So we will fail for a node with more than
332 allocation_info_t *info = get_allocation_info(node);
333 if (arity >= (int) sizeof(info->last_uses) * 8) {
334 panic("Node with more than %d inputs not supported yet",
335 (int) sizeof(info->last_uses) * 8);
338 for (int i = 0; i < arity; ++i) {
339 ir_node *op = get_irn_n(node, i);
340 const arch_register_req_t *req = arch_get_irn_register_req(op);
344 /* last usage of a value? */
345 if (!ir_nodeset_contains(&live_nodes, op)) {
346 rbitset_set(info->last_uses, i);
350 be_liveness_transfer(cls, node, &live_nodes);
352 if (create_preferences) {
353 /* update weights based on usage constraints */
354 for (int i = 0; i < arity; ++i) {
355 ir_node *op = get_irn_n(node, i);
356 if (!arch_irn_consider_in_reg_alloc(cls, op))
359 const arch_register_req_t *req
360 = arch_get_irn_register_req_in(node, i);
361 if (!(req->type & arch_register_req_type_limited))
364 const unsigned *limited = req->limited;
365 give_penalties_for_limits(&live_nodes, weight * USE_FACTOR,
371 ir_nodeset_destroy(&live_nodes);
374 static void congruence_def(ir_nodeset_t *live_nodes, const ir_node *node)
376 const arch_register_req_t *req = arch_get_irn_register_req(node);
378 /* should be same constraint? */
379 if (req->type & arch_register_req_type_should_be_same) {
380 const ir_node *insn = skip_Proj_const(node);
381 int arity = get_irn_arity(insn);
382 unsigned node_idx = get_irn_idx(node);
383 node_idx = uf_find(congruence_classes, node_idx);
385 for (int i = 0; i < arity; ++i) {
386 if (!rbitset_is_set(&req->other_same, i))
389 ir_node *op = get_irn_n(insn, i);
390 int op_idx = get_irn_idx(op);
391 op_idx = uf_find(congruence_classes, op_idx);
393 /* do we interfere with the value */
394 bool interferes = false;
395 foreach_ir_nodeset(live_nodes, live, iter) {
396 int lv_idx = get_irn_idx(live);
397 lv_idx = uf_find(congruence_classes, lv_idx);
398 if (lv_idx == op_idx) {
403 /* don't put in same affinity class if we interfere */
407 uf_union(congruence_classes, node_idx, op_idx);
408 DB((dbg, LEVEL_3, "Merge %+F and %+F congruence classes\n",
410 /* one should_be_same is enough... */
416 static void create_congruence_class(ir_node *block, void *data)
418 ir_nodeset_t live_nodes;
421 ir_nodeset_init(&live_nodes);
422 be_liveness_end_of_block(lv, cls, block, &live_nodes);
424 /* check should be same constraints */
425 ir_node *last_phi = NULL;
426 sched_foreach_reverse(block, node) {
433 be_foreach_definition(node, cls, value,
434 congruence_def(&live_nodes, value);
436 be_liveness_transfer(cls, node, &live_nodes);
439 ir_nodeset_destroy(&live_nodes);
443 /* check phi congruence classes */
444 sched_foreach_reverse_from(last_phi, phi) {
447 if (!arch_irn_consider_in_reg_alloc(cls, phi))
450 int node_idx = get_irn_idx(phi);
451 node_idx = uf_find(congruence_classes, node_idx);
453 int arity = get_irn_arity(phi);
454 for (int i = 0; i < arity; ++i) {
455 ir_node *op = get_Phi_pred(phi, i);
456 int op_idx = get_irn_idx(op);
457 op_idx = uf_find(congruence_classes, op_idx);
459 /* do we interfere with the value */
460 bool interferes = false;
461 foreach_ir_nodeset(&live_nodes, live, iter) {
462 int lv_idx = get_irn_idx(live);
463 lv_idx = uf_find(congruence_classes, lv_idx);
464 if (lv_idx == op_idx) {
469 /* don't put in same affinity class if we interfere */
472 /* any other phi has the same input? */
473 sched_foreach(block, phi) {
478 if (!arch_irn_consider_in_reg_alloc(cls, phi))
480 oop = get_Phi_pred(phi, i);
483 oop_idx = get_irn_idx(oop);
484 oop_idx = uf_find(congruence_classes, oop_idx);
485 if (oop_idx == op_idx) {
493 /* merge the 2 congruence classes and sum up their preferences */
494 int old_node_idx = node_idx;
495 node_idx = uf_union(congruence_classes, node_idx, op_idx);
496 DB((dbg, LEVEL_3, "Merge %+F and %+F congruence classes\n",
499 old_node_idx = node_idx == old_node_idx ? op_idx : old_node_idx;
500 allocation_info_t *head_info
501 = get_allocation_info(get_idx_irn(irg, node_idx));
502 allocation_info_t *other_info
503 = get_allocation_info(get_idx_irn(irg, old_node_idx));
504 for (unsigned r = 0; r < n_regs; ++r) {
505 head_info->prefs[r] += other_info->prefs[r];
509 ir_nodeset_destroy(&live_nodes);
512 static void set_congruence_prefs(ir_node *node, void *data)
515 unsigned node_idx = get_irn_idx(node);
516 unsigned node_set = uf_find(congruence_classes, node_idx);
518 /* head of congruence class or not in any class */
519 if (node_set == node_idx)
522 if (!arch_irn_consider_in_reg_alloc(cls, node))
525 ir_node *head = get_idx_irn(irg, node_set);
526 allocation_info_t *head_info = get_allocation_info(head);
527 allocation_info_t *info = get_allocation_info(node);
529 memcpy(info->prefs, head_info->prefs, n_regs * sizeof(info->prefs[0]));
532 static void combine_congruence_classes(void)
534 size_t n = get_irg_last_idx(irg);
535 congruence_classes = XMALLOCN(int, n);
536 uf_init(congruence_classes, n);
538 /* create congruence classes */
539 irg_block_walk_graph(irg, create_congruence_class, NULL, NULL);
540 /* merge preferences */
541 irg_walk_graph(irg, set_congruence_prefs, NULL, NULL);
542 free(congruence_classes);
548 * Assign register reg to the given node.
550 * @param node the node
551 * @param reg the register
553 static void use_reg(ir_node *node, const arch_register_t *reg, unsigned width)
555 unsigned r = arch_register_get_index(reg);
556 for (unsigned r0 = r; r0 < r + width; ++r0)
557 assignments[r0] = node;
558 arch_set_irn_register(node, reg);
561 static void free_reg_of_value(ir_node *node)
563 if (!arch_irn_consider_in_reg_alloc(cls, node))
566 const arch_register_t *reg = arch_get_irn_register(node);
567 const arch_register_req_t *req = arch_get_irn_register_req(node);
568 unsigned r = arch_register_get_index(reg);
569 /* assignment->value may be NULL if a value is used at 2 inputs
570 * so it gets freed twice. */
571 for (unsigned r0 = r; r0 < r + req->width; ++r0) {
572 assert(assignments[r0] == node || assignments[r0] == NULL);
573 assignments[r0] = NULL;
578 * Compare two register preferences in decreasing order.
580 static int compare_reg_pref(const void *e1, const void *e2)
582 const reg_pref_t *rp1 = (const reg_pref_t*) e1;
583 const reg_pref_t *rp2 = (const reg_pref_t*) e2;
584 if (rp1->pref < rp2->pref)
586 if (rp1->pref > rp2->pref)
591 static void fill_sort_candidates(reg_pref_t *regprefs,
592 const allocation_info_t *info)
594 for (unsigned r = 0; r < n_regs; ++r) {
595 float pref = info->prefs[r];
597 regprefs[r].pref = pref;
599 /* TODO: use a stable sort here to avoid unnecessary register jumping */
600 qsort(regprefs, n_regs, sizeof(regprefs[0]), compare_reg_pref);
603 static bool try_optimistic_split(ir_node *to_split, ir_node *before,
604 float pref, float pref_delta,
605 unsigned *forbidden_regs, int recursion)
609 allocation_info_t *info = get_allocation_info(to_split);
612 /* stupid hack: don't optimisticallt split don't spill nodes...
613 * (so we don't split away the values produced because of
614 * must_be_different constraints) */
615 ir_node *original_insn = skip_Proj(info->original_value);
616 if (arch_get_irn_flags(original_insn) & arch_irn_flags_dont_spill)
619 const arch_register_t *from_reg = arch_get_irn_register(to_split);
620 unsigned from_r = arch_register_get_index(from_reg);
621 ir_node *block = get_nodes_block(before);
622 float split_threshold = (float)get_block_execfreq(block) * SPLIT_DELTA;
624 if (pref_delta < split_threshold*0.5)
627 /* find the best free position where we could move to */
628 reg_pref_t *prefs = ALLOCAN(reg_pref_t, n_regs);
629 fill_sort_candidates(prefs, info);
631 for (i = 0; i < n_regs; ++i) {
632 /* we need a normal register which is not an output register
633 an different from the current register of to_split */
635 if (!rbitset_is_set(normal_regs, r))
637 if (rbitset_is_set(forbidden_regs, r))
642 /* is the split worth it? */
643 delta = pref_delta + prefs[i].pref;
644 if (delta < split_threshold) {
645 DB((dbg, LEVEL_3, "Not doing optimistical split of %+F (depth %d), win %f too low\n",
646 to_split, recursion, delta));
650 /* if the register is free then we can do the split */
651 if (assignments[r] == NULL)
654 /* otherwise we might try recursively calling optimistic_split */
655 if (recursion+1 > MAX_OPTIMISTIC_SPLIT_RECURSION)
658 float apref = prefs[i].pref;
659 float apref_delta = i+1 < n_regs ? apref - prefs[i+1].pref : 0;
660 apref_delta += pref_delta - split_threshold;
662 /* our source register isn't a useful destination for recursive
664 bool old_source_state = rbitset_is_set(forbidden_regs, from_r);
665 rbitset_set(forbidden_regs, from_r);
666 /* try recursive split */
667 bool res = try_optimistic_split(assignments[r], before, apref,
668 apref_delta, forbidden_regs, recursion+1);
669 /* restore our destination */
670 if (old_source_state) {
671 rbitset_set(forbidden_regs, from_r);
673 rbitset_clear(forbidden_regs, from_r);
682 const arch_register_t *reg = arch_register_for_index(cls, r);
683 ir_node *copy = be_new_Copy(block, to_split);
685 mark_as_copy_of(copy, to_split);
686 /* hacky, but correct here */
687 if (assignments[arch_register_get_index(from_reg)] == to_split)
688 free_reg_of_value(to_split);
689 use_reg(copy, reg, width);
690 sched_add_before(before, copy);
693 "Optimistic live-range split %+F move %+F(%s) -> %s before %+F (win %f, depth %d)\n",
694 copy, to_split, from_reg->name, reg->name, before, delta, recursion));
699 * Determine and assign a register for node @p node
701 static void assign_reg(const ir_node *block, ir_node *node,
702 unsigned *forbidden_regs)
704 assert(!is_Phi(node));
705 /* preassigned register? */
706 const arch_register_t *final_reg = arch_get_irn_register(node);
707 const arch_register_req_t *req = arch_get_irn_register_req(node);
708 unsigned width = req->width;
709 if (final_reg != NULL) {
710 DB((dbg, LEVEL_2, "Preassignment %+F -> %s\n", node, final_reg->name));
711 use_reg(node, final_reg, width);
715 /* ignore reqs must be preassigned */
716 assert (! (req->type & arch_register_req_type_ignore));
718 /* give should_be_same boni */
719 allocation_info_t *info = get_allocation_info(node);
720 ir_node *in_node = skip_Proj(node);
721 if (req->type & arch_register_req_type_should_be_same) {
722 float weight = (float)get_block_execfreq(block);
723 int arity = get_irn_arity(in_node);
725 assert(arity <= (int) sizeof(req->other_same) * 8);
726 for (int i = 0; i < arity; ++i) {
727 if (!rbitset_is_set(&req->other_same, i))
730 ir_node *in = get_irn_n(in_node, i);
731 const arch_register_t *reg = arch_get_irn_register(in);
732 unsigned reg_index = arch_register_get_index(reg);
734 /* if the value didn't die here then we should not propagate the
735 * should_be_same info */
736 if (assignments[reg_index] == in)
739 info->prefs[reg_index] += weight * AFF_SHOULD_BE_SAME;
743 /* create list of register candidates and sort by their preference */
744 DB((dbg, LEVEL_2, "Candidates for %+F:", node));
745 reg_pref_t *reg_prefs = ALLOCAN(reg_pref_t, n_regs);
746 fill_sort_candidates(reg_prefs, info);
747 for (unsigned r = 0; r < n_regs; ++r) {
748 unsigned num = reg_prefs[r].num;
749 if (!rbitset_is_set(normal_regs, num))
751 const arch_register_t *reg = arch_register_for_index(cls, num);
752 DB((dbg, LEVEL_2, " %s(%f)", reg->name, reg_prefs[r].pref));
754 DB((dbg, LEVEL_2, "\n"));
756 const unsigned *allowed_regs = normal_regs;
757 if (req->type & arch_register_req_type_limited) {
758 allowed_regs = req->limited;
761 unsigned final_reg_index = 0;
763 for (r = 0; r < n_regs; ++r) {
764 final_reg_index = reg_prefs[r].num;
765 if (!rbitset_is_set(allowed_regs, final_reg_index))
767 /* alignment constraint? */
769 if ((req->type & arch_register_req_type_aligned)
770 && (final_reg_index % width) != 0)
773 for (unsigned r0 = r+1; r0 < r+width; ++r0) {
774 if (assignments[r0] != NULL)
777 /* TODO: attempt optimistic split here */
782 if (assignments[final_reg_index] == NULL)
784 float pref = reg_prefs[r].pref;
785 float delta = r+1 < n_regs ? pref - reg_prefs[r+1].pref : 0;
786 ir_node *before = skip_Proj(node);
788 = try_optimistic_split(assignments[final_reg_index], before, pref,
789 delta, forbidden_regs, 0);
794 /* the common reason to hit this panic is when 1 of your nodes is not
795 * register pressure faithful */
796 panic("No register left for %+F\n", node);
799 final_reg = arch_register_for_index(cls, final_reg_index);
800 DB((dbg, LEVEL_2, "Assign %+F -> %s\n", node, final_reg->name));
801 use_reg(node, final_reg, width);
805 * Add an permutation in front of a node and change the assignments
806 * due to this permutation.
808 * To understand this imagine a permutation like this:
818 * First we count how many destinations a single value has. At the same time
819 * we can be sure that each destination register has at most 1 source register
820 * (it can have 0 which means we don't care what value is in it).
821 * We ignore all fulfilled permuations (like 7->7)
822 * In a first pass we create as much copy instructions as possible as they
823 * are generally cheaper than exchanges. We do this by counting into how many
824 * destinations a register has to be copied (in the example it's 2 for register
825 * 3, or 1 for the registers 1,2,4 and 7).
826 * We can then create a copy into every destination register when the usecount
827 * of that register is 0 (= noone else needs the value in the register).
829 * After this step we should only have cycles left. We implement a cyclic
830 * permutation of n registers with n-1 transpositions.
832 * @param live_nodes the set of live nodes, updated due to live range split
833 * @param before the node before we add the permutation
834 * @param permutation the permutation array indices are the destination
835 * registers, the values in the array are the source
838 static void permute_values(ir_nodeset_t *live_nodes, ir_node *before,
839 unsigned *permutation)
841 unsigned *n_used = ALLOCANZ(unsigned, n_regs);
843 /* determine how often each source register needs to be read */
844 for (unsigned r = 0; r < n_regs; ++r) {
845 unsigned old_reg = permutation[r];
848 value = assignments[old_reg];
850 /* nothing to do here, reg is not live. Mark it as fixpoint
851 * so we ignore it in the next steps */
859 ir_node *block = get_nodes_block(before);
861 /* step1: create copies where immediately possible */
862 for (unsigned r = 0; r < n_regs; /* empty */) {
863 unsigned old_r = permutation[r];
865 /* - no need to do anything for fixed points.
866 - we can't copy if the value in the dest reg is still needed */
867 if (old_r == r || n_used[r] > 0) {
873 ir_node *src = assignments[old_r];
874 ir_node *copy = be_new_Copy(block, src);
875 sched_add_before(before, copy);
876 const arch_register_t *reg = arch_register_for_index(cls, r);
877 DB((dbg, LEVEL_2, "Copy %+F (from %+F, before %+F) -> %s\n",
878 copy, src, before, reg->name));
879 mark_as_copy_of(copy, src);
880 unsigned width = 1; /* TODO */
881 use_reg(copy, reg, width);
883 if (live_nodes != NULL) {
884 ir_nodeset_insert(live_nodes, copy);
887 /* old register has 1 user less, permutation is resolved */
888 assert(arch_register_get_index(arch_get_irn_register(src)) == old_r);
891 assert(n_used[old_r] > 0);
893 if (n_used[old_r] == 0) {
894 if (live_nodes != NULL) {
895 ir_nodeset_remove(live_nodes, src);
897 free_reg_of_value(src);
900 /* advance or jump back (if this copy enabled another copy) */
901 if (old_r < r && n_used[old_r] == 0) {
908 /* at this point we only have "cycles" left which we have to resolve with
910 * TODO: if we have free registers left, then we should really use copy
911 * instructions for any cycle longer than 2 registers...
912 * (this is probably architecture dependent, there might be archs where
913 * copies are preferable even for 2-cycles) */
915 /* create perms with the rest */
916 for (unsigned r = 0; r < n_regs; /* empty */) {
917 unsigned old_r = permutation[r];
924 /* we shouldn't have copies from 1 value to multiple destinations left*/
925 assert(n_used[old_r] == 1);
927 /* exchange old_r and r2; after that old_r is a fixed point */
928 unsigned r2 = permutation[old_r];
930 ir_node *in[2] = { assignments[r2], assignments[old_r] };
931 ir_node *perm = be_new_Perm(cls, block, 2, in);
932 sched_add_before(before, perm);
933 DB((dbg, LEVEL_2, "Perm %+F (perm %+F,%+F, before %+F)\n",
934 perm, in[0], in[1], before));
936 unsigned width = 1; /* TODO */
938 ir_node *proj0 = new_r_Proj(perm, get_irn_mode(in[0]), 0);
939 mark_as_copy_of(proj0, in[0]);
940 const arch_register_t *reg0 = arch_register_for_index(cls, old_r);
941 use_reg(proj0, reg0, width);
943 ir_node *proj1 = new_r_Proj(perm, get_irn_mode(in[1]), 1);
944 mark_as_copy_of(proj1, in[1]);
945 const arch_register_t *reg1 = arch_register_for_index(cls, r2);
946 use_reg(proj1, reg1, width);
948 /* 1 value is now in the correct register */
949 permutation[old_r] = old_r;
950 /* the source of r changed to r2 */
953 /* if we have reached a fixpoint update data structures */
954 if (live_nodes != NULL) {
955 ir_nodeset_remove(live_nodes, in[0]);
956 ir_nodeset_remove(live_nodes, in[1]);
957 ir_nodeset_remove(live_nodes, proj0);
958 ir_nodeset_insert(live_nodes, proj1);
963 /* now we should only have fixpoints left */
964 for (unsigned r = 0; r < n_regs; ++r) {
965 assert(permutation[r] == r);
971 * Free regs for values last used.
973 * @param live_nodes set of live nodes, will be updated
974 * @param node the node to consider
976 static void free_last_uses(ir_nodeset_t *live_nodes, ir_node *node)
978 allocation_info_t *info = get_allocation_info(node);
979 const unsigned *last_uses = info->last_uses;
980 int arity = get_irn_arity(node);
982 for (int i = 0; i < arity; ++i) {
983 /* check if one operand is the last use */
984 if (!rbitset_is_set(last_uses, i))
987 ir_node *op = get_irn_n(node, i);
988 free_reg_of_value(op);
989 ir_nodeset_remove(live_nodes, op);
994 * change inputs of a node to the current value (copies/perms)
996 static void rewire_inputs(ir_node *node)
998 int arity = get_irn_arity(node);
999 for (int i = 0; i < arity; ++i) {
1000 ir_node *op = get_irn_n(node, i);
1001 allocation_info_t *info = try_get_allocation_info(op);
1006 info = get_allocation_info(info->original_value);
1007 if (info->current_value != op) {
1008 set_irn_n(node, i, info->current_value);
1014 * Create a bitset of registers occupied with value living through an
1017 static void determine_live_through_regs(unsigned *bitset, ir_node *node)
1019 const allocation_info_t *info = get_allocation_info(node);
1021 /* mark all used registers as potentially live-through */
1022 for (unsigned r = 0; r < n_regs; ++r) {
1023 if (assignments[r] == NULL)
1025 if (!rbitset_is_set(normal_regs, r))
1028 rbitset_set(bitset, r);
1031 /* remove registers of value dying at the instruction */
1032 int arity = get_irn_arity(node);
1033 for (int i = 0; i < arity; ++i) {
1034 if (!rbitset_is_set(info->last_uses, i))
1037 ir_node *op = get_irn_n(node, i);
1038 const arch_register_t *reg = arch_get_irn_register(op);
1039 rbitset_clear(bitset, arch_register_get_index(reg));
1043 static void solve_lpp(ir_nodeset_t *live_nodes, ir_node *node,
1044 unsigned *forbidden_regs, unsigned *live_through_regs)
1046 unsigned *forbidden_edges = rbitset_malloc(n_regs * n_regs);
1047 int *lpp_vars = XMALLOCNZ(int, n_regs*n_regs);
1049 lpp_t *lpp = lpp_new("prefalloc", lpp_minimize);
1050 //lpp_set_time_limit(lpp, 20);
1051 lpp_set_log(lpp, stdout);
1053 /** mark some edges as forbidden */
1054 int arity = get_irn_arity(node);
1055 for (int i = 0; i < arity; ++i) {
1056 ir_node *op = get_irn_n(node, i);
1057 if (!arch_irn_consider_in_reg_alloc(cls, op))
1060 const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
1061 if (!(req->type & arch_register_req_type_limited))
1064 const unsigned *limited = req->limited;
1065 const arch_register_t *reg = arch_get_irn_register(op);
1066 unsigned current_reg = arch_register_get_index(reg);
1067 for (unsigned r = 0; r < n_regs; ++r) {
1068 if (rbitset_is_set(limited, r))
1071 rbitset_set(forbidden_edges, current_reg*n_regs + r);
1075 /* add all combinations, except for not allowed ones */
1076 for (unsigned l = 0; l < n_regs; ++l) {
1077 if (!rbitset_is_set(normal_regs, l)) {
1079 snprintf(name, sizeof(name), "%u_to_%u", l, l);
1080 lpp_vars[l*n_regs+l] = lpp_add_var(lpp, name, lpp_binary, 1);
1084 for (unsigned r = 0; r < n_regs; ++r) {
1085 if (!rbitset_is_set(normal_regs, r))
1087 if (rbitset_is_set(forbidden_edges, l*n_regs + r))
1089 /* livethrough values may not use constrained output registers */
1090 if (rbitset_is_set(live_through_regs, l)
1091 && rbitset_is_set(forbidden_regs, r))
1095 snprintf(name, sizeof(name), "%u_to_%u", l, r);
1097 double costs = l==r ? 9 : 8;
1098 lpp_vars[l*n_regs+r]
1099 = lpp_add_var(lpp, name, lpp_binary, costs);
1100 assert(lpp_vars[l*n_regs+r] > 0);
1103 /* add constraints */
1104 for (unsigned l = 0; l < n_regs; ++l) {
1105 /* only 1 destination per register */
1106 int constraint = -1;
1107 for (unsigned r = 0; r < n_regs; ++r) {
1108 int var = lpp_vars[l*n_regs+r];
1111 if (constraint < 0) {
1113 snprintf(name, sizeof(name), "%u_to_dest", l);
1114 constraint = lpp_add_cst(lpp, name, lpp_equal, 1);
1116 lpp_set_factor_fast(lpp, constraint, var, 1);
1118 /* each destination used by at most 1 value */
1120 for (unsigned r = 0; r < n_regs; ++r) {
1121 int var = lpp_vars[r*n_regs+l];
1124 if (constraint < 0) {
1126 snprintf(name, sizeof(name), "one_to_%u", l);
1127 constraint = lpp_add_cst(lpp, name, lpp_less_equal, 1);
1129 lpp_set_factor_fast(lpp, constraint, var, 1);
1133 lpp_dump_plain(lpp, fopen("lppdump.txt", "w"));
1136 lpp_solve(lpp, be_options.ilp_server, be_options.ilp_solver);
1137 if (!lpp_is_sol_valid(lpp))
1138 panic("ilp solution not valid!");
1140 unsigned *assignment = ALLOCAN(unsigned, n_regs);
1141 for (unsigned l = 0; l < n_regs; ++l) {
1142 unsigned dest_reg = (unsigned)-1;
1143 for (unsigned r = 0; r < n_regs; ++r) {
1144 int var = lpp_vars[l*n_regs+r];
1147 double val = lpp_get_var_sol(lpp, var);
1149 assert(dest_reg == (unsigned)-1);
1153 assert(dest_reg != (unsigned)-1);
1154 assignment[dest_reg] = l;
1157 fprintf(stderr, "Assignment: ");
1158 for (unsigned l = 0; l < n_regs; ++l) {
1159 fprintf(stderr, "%u ", assignment[l]);
1161 fprintf(stderr, "\n");
1163 permute_values(live_nodes, node, assignment);
1167 static bool is_aligned(unsigned num, unsigned alignment)
1169 unsigned mask = alignment-1;
1170 assert(is_po2(alignment));
1171 return (num&mask) == 0;
1175 * Enforce constraints at a node by live range splits.
1177 * @param live_nodes the set of live nodes, might be changed
1178 * @param node the current node
1180 static void enforce_constraints(ir_nodeset_t *live_nodes, ir_node *node,
1181 unsigned *forbidden_regs)
1183 /* see if any use constraints are not met and whether double-width
1184 * values are involved */
1185 bool double_width = false;
1187 int arity = get_irn_arity(node);
1188 for (int i = 0; i < arity; ++i) {
1189 ir_node *op = get_irn_n(node, i);
1190 if (!arch_irn_consider_in_reg_alloc(cls, op))
1193 /* are there any limitations for the i'th operand? */
1194 const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
1196 double_width = true;
1197 const arch_register_t *reg = arch_get_irn_register(op);
1198 unsigned reg_index = arch_register_get_index(reg);
1199 if (req->type & arch_register_req_type_aligned) {
1200 if (!is_aligned(reg_index, req->width)) {
1205 if (!(req->type & arch_register_req_type_limited))
1208 const unsigned *limited = req->limited;
1209 if (!rbitset_is_set(limited, reg_index)) {
1210 /* found an assignment outside the limited set */
1216 /* is any of the live-throughs using a constrained output register? */
1218 unsigned *live_through_regs = NULL;
1219 be_foreach_definition(node, cls, value,
1220 if (req_->width > 1)
1221 double_width = true;
1222 if (! (req_->type & arch_register_req_type_limited))
1224 if (live_through_regs == NULL) {
1225 rbitset_alloca(live_through_regs, n_regs);
1226 determine_live_through_regs(live_through_regs, node);
1228 rbitset_or(forbidden_regs, req_->limited, n_regs);
1229 if (rbitsets_have_common(req_->limited, live_through_regs, n_regs))
1236 /* create these arrays if we haven't yet */
1237 if (live_through_regs == NULL) {
1238 rbitset_alloca(live_through_regs, n_regs);
1242 /* only the ILP variant can solve this yet */
1243 solve_lpp(live_nodes, node, forbidden_regs, live_through_regs);
1247 /* at this point we have to construct a bipartite matching problem to see
1248 * which values should go to which registers
1249 * Note: We're building the matrix in "reverse" - source registers are
1250 * right, destinations left because this will produce the solution
1251 * in the format required for permute_values.
1253 hungarian_problem_t *bp
1254 = hungarian_new(n_regs, n_regs, HUNGARIAN_MATCH_PERFECT);
1256 /* add all combinations, then remove not allowed ones */
1257 for (unsigned l = 0; l < n_regs; ++l) {
1258 if (!rbitset_is_set(normal_regs, l)) {
1259 hungarian_add(bp, l, l, 1);
1263 for (unsigned r = 0; r < n_regs; ++r) {
1264 if (!rbitset_is_set(normal_regs, r))
1266 /* livethrough values may not use constrainted output registers */
1267 if (rbitset_is_set(live_through_regs, l)
1268 && rbitset_is_set(forbidden_regs, r))
1271 hungarian_add(bp, r, l, l == r ? 9 : 8);
1275 for (int i = 0; i < arity; ++i) {
1276 ir_node *op = get_irn_n(node, i);
1277 if (!arch_irn_consider_in_reg_alloc(cls, op))
1280 const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
1281 if (!(req->type & arch_register_req_type_limited))
1284 const unsigned *limited = req->limited;
1285 const arch_register_t *reg = arch_get_irn_register(op);
1286 unsigned current_reg = arch_register_get_index(reg);
1287 for (unsigned r = 0; r < n_regs; ++r) {
1288 if (rbitset_is_set(limited, r))
1290 hungarian_remove(bp, r, current_reg);
1294 //hungarian_print_cost_matrix(bp, 1);
1295 hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
1297 unsigned *assignment = ALLOCAN(unsigned, n_regs);
1298 int res = hungarian_solve(bp, assignment, NULL, 0);
1302 fprintf(stderr, "Swap result:");
1303 for (i = 0; i < (int) n_regs; ++i) {
1304 fprintf(stderr, " %d", assignment[i]);
1306 fprintf(stderr, "\n");
1311 permute_values(live_nodes, node, assignment);
1314 /** test whether a node @p n is a copy of the value of node @p of */
1315 static bool is_copy_of(ir_node *value, ir_node *test_value)
1317 if (value == test_value)
1320 allocation_info_t *info = get_allocation_info(value);
1321 allocation_info_t *test_info = get_allocation_info(test_value);
1322 return test_info->original_value == info->original_value;
1326 * find a value in the end-assignment of a basic block
1327 * @returns the index into the assignment array if found
1330 static int find_value_in_block_info(block_info_t *info, ir_node *value)
1332 ir_node **end_assignments = info->assignments;
1333 for (unsigned r = 0; r < n_regs; ++r) {
1334 ir_node *a_value = end_assignments[r];
1336 if (a_value == NULL)
1338 if (is_copy_of(a_value, value))
1346 * Create the necessary permutations at the end of a basic block to fullfill
1347 * the register assignment for phi-nodes in the next block
1349 static void add_phi_permutations(ir_node *block, int p)
1351 ir_node *pred = get_Block_cfgpred_block(block, p);
1352 block_info_t *pred_info = get_block_info(pred);
1354 /* predecessor not processed yet? nothing to do */
1355 if (!pred_info->processed)
1358 unsigned *permutation = ALLOCAN(unsigned, n_regs);
1359 for (unsigned r = 0; r < n_regs; ++r) {
1363 /* check phi nodes */
1364 bool need_permutation = false;
1365 ir_node *phi = sched_first(block);
1366 for ( ; is_Phi(phi); phi = sched_next(phi)) {
1367 if (!arch_irn_consider_in_reg_alloc(cls, phi))
1370 ir_node *phi_pred = get_Phi_pred(phi, p);
1371 int a = find_value_in_block_info(pred_info, phi_pred);
1374 const arch_register_t *reg = arch_get_irn_register(phi);
1375 int regn = arch_register_get_index(reg);
1376 /* same register? nothing to do */
1380 ir_node *op = pred_info->assignments[a];
1381 const arch_register_t *op_reg = arch_get_irn_register(op);
1382 /* virtual or joker registers are ok too */
1383 if ((op_reg->type & arch_register_type_joker)
1384 || (op_reg->type & arch_register_type_virtual))
1387 permutation[regn] = a;
1388 need_permutation = true;
1391 if (need_permutation) {
1392 /* permute values at end of predecessor */
1393 ir_node **old_assignments = assignments;
1394 assignments = pred_info->assignments;
1395 permute_values(NULL, be_get_end_of_block_insertion_point(pred),
1397 assignments = old_assignments;
1400 /* change phi nodes to use the copied values */
1401 phi = sched_first(block);
1402 for ( ; is_Phi(phi); phi = sched_next(phi)) {
1403 if (!arch_irn_consider_in_reg_alloc(cls, phi))
1406 /* we have permuted all values into the correct registers so we can
1407 simply query which value occupies the phis register in the
1409 int a = arch_register_get_index(arch_get_irn_register(phi));
1410 ir_node *op = pred_info->assignments[a];
1411 set_Phi_pred(phi, p, op);
1416 * Set preferences for a phis register based on the registers used on the
1419 static void adapt_phi_prefs(ir_node *phi)
1421 ir_node *block = get_nodes_block(phi);
1422 allocation_info_t *info = get_allocation_info(phi);
1424 int arity = get_irn_arity(phi);
1425 for (int i = 0; i < arity; ++i) {
1426 ir_node *op = get_irn_n(phi, i);
1427 const arch_register_t *reg = arch_get_irn_register(op);
1431 /* we only give the bonus if the predecessor already has registers
1432 * assigned, otherwise we only see a dummy value
1433 * and any conclusions about its register are useless */
1434 ir_node *pred_block = get_Block_cfgpred_block(block, i);
1435 block_info_t *pred_block_info = get_block_info(pred_block);
1436 if (!pred_block_info->processed)
1439 /* give bonus for already assigned register */
1440 float weight = (float)get_block_execfreq(pred_block);
1441 unsigned r = arch_register_get_index(reg);
1442 info->prefs[r] += weight * AFF_PHI;
1447 * After a phi has been assigned a register propagate preference inputs
1448 * to the phi inputs.
1450 static void propagate_phi_register(ir_node *phi, unsigned assigned_r)
1452 ir_node *block = get_nodes_block(phi);
1454 int arity = get_irn_arity(phi);
1455 for (int i = 0; i < arity; ++i) {
1456 ir_node *op = get_Phi_pred(phi, i);
1457 allocation_info_t *info = get_allocation_info(op);
1458 ir_node *pred_block = get_Block_cfgpred_block(block, i);
1460 = (float)get_block_execfreq(pred_block) * AFF_PHI;
1462 if (info->prefs[assigned_r] >= weight)
1465 /* promote the prefered register */
1466 for (unsigned r = 0; r < n_regs; ++r) {
1467 if (info->prefs[r] > -weight) {
1468 info->prefs[r] = -weight;
1471 info->prefs[assigned_r] = weight;
1474 propagate_phi_register(op, assigned_r);
1478 static void assign_phi_registers(ir_node *block)
1480 /* count phi nodes */
1482 sched_foreach(block, node) {
1485 if (!arch_irn_consider_in_reg_alloc(cls, node))
1493 /* build a bipartite matching problem for all phi nodes */
1494 hungarian_problem_t *bp
1495 = hungarian_new(n_phis, n_regs, HUNGARIAN_MATCH_PERFECT);
1497 sched_foreach(block, node) {
1500 if (!arch_irn_consider_in_reg_alloc(cls, node))
1503 /* give boni for predecessor colorings */
1504 adapt_phi_prefs(node);
1505 /* add stuff to bipartite problem */
1506 allocation_info_t *info = get_allocation_info(node);
1507 DB((dbg, LEVEL_3, "Prefs for %+F: ", node));
1508 for (unsigned r = 0; r < n_regs; ++r) {
1509 if (!rbitset_is_set(normal_regs, r))
1512 float costs = info->prefs[r];
1513 costs = costs < 0 ? -logf(-costs+1) : logf(costs+1);
1516 hungarian_add(bp, n, r, (int)costs);
1517 DB((dbg, LEVEL_3, " %s(%f)", arch_register_for_index(cls, r)->name,
1520 DB((dbg, LEVEL_3, "\n"));
1524 //hungarian_print_cost_matrix(bp, 7);
1525 hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
1527 unsigned *assignment = ALLOCAN(unsigned, n_regs);
1528 int res = hungarian_solve(bp, assignment, NULL, 0);
1533 sched_foreach(block, node) {
1536 if (!arch_irn_consider_in_reg_alloc(cls, node))
1538 const arch_register_req_t *req
1539 = arch_get_irn_register_req(node);
1541 unsigned r = assignment[n++];
1542 assert(rbitset_is_set(normal_regs, r));
1543 const arch_register_t *reg = arch_register_for_index(cls, r);
1544 DB((dbg, LEVEL_2, "Assign %+F -> %s\n", node, reg->name));
1545 use_reg(node, reg, req->width);
1547 /* adapt preferences for phi inputs */
1548 if (propagate_phi_registers)
1549 propagate_phi_register(node, r);
1553 static arch_register_req_t *allocate_reg_req(ir_graph *irg)
1555 struct obstack *obst = be_get_be_obst(irg);
1556 arch_register_req_t *req = OALLOCZ(obst, arch_register_req_t);
1561 * Walker: assign registers to all nodes of a block that
1562 * need registers from the currently considered register class.
1564 static void allocate_coalesce_block(ir_node *block, void *data)
1567 DB((dbg, LEVEL_2, "* Block %+F\n", block));
1569 /* clear assignments */
1570 block_info_t *block_info = get_block_info(block);
1571 assignments = block_info->assignments;
1573 ir_nodeset_t live_nodes;
1574 ir_nodeset_init(&live_nodes);
1576 /* gather regalloc infos of predecessor blocks */
1577 int n_preds = get_Block_n_cfgpreds(block);
1578 block_info_t **pred_block_infos = ALLOCAN(block_info_t*, n_preds);
1579 for (int i = 0; i < n_preds; ++i) {
1580 ir_node *pred = get_Block_cfgpred_block(block, i);
1581 block_info_t *pred_info = get_block_info(pred);
1582 pred_block_infos[i] = pred_info;
1585 ir_node **phi_ins = ALLOCAN(ir_node*, n_preds);
1587 /* collect live-in nodes and preassigned values */
1588 be_lv_foreach(lv, block, be_lv_state_in, node) {
1589 const arch_register_req_t *req = arch_get_irn_register_req(node);
1590 if (req->cls != cls)
1593 if (req->type & arch_register_req_type_ignore) {
1594 allocation_info_t *info = get_allocation_info(node);
1595 info->current_value = node;
1597 const arch_register_t *reg = arch_get_irn_register(node);
1598 assert(reg != NULL); /* ignore values must be preassigned */
1599 use_reg(node, reg, req->width);
1603 /* check all predecessors for this value, if it is not everywhere the
1604 same or unknown then we have to construct a phi
1605 (we collect the potential phi inputs here) */
1606 bool need_phi = false;
1607 for (int p = 0; p < n_preds; ++p) {
1608 block_info_t *pred_info = pred_block_infos[p];
1610 if (!pred_info->processed) {
1611 /* use node for now, it will get fixed later */
1615 int a = find_value_in_block_info(pred_info, node);
1617 /* must live out of predecessor */
1619 phi_ins[p] = pred_info->assignments[a];
1620 /* different value from last time? then we need a phi */
1621 if (p > 0 && phi_ins[p-1] != phi_ins[p]) {
1628 ir_mode *mode = get_irn_mode(node);
1629 const arch_register_req_t *phi_req = cls->class_req;
1630 if (req->width > 1) {
1631 arch_register_req_t *new_req = allocate_reg_req(irg);
1633 new_req->type = req->type & arch_register_req_type_aligned;
1634 new_req->width = req->width;
1637 ir_node *phi = be_new_Phi(block, n_preds, phi_ins, mode,
1640 DB((dbg, LEVEL_3, "Create Phi %+F (for %+F) -", phi, node));
1641 #ifdef DEBUG_libfirm
1642 for (int pi = 0; pi < n_preds; ++pi) {
1643 DB((dbg, LEVEL_3, " %+F", phi_ins[pi]));
1645 DB((dbg, LEVEL_3, "\n"));
1647 mark_as_copy_of(phi, node);
1648 sched_add_after(block, phi);
1652 allocation_info_t *info = get_allocation_info(node);
1653 info->current_value = phi_ins[0];
1655 /* Grab 1 of the inputs we constructed (might not be the same as
1656 * "node" as we could see the same copy of the value in all
1661 /* if the node already has a register assigned use it */
1662 const arch_register_t *reg = arch_get_irn_register(node);
1664 use_reg(node, reg, req->width);
1667 /* remember that this node is live at the beginning of the block */
1668 ir_nodeset_insert(&live_nodes, node);
1671 unsigned *forbidden_regs; /**< collects registers which must
1672 not be used for optimistic splits */
1673 rbitset_alloca(forbidden_regs, n_regs);
1675 /* handle phis... */
1676 assign_phi_registers(block);
1678 /* all live-ins must have a register */
1680 foreach_ir_nodeset(&live_nodes, node, iter) {
1681 const arch_register_t *reg = arch_get_irn_register(node);
1682 assert(reg != NULL);
1686 /* assign instructions in the block */
1687 sched_foreach(block, node) {
1688 /* phis are already assigned */
1692 rewire_inputs(node);
1694 /* enforce use constraints */
1695 rbitset_clear_all(forbidden_regs, n_regs);
1696 enforce_constraints(&live_nodes, node, forbidden_regs);
1698 rewire_inputs(node);
1700 /* we may not use registers used for inputs for optimistic splits */
1701 int arity = get_irn_arity(node);
1702 for (int i = 0; i < arity; ++i) {
1703 ir_node *op = get_irn_n(node, i);
1704 if (!arch_irn_consider_in_reg_alloc(cls, op))
1707 const arch_register_t *reg = arch_get_irn_register(op);
1708 rbitset_set(forbidden_regs, arch_register_get_index(reg));
1711 /* free registers of values last used at this instruction */
1712 free_last_uses(&live_nodes, node);
1714 /* assign output registers */
1716 be_foreach_definition_(node, cls, value,
1717 assign_reg(block, value, forbidden_regs);
1721 ir_nodeset_destroy(&live_nodes);
1724 block_info->processed = true;
1726 /* permute values at end of predecessor blocks in case of phi-nodes */
1728 for (int p = 0; p < n_preds; ++p) {
1729 add_phi_permutations(block, p);
1733 /* if we have exactly 1 successor then we might be able to produce phi
1735 if (get_irn_n_edges_kind(block, EDGE_KIND_BLOCK) == 1) {
1736 const ir_edge_t *edge
1737 = get_irn_out_edge_first_kind(block, EDGE_KIND_BLOCK);
1738 ir_node *succ = get_edge_src_irn(edge);
1739 int p = get_edge_src_pos(edge);
1740 block_info_t *succ_info = get_block_info(succ);
1742 if (succ_info->processed) {
1743 add_phi_permutations(succ, p);
1748 typedef struct block_costs_t block_costs_t;
1749 struct block_costs_t {
1750 float costs; /**< costs of the block */
1751 int dfs_num; /**< depth first search number (to detect backedges) */
1754 static int cmp_block_costs(const void *d1, const void *d2)
1756 const ir_node * const *block1 = (const ir_node**)d1;
1757 const ir_node * const *block2 = (const ir_node**)d2;
1758 const block_costs_t *info1 = (const block_costs_t*)get_irn_link(*block1);
1759 const block_costs_t *info2 = (const block_costs_t*)get_irn_link(*block2);
1760 return QSORT_CMP(info2->costs, info1->costs);
1763 static void determine_block_order(void)
1765 ir_node **blocklist = be_get_cfgpostorder(irg);
1766 size_t n_blocks = ARR_LEN(blocklist);
1768 pdeq *worklist = new_pdeq();
1769 ir_node **order = XMALLOCN(ir_node*, n_blocks);
1772 /* clear block links... */
1773 for (size_t p = 0; p < n_blocks; ++p) {
1774 ir_node *block = blocklist[p];
1775 set_irn_link(block, NULL);
1778 /* walk blocks in reverse postorder, the costs for each block are the
1779 * sum of the costs of its predecessors (excluding the costs on backedges
1780 * which we can't determine) */
1781 for (size_t p = n_blocks; p > 0;) {
1782 block_costs_t *cost_info;
1783 ir_node *block = blocklist[--p];
1785 float execfreq = (float)get_block_execfreq(block);
1786 float costs = execfreq;
1787 int n_cfgpreds = get_Block_n_cfgpreds(block);
1788 for (int p2 = 0; p2 < n_cfgpreds; ++p2) {
1789 ir_node *pred_block = get_Block_cfgpred_block(block, p2);
1790 block_costs_t *pred_costs = (block_costs_t*)get_irn_link(pred_block);
1791 /* we don't have any info for backedges */
1792 if (pred_costs == NULL)
1794 costs += pred_costs->costs;
1797 cost_info = OALLOCZ(&obst, block_costs_t);
1798 cost_info->costs = costs;
1799 cost_info->dfs_num = dfs_num++;
1800 set_irn_link(block, cost_info);
1803 /* sort array by block costs */
1804 qsort(blocklist, n_blocks, sizeof(blocklist[0]), cmp_block_costs);
1806 ir_reserve_resources(irg, IR_RESOURCE_BLOCK_VISITED);
1807 inc_irg_block_visited(irg);
1809 for (size_t p = 0; p < n_blocks; ++p) {
1810 ir_node *block = blocklist[p];
1811 if (Block_block_visited(block))
1814 /* continually add predecessors with highest costs to worklist
1815 * (without using backedges) */
1817 block_costs_t *info = (block_costs_t*)get_irn_link(block);
1818 ir_node *best_pred = NULL;
1819 float best_costs = -1;
1820 int n_cfgpred = get_Block_n_cfgpreds(block);
1822 pdeq_putr(worklist, block);
1823 mark_Block_block_visited(block);
1824 for (int i = 0; i < n_cfgpred; ++i) {
1825 ir_node *pred_block = get_Block_cfgpred_block(block, i);
1826 block_costs_t *pred_info = (block_costs_t*)get_irn_link(pred_block);
1828 /* ignore backedges */
1829 if (pred_info->dfs_num > info->dfs_num)
1832 if (info->costs > best_costs) {
1833 best_costs = info->costs;
1834 best_pred = pred_block;
1838 } while (block != NULL && !Block_block_visited(block));
1840 /* now put all nodes in the worklist in our final order */
1841 while (!pdeq_empty(worklist)) {
1842 ir_node *pblock = (ir_node*)pdeq_getr(worklist);
1843 assert(order_p < n_blocks);
1844 order[order_p++] = pblock;
1847 assert(order_p == n_blocks);
1850 ir_free_resources(irg, IR_RESOURCE_BLOCK_VISITED);
1852 DEL_ARR_F(blocklist);
1854 obstack_free(&obst, NULL);
1855 obstack_init(&obst);
1857 block_order = order;
1858 n_block_order = n_blocks;
1861 static void free_block_order(void)
1867 * Run the register allocator for the current register class.
1869 static void be_pref_alloc_cls(void)
1871 be_assure_live_sets(irg);
1872 lv = be_get_irg_liveness(irg);
1874 ir_reserve_resources(irg, IR_RESOURCE_IRN_LINK);
1876 DB((dbg, LEVEL_2, "=== Allocating registers of %s ===\n", cls->name));
1878 be_clear_links(irg);
1880 irg_block_walk_graph(irg, NULL, analyze_block, NULL);
1881 if (create_congruence_classes)
1882 combine_congruence_classes();
1884 for (size_t i = 0; i < n_block_order; ++i) {
1885 ir_node *block = block_order[i];
1886 allocate_coalesce_block(block, NULL);
1889 ir_free_resources(irg, IR_RESOURCE_IRN_LINK);
1892 static void dump(int mask, ir_graph *irg, const char *suffix)
1894 if (be_options.dump_flags & mask)
1895 dump_ir_graph(irg, suffix);
1899 * Run the spiller on the current graph.
1901 static void spill(void)
1903 /* make sure all nodes show their real register pressure */
1904 be_timer_push(T_RA_CONSTR);
1905 be_pre_spill_prepare_constr(irg, cls);
1906 be_timer_pop(T_RA_CONSTR);
1908 dump(DUMP_RA, irg, "spillprepare");
1911 be_timer_push(T_RA_SPILL);
1912 be_do_spill(irg, cls);
1913 be_timer_pop(T_RA_SPILL);
1915 be_timer_push(T_RA_SPILL_APPLY);
1916 check_for_memory_operands(irg);
1917 be_timer_pop(T_RA_SPILL_APPLY);
1919 dump(DUMP_RA, irg, "spill");
1923 * The pref register allocator for a whole procedure.
1925 static void be_pref_alloc(ir_graph *new_irg)
1927 obstack_init(&obst);
1931 /* determine a good coloring order */
1932 determine_block_order();
1934 const arch_env_t *arch_env = be_get_irg_arch_env(new_irg);
1935 int n_cls = arch_env->n_register_classes;
1936 for (int c = 0; c < n_cls; ++c) {
1937 cls = &arch_env->register_classes[c];
1938 if (arch_register_class_flags(cls) & arch_register_class_flag_manual_ra)
1941 stat_ev_ctx_push_str("regcls", cls->name);
1943 n_regs = arch_register_class_n_regs(cls);
1944 normal_regs = rbitset_malloc(n_regs);
1945 be_set_allocatable_regs(irg, cls, normal_regs);
1949 /* verify schedule and register pressure */
1950 be_timer_push(T_VERIFY);
1951 if (be_options.verify_option == BE_VERIFY_WARN) {
1952 be_verify_schedule(irg);
1953 be_verify_register_pressure(irg, cls);
1954 } else if (be_options.verify_option == BE_VERIFY_ASSERT) {
1955 assert(be_verify_schedule(irg) && "Schedule verification failed");
1956 assert(be_verify_register_pressure(irg, cls)
1957 && "Register pressure verification failed");
1959 be_timer_pop(T_VERIFY);
1961 be_timer_push(T_RA_COLOR);
1962 be_pref_alloc_cls();
1963 be_timer_pop(T_RA_COLOR);
1965 /* we most probably constructed new Phis so liveness info is invalid
1967 be_invalidate_live_sets(irg);
1970 stat_ev_ctx_pop("regcls");
1975 be_timer_push(T_RA_SPILL_APPLY);
1976 be_abi_fix_stack_nodes(irg);
1977 be_timer_pop(T_RA_SPILL_APPLY);
1979 be_timer_push(T_VERIFY);
1980 if (be_options.verify_option == BE_VERIFY_WARN) {
1981 be_verify_register_allocation(irg);
1982 } else if (be_options.verify_option == BE_VERIFY_ASSERT) {
1983 assert(be_verify_register_allocation(irg)
1984 && "Register allocation invalid");
1986 be_timer_pop(T_VERIFY);
1988 obstack_free(&obst, NULL);
1991 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_pref_alloc)
1992 void be_init_pref_alloc(void)
1994 static be_ra_t be_ra_pref = {
1997 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
1998 lc_opt_entry_t *prefalloc_group = lc_opt_get_grp(be_grp, "prefalloc");
1999 lc_opt_add_table(prefalloc_group, options);
2001 be_register_allocator("pref", &be_ra_pref);
2002 FIRM_DBG_REGISTER(dbg, "firm.be.prefalloc");