bearch: Use arch_register_req_is().
[libfirm] / ir / be / beprefalloc.c
1 /*
2  * Copyright (C) 1995-2011 University of Karlsruhe.  All right reserved.
3  *
4  * This file is part of libFirm.
5  *
6  * This file may be distributed and/or modified under the terms of the
7  * GNU General Public License version 2 as published by the Free Software
8  * Foundation and appearing in the file LICENSE.GPL included in the
9  * packaging of this file.
10  *
11  * Licensees holding valid libFirm Professional Edition licenses may use
12  * this file in accordance with the libFirm Commercial License.
13  * Agreement provided with the Software.
14  *
15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17  * PURPOSE.
18  */
19
20 /**
21  * @file
22  * @brief       Preference Guided Register Assignment
23  * @author      Matthias Braun
24  * @date        14.2.2009
25  *
26  * The idea is to allocate registers in 2 passes:
27  * 1. A first pass to determine "preferred" registers for live-ranges. This
28  *    calculates for each register and each live-range a value indicating
29  *    the usefulness. (You can roughly think of the value as the negative
30  *    costs needed for copies when the value is in the specific registers...)
31  *
32  * 2. Walk blocks and assigns registers in a greedy fashion. Preferring
33  *    registers with high preferences. When register constraints are not met,
34  *    add copies and split live-ranges.
35  *
36  * TODO:
37  *  - make use of free registers in the permute_values code
38  */
39 #include "config.h"
40
41 #include <float.h>
42 #include <stdbool.h>
43 #include <math.h>
44 #include "lpp.h"
45
46 #include "error.h"
47 #include "execfreq.h"
48 #include "ircons.h"
49 #include "irdom.h"
50 #include "iredges_t.h"
51 #include "irgraph_t.h"
52 #include "irgwalk.h"
53 #include "irnode_t.h"
54 #include "irprintf.h"
55 #include "irdump.h"
56 #include "irtools.h"
57 #include "util.h"
58 #include "obst.h"
59 #include "raw_bitset.h"
60 #include "unionfind.h"
61 #include "pdeq.h"
62 #include "hungarian.h"
63 #include "statev.h"
64 #include "beabi.h"
65 #include "bechordal_t.h"
66 #include "be.h"
67 #include "beirg.h"
68 #include "belive_t.h"
69 #include "bemodule.h"
70 #include "benode.h"
71 #include "bera.h"
72 #include "besched.h"
73 #include "bespill.h"
74 #include "bespillutil.h"
75 #include "beverify.h"
76 #include "beutil.h"
77 #include "bestack.h"
78
79 #define USE_FACTOR                     1.0f
80 #define DEF_FACTOR                     1.0f
81 #define NEIGHBOR_FACTOR                0.2f
82 #define AFF_SHOULD_BE_SAME             0.5f
83 #define AFF_PHI                        1.0f
84 #define SPLIT_DELTA                    1.0f
85 #define MAX_OPTIMISTIC_SPLIT_RECURSION 0
86
87 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
88
89 static struct obstack               obst;
90 static ir_graph                    *irg;
91 static const arch_register_class_t *cls;
92 static be_lv_t                     *lv;
93 static unsigned                     n_regs;
94 static unsigned                    *normal_regs;
95 static int                         *congruence_classes;
96 static ir_node                    **block_order;
97 static size_t                       n_block_order;
98
99 /** currently active assignments (while processing a basic block)
100  * maps registers to values(their current copies) */
101 static ir_node **assignments;
102
103 /**
104  * allocation information: last_uses, register preferences
105  * the information is per firm-node.
106  */
107 struct allocation_info_t {
108         unsigned  last_uses[2];   /**< bitset indicating last uses (input pos) */
109         ir_node  *current_value;  /**< copy of the value that should be used */
110         ir_node  *original_value; /**< for copies point to original value */
111         float     prefs[];        /**< register preferences */
112 };
113 typedef struct allocation_info_t allocation_info_t;
114
115 /** helper datastructure used when sorting register preferences */
116 struct reg_pref_t {
117         unsigned num;
118         float    pref;
119 };
120 typedef struct reg_pref_t reg_pref_t;
121
122 /** per basic-block information */
123 struct block_info_t {
124         bool     processed;       /**< indicate whether block is processed */
125         ir_node *assignments[];   /**< register assignments at end of block */
126 };
127 typedef struct block_info_t block_info_t;
128
129 /**
130  * Get the allocation info for a node.
131  * The info is allocated on the first visit of a node.
132  */
133 static allocation_info_t *get_allocation_info(ir_node *node)
134 {
135         allocation_info_t *info = (allocation_info_t*)get_irn_link(node);
136         if (info == NULL) {
137                 info = OALLOCFZ(&obst, allocation_info_t, prefs, n_regs);
138                 info->current_value  = node;
139                 info->original_value = node;
140                 set_irn_link(node, info);
141         }
142
143         return info;
144 }
145
146 static allocation_info_t *try_get_allocation_info(const ir_node *node)
147 {
148         return (allocation_info_t*) get_irn_link(node);
149 }
150
151 /**
152  * Get allocation information for a basic block
153  */
154 static block_info_t *get_block_info(ir_node *block)
155 {
156         block_info_t *info = (block_info_t*)get_irn_link(block);
157
158         assert(is_Block(block));
159         if (info == NULL) {
160                 info = OALLOCFZ(&obst, block_info_t, assignments, n_regs);
161                 set_irn_link(block, info);
162         }
163
164         return info;
165 }
166
167 /**
168  * Link the allocation info of a node to a copy.
169  * Afterwards, both nodes uses the same allocation info.
170  * Copy must not have an allocation info assigned yet.
171  *
172  * @param copy   the node that gets the allocation info assigned
173  * @param value  the original node
174  */
175 static void mark_as_copy_of(ir_node *copy, ir_node *value)
176 {
177         allocation_info_t *info      = get_allocation_info(value);
178         allocation_info_t *copy_info = get_allocation_info(copy);
179
180         /* find original value */
181         ir_node *original = info->original_value;
182         if (original != value) {
183                 info = get_allocation_info(original);
184         }
185
186         assert(info->original_value == original);
187         info->current_value = copy;
188
189         /* the copy should not be linked to something else yet */
190         assert(copy_info->original_value == copy);
191         copy_info->original_value = original;
192
193         /* copy over allocation preferences */
194         memcpy(copy_info->prefs, info->prefs, n_regs * sizeof(copy_info->prefs[0]));
195 }
196
197 /**
198  * Calculate the penalties for every register on a node and its live neighbors.
199  *
200  * @param live_nodes  the set of live nodes at the current position, may be NULL
201  * @param penalty     the penalty to subtract from
202  * @param limited     a raw bitset containing the limited set for the node
203  * @param node        the node
204  */
205 static void give_penalties_for_limits(const ir_nodeset_t *live_nodes,
206                                       float penalty, const unsigned* limited,
207                                       ir_node *node)
208 {
209         allocation_info_t *info = get_allocation_info(node);
210
211         /* give penalty for all forbidden regs */
212         for (unsigned r = 0; r < n_regs; ++r) {
213                 if (rbitset_is_set(limited, r))
214                         continue;
215
216                 info->prefs[r] -= penalty;
217         }
218
219         /* all other live values should get a penalty for allowed regs */
220         if (live_nodes == NULL)
221                 return;
222
223         penalty   *= NEIGHBOR_FACTOR;
224         size_t n_allowed = rbitset_popcount(limited, n_regs);
225         if (n_allowed > 1) {
226                 /* only create a very weak penalty if multiple regs are allowed */
227                 penalty = (penalty * 0.8f) / n_allowed;
228         }
229         foreach_ir_nodeset(live_nodes, neighbor, iter) {
230                 allocation_info_t *neighbor_info;
231
232                 /* TODO: if op is used on multiple inputs we might not do a
233                  * continue here */
234                 if (neighbor == node)
235                         continue;
236
237                 neighbor_info = get_allocation_info(neighbor);
238                 for (unsigned r = 0; r < n_regs; ++r) {
239                         if (!rbitset_is_set(limited, r))
240                                 continue;
241
242                         neighbor_info->prefs[r] -= penalty;
243                 }
244         }
245 }
246
247 /**
248  * Calculate the preferences of a definition for the current register class.
249  * If the definition uses a limited set of registers, reduce the preferences
250  * for the limited register on the node and its neighbors.
251  *
252  * @param live_nodes  the set of live nodes at the current node
253  * @param weight      the weight
254  * @param node        the current node
255  */
256 static void check_defs(const ir_nodeset_t *live_nodes, float weight,
257                        ir_node *node)
258 {
259         const arch_register_req_t *req = arch_get_irn_register_req(node);
260         if (arch_register_req_is(req, limited)) {
261                 const unsigned *limited = req->limited;
262                 float           penalty = weight * DEF_FACTOR;
263                 give_penalties_for_limits(live_nodes, penalty, limited, node);
264         }
265
266         if (arch_register_req_is(req, should_be_same)) {
267                 ir_node           *insn  = skip_Proj(node);
268                 allocation_info_t *info  = get_allocation_info(node);
269                 int                arity = get_irn_arity(insn);
270
271                 float factor = 1.0f / rbitset_popcount(&req->other_same, arity);
272                 for (int i = 0; i < arity; ++i) {
273                         if (!rbitset_is_set(&req->other_same, i))
274                                 continue;
275
276                         ir_node *op = get_irn_n(insn, i);
277
278                         /* if we the value at the should_be_same input doesn't die at the
279                          * node, then it is no use to propagate the constraints (since a
280                          * copy will emerge anyway) */
281                         if (ir_nodeset_contains(live_nodes, op))
282                                 continue;
283
284                         allocation_info_t *op_info = get_allocation_info(op);
285                         for (unsigned r = 0; r < n_regs; ++r) {
286                                 op_info->prefs[r] += info->prefs[r] * factor;
287                         }
288                 }
289         }
290 }
291
292 /**
293  * Walker: Runs an a block calculates the preferences for any
294  * node and every register from the considered register class.
295  */
296 static void analyze_block(ir_node *block, void *data)
297 {
298         float        weight = (float)get_block_execfreq(block);
299         ir_nodeset_t live_nodes;
300         (void) data;
301
302         ir_nodeset_init(&live_nodes);
303         be_liveness_end_of_block(lv, cls, block, &live_nodes);
304
305         sched_foreach_reverse(block, node) {
306                 if (is_Phi(node))
307                         break;
308
309                 be_foreach_definition(node, cls, value,
310                         check_defs(&live_nodes, weight, value);
311                 );
312
313                 /* mark last uses */
314                 int arity = get_irn_arity(node);
315
316                 /* the allocation info node currently only uses 1 unsigned value
317                    to mark last used inputs. So we will fail for a node with more than
318                    32 inputs. */
319                 allocation_info_t *info = get_allocation_info(node);
320                 if (arity >= (int) sizeof(info->last_uses) * 8) {
321                         panic("Node with more than %d inputs not supported yet",
322                                         (int) sizeof(info->last_uses) * 8);
323                 }
324
325                 for (int i = 0; i < arity; ++i) {
326                         ir_node                   *op  = get_irn_n(node, i);
327                         const arch_register_req_t *req = arch_get_irn_register_req(op);
328                         if (req->cls != cls)
329                                 continue;
330
331                         /* last usage of a value? */
332                         if (!ir_nodeset_contains(&live_nodes, op)) {
333                                 rbitset_set(info->last_uses, i);
334                         }
335                 }
336
337                 be_liveness_transfer(cls, node, &live_nodes);
338
339                 /* update weights based on usage constraints */
340                 for (int i = 0; i < arity; ++i) {
341                         ir_node *op = get_irn_n(node, i);
342                         if (!arch_irn_consider_in_reg_alloc(cls, op))
343                                 continue;
344
345                         const arch_register_req_t *req
346                                 = arch_get_irn_register_req_in(node, i);
347                         if (!arch_register_req_is(req, limited))
348                                 continue;
349
350                         const unsigned *limited = req->limited;
351                         give_penalties_for_limits(&live_nodes, weight * USE_FACTOR,
352                                                                           limited, op);
353                 }
354         }
355
356         ir_nodeset_destroy(&live_nodes);
357 }
358
359 static void congruence_def(ir_nodeset_t *live_nodes, const ir_node *node)
360 {
361         const arch_register_req_t *req = arch_get_irn_register_req(node);
362
363         /* should be same constraint? */
364         if (arch_register_req_is(req, should_be_same)) {
365                 const ir_node *insn     = skip_Proj_const(node);
366                 int            arity    = get_irn_arity(insn);
367                 unsigned       node_idx = get_irn_idx(node);
368                 node_idx = uf_find(congruence_classes, node_idx);
369
370                 for (int i = 0; i < arity; ++i) {
371                         if (!rbitset_is_set(&req->other_same, i))
372                                 continue;
373
374                         ir_node *op     = get_irn_n(insn, i);
375                         int      op_idx = get_irn_idx(op);
376                         op_idx = uf_find(congruence_classes, op_idx);
377
378                         /* do we interfere with the value */
379                         bool interferes = false;
380                         foreach_ir_nodeset(live_nodes, live, iter) {
381                                 int lv_idx = get_irn_idx(live);
382                                 lv_idx     = uf_find(congruence_classes, lv_idx);
383                                 if (lv_idx == op_idx) {
384                                         interferes = true;
385                                         break;
386                                 }
387                         }
388                         /* don't put in same affinity class if we interfere */
389                         if (interferes)
390                                 continue;
391
392                         uf_union(congruence_classes, node_idx, op_idx);
393                         DB((dbg, LEVEL_3, "Merge %+F and %+F congruence classes\n",
394                             node, op));
395                         /* one should_be_same is enough... */
396                         break;
397                 }
398         }
399 }
400
401 static void create_congruence_class(ir_node *block, void *data)
402 {
403         ir_nodeset_t live_nodes;
404
405         (void) data;
406         ir_nodeset_init(&live_nodes);
407         be_liveness_end_of_block(lv, cls, block, &live_nodes);
408
409         /* check should be same constraints */
410         ir_node *last_phi = NULL;
411         sched_foreach_reverse(block, node) {
412                 if (is_Phi(node)) {
413                         last_phi = node;
414                         break;
415                 }
416
417                 be_foreach_definition(node, cls, value,
418                         congruence_def(&live_nodes, value);
419                 );
420                 be_liveness_transfer(cls, node, &live_nodes);
421         }
422         if (!last_phi) {
423                 ir_nodeset_destroy(&live_nodes);
424                 return;
425         }
426
427         /* check phi congruence classes */
428         sched_foreach_reverse_from(last_phi, phi) {
429                 assert(is_Phi(phi));
430
431                 if (!arch_irn_consider_in_reg_alloc(cls, phi))
432                         continue;
433
434                 int node_idx = get_irn_idx(phi);
435                 node_idx = uf_find(congruence_classes, node_idx);
436
437                 int arity = get_irn_arity(phi);
438                 for (int i = 0; i < arity; ++i) {
439                         ir_node *op     = get_Phi_pred(phi, i);
440                         int      op_idx = get_irn_idx(op);
441                         op_idx = uf_find(congruence_classes, op_idx);
442
443                         /* do we interfere with the value */
444                         bool interferes = false;
445                         foreach_ir_nodeset(&live_nodes, live, iter) {
446                                 int lv_idx = get_irn_idx(live);
447                                 lv_idx     = uf_find(congruence_classes, lv_idx);
448                                 if (lv_idx == op_idx) {
449                                         interferes = true;
450                                         break;
451                                 }
452                         }
453                         /* don't put in same affinity class if we interfere */
454                         if (interferes)
455                                 continue;
456                         /* any other phi has the same input? */
457                         sched_foreach(block, phi) {
458                                 ir_node *oop;
459                                 int      oop_idx;
460                                 if (!is_Phi(phi))
461                                         break;
462                                 if (!arch_irn_consider_in_reg_alloc(cls, phi))
463                                         continue;
464                                 oop = get_Phi_pred(phi, i);
465                                 if (oop == op)
466                                         continue;
467                                 oop_idx = get_irn_idx(oop);
468                                 oop_idx = uf_find(congruence_classes, oop_idx);
469                                 if (oop_idx == op_idx) {
470                                         interferes = true;
471                                         break;
472                                 }
473                         }
474                         if (interferes)
475                                 continue;
476
477                         /* merge the 2 congruence classes and sum up their preferences */
478                         int old_node_idx = node_idx;
479                         node_idx = uf_union(congruence_classes, node_idx, op_idx);
480                         DB((dbg, LEVEL_3, "Merge %+F and %+F congruence classes\n",
481                             phi, op));
482
483                         old_node_idx = node_idx == old_node_idx ? op_idx : old_node_idx;
484                         allocation_info_t *head_info
485                                 = get_allocation_info(get_idx_irn(irg, node_idx));
486                         allocation_info_t *other_info
487                                 = get_allocation_info(get_idx_irn(irg, old_node_idx));
488                         for (unsigned r = 0; r < n_regs; ++r) {
489                                 head_info->prefs[r] += other_info->prefs[r];
490                         }
491                 }
492         }
493         ir_nodeset_destroy(&live_nodes);
494 }
495
496 static void set_congruence_prefs(ir_node *node, void *data)
497 {
498         (void) data;
499         unsigned node_idx = get_irn_idx(node);
500         unsigned node_set = uf_find(congruence_classes, node_idx);
501
502         /* head of congruence class or not in any class */
503         if (node_set == node_idx)
504                 return;
505
506         if (!arch_irn_consider_in_reg_alloc(cls, node))
507                 return;
508
509         ir_node *head = get_idx_irn(irg, node_set);
510         allocation_info_t *head_info = get_allocation_info(head);
511         allocation_info_t *info      = get_allocation_info(node);
512
513         memcpy(info->prefs, head_info->prefs, n_regs * sizeof(info->prefs[0]));
514 }
515
516 static void combine_congruence_classes(void)
517 {
518         size_t n = get_irg_last_idx(irg);
519         congruence_classes = XMALLOCN(int, n);
520         uf_init(congruence_classes, n);
521
522         /* create congruence classes */
523         irg_block_walk_graph(irg, create_congruence_class, NULL, NULL);
524         /* merge preferences */
525         irg_walk_graph(irg, set_congruence_prefs, NULL, NULL);
526         free(congruence_classes);
527 }
528
529
530
531 /**
532  * Assign register reg to the given node.
533  *
534  * @param node  the node
535  * @param reg   the register
536  */
537 static void use_reg(ir_node *node, const arch_register_t *reg, unsigned width)
538 {
539         unsigned r = reg->index;
540         for (unsigned r0 = r; r0 < r + width; ++r0)
541                 assignments[r0] = node;
542         arch_set_irn_register(node, reg);
543 }
544
545 static void free_reg_of_value(ir_node *node)
546 {
547         if (!arch_irn_consider_in_reg_alloc(cls, node))
548                 return;
549
550         const arch_register_t     *reg = arch_get_irn_register(node);
551         const arch_register_req_t *req = arch_get_irn_register_req(node);
552         unsigned                   r   = reg->index;
553         /* assignment->value may be NULL if a value is used at 2 inputs
554          * so it gets freed twice. */
555         for (unsigned r0 = r; r0 < r + req->width; ++r0) {
556                 assert(assignments[r0] == node || assignments[r0] == NULL);
557                 assignments[r0] = NULL;
558         }
559 }
560
561 /**
562  * Compare two register preferences in decreasing order.
563  */
564 static int compare_reg_pref(const void *e1, const void *e2)
565 {
566         const reg_pref_t *rp1 = (const reg_pref_t*) e1;
567         const reg_pref_t *rp2 = (const reg_pref_t*) e2;
568         if (rp1->pref < rp2->pref)
569                 return 1;
570         if (rp1->pref > rp2->pref)
571                 return -1;
572         return 0;
573 }
574
575 static void fill_sort_candidates(reg_pref_t *regprefs,
576                                  const allocation_info_t *info)
577 {
578         for (unsigned r = 0; r < n_regs; ++r) {
579                 float pref = info->prefs[r];
580                 regprefs[r].num  = r;
581                 regprefs[r].pref = pref;
582         }
583         /* TODO: use a stable sort here to avoid unnecessary register jumping */
584         qsort(regprefs, n_regs, sizeof(regprefs[0]), compare_reg_pref);
585 }
586
587 static bool try_optimistic_split(ir_node *to_split, ir_node *before,
588                                  float pref, float pref_delta,
589                                  unsigned *forbidden_regs, int recursion)
590 {
591         (void) pref;
592         unsigned           r = 0;
593         allocation_info_t *info = get_allocation_info(to_split);
594         float              delta = 0;
595
596         /* stupid hack: don't optimisticallt split don't spill nodes...
597          * (so we don't split away the values produced because of
598          *  must_be_different constraints) */
599         ir_node *original_insn = skip_Proj(info->original_value);
600         if (arch_get_irn_flags(original_insn) & arch_irn_flags_dont_spill)
601                 return false;
602
603         const arch_register_t *from_reg        = arch_get_irn_register(to_split);
604         unsigned               from_r          = from_reg->index;
605         ir_node               *block           = get_nodes_block(before);
606         float split_threshold = (float)get_block_execfreq(block) * SPLIT_DELTA;
607
608         if (pref_delta < split_threshold*0.5)
609                 return false;
610
611         /* find the best free position where we could move to */
612         reg_pref_t *prefs = ALLOCAN(reg_pref_t, n_regs);
613         fill_sort_candidates(prefs, info);
614         unsigned i;
615         for (i = 0; i < n_regs; ++i) {
616                 /* we need a normal register which is not an output register
617                    an different from the current register of to_split */
618                 r = prefs[i].num;
619                 if (!rbitset_is_set(normal_regs, r))
620                         continue;
621                 if (rbitset_is_set(forbidden_regs, r))
622                         continue;
623                 if (r == from_r)
624                         continue;
625
626                 /* is the split worth it? */
627                 delta = pref_delta + prefs[i].pref;
628                 if (delta < split_threshold) {
629                         DB((dbg, LEVEL_3, "Not doing optimistical split of %+F (depth %d), win %f too low\n",
630                                 to_split, recursion, delta));
631                         return false;
632                 }
633
634                 /* if the register is free then we can do the split */
635                 if (assignments[r] == NULL)
636                         break;
637
638                 /* otherwise we might try recursively calling optimistic_split */
639                 if (recursion+1 > MAX_OPTIMISTIC_SPLIT_RECURSION)
640                         continue;
641
642                 float apref        = prefs[i].pref;
643                 float apref_delta  = i+1 < n_regs ? apref - prefs[i+1].pref : 0;
644                 apref_delta += pref_delta - split_threshold;
645
646                 /* our source register isn't a useful destination for recursive
647                    splits */
648                 bool old_source_state = rbitset_is_set(forbidden_regs, from_r);
649                 rbitset_set(forbidden_regs, from_r);
650                 /* try recursive split */
651                 bool res = try_optimistic_split(assignments[r], before, apref,
652                                               apref_delta, forbidden_regs, recursion+1);
653                 /* restore our destination */
654                 if (old_source_state) {
655                         rbitset_set(forbidden_regs, from_r);
656                 } else {
657                         rbitset_clear(forbidden_regs, from_r);
658                 }
659
660                 if (res)
661                         break;
662         }
663         if (i >= n_regs)
664                 return false;
665
666         const arch_register_t *reg   = arch_register_for_index(cls, r);
667         ir_node               *copy  = be_new_Copy(block, to_split);
668         unsigned               width = 1;
669         mark_as_copy_of(copy, to_split);
670         /* hacky, but correct here */
671         if (assignments[from_reg->index] == to_split)
672                 free_reg_of_value(to_split);
673         use_reg(copy, reg, width);
674         sched_add_before(before, copy);
675
676         DB((dbg, LEVEL_3,
677             "Optimistic live-range split %+F move %+F(%s) -> %s before %+F (win %f, depth %d)\n",
678             copy, to_split, from_reg->name, reg->name, before, delta, recursion));
679         return true;
680 }
681
682 /**
683  * Determine and assign a register for node @p node
684  */
685 static void assign_reg(const ir_node *block, ir_node *node,
686                        unsigned *forbidden_regs)
687 {
688         assert(!is_Phi(node));
689         /* preassigned register? */
690         const arch_register_t     *final_reg = arch_get_irn_register(node);
691         const arch_register_req_t *req       = arch_get_irn_register_req(node);
692         unsigned                   width     = req->width;
693         if (final_reg != NULL) {
694                 DB((dbg, LEVEL_2, "Preassignment %+F -> %s\n", node, final_reg->name));
695                 use_reg(node, final_reg, width);
696                 return;
697         }
698
699         /* ignore reqs must be preassigned */
700         assert(!arch_register_req_is(req, ignore));
701
702         /* give should_be_same boni */
703         allocation_info_t *info    = get_allocation_info(node);
704         ir_node           *in_node = skip_Proj(node);
705         if (arch_register_req_is(req, should_be_same)) {
706                 float weight = (float)get_block_execfreq(block);
707                 int   arity  = get_irn_arity(in_node);
708
709                 assert(arity <= (int) sizeof(req->other_same) * 8);
710                 for (int i = 0; i < arity; ++i) {
711                         if (!rbitset_is_set(&req->other_same, i))
712                                 continue;
713
714                         ir_node               *in        = get_irn_n(in_node, i);
715                         const arch_register_t *reg       = arch_get_irn_register(in);
716                         unsigned               reg_index = reg->index;
717
718                         /* if the value didn't die here then we should not propagate the
719                          * should_be_same info */
720                         if (assignments[reg_index] == in)
721                                 continue;
722
723                         info->prefs[reg_index] += weight * AFF_SHOULD_BE_SAME;
724                 }
725         }
726
727         /* create list of register candidates and sort by their preference */
728         DB((dbg, LEVEL_2, "Candidates for %+F:", node));
729         reg_pref_t *reg_prefs = ALLOCAN(reg_pref_t, n_regs);
730         fill_sort_candidates(reg_prefs, info);
731         for (unsigned r = 0; r < n_regs; ++r) {
732                 unsigned num = reg_prefs[r].num;
733                 if (!rbitset_is_set(normal_regs, num))
734                         continue;
735                 const arch_register_t *reg = arch_register_for_index(cls, num);
736                 DB((dbg, LEVEL_2, " %s(%f)", reg->name, reg_prefs[r].pref));
737         }
738         DB((dbg, LEVEL_2, "\n"));
739
740         const unsigned *allowed_regs = normal_regs;
741         if (arch_register_req_is(req, limited)) {
742                 allowed_regs = req->limited;
743         }
744
745         unsigned final_reg_index = 0;
746         unsigned r;
747         for (r = 0; r < n_regs; ++r) {
748                 final_reg_index = reg_prefs[r].num;
749                 if (!rbitset_is_set(allowed_regs, final_reg_index))
750                         continue;
751                 /* alignment constraint? */
752                 if (width > 1) {
753                         if (arch_register_req_is(req, aligned) && (final_reg_index % width) != 0)
754                                 continue;
755                         bool fine = true;
756                         for (unsigned r0 = r+1; r0 < r+width; ++r0) {
757                                 if (assignments[r0] != NULL)
758                                         fine = false;
759                         }
760                         /* TODO: attempt optimistic split here */
761                         if (!fine)
762                                 continue;
763                 }
764
765                 if (assignments[final_reg_index] == NULL)
766                         break;
767                 float    pref   = reg_prefs[r].pref;
768                 float    delta  = r+1 < n_regs ? pref - reg_prefs[r+1].pref : 0;
769                 ir_node *before = skip_Proj(node);
770                 bool     res
771                         = try_optimistic_split(assignments[final_reg_index], before, pref,
772                                                delta, forbidden_regs, 0);
773                 if (res)
774                         break;
775         }
776         if (r >= n_regs) {
777                 /* the common reason to hit this panic is when 1 of your nodes is not
778                  * register pressure faithful */
779                 panic("No register left for %+F\n", node);
780         }
781
782         final_reg = arch_register_for_index(cls, final_reg_index);
783         DB((dbg, LEVEL_2, "Assign %+F -> %s\n", node, final_reg->name));
784         use_reg(node, final_reg, width);
785 }
786
787 /**
788  * Add an permutation in front of a node and change the assignments
789  * due to this permutation.
790  *
791  * To understand this imagine a permutation like this:
792  *
793  * 1 -> 2
794  * 2 -> 3
795  * 3 -> 1, 5
796  * 4 -> 6
797  * 5
798  * 6
799  * 7 -> 7
800  *
801  * First we count how many destinations a single value has. At the same time
802  * we can be sure that each destination register has at most 1 source register
803  * (it can have 0 which means we don't care what value is in it).
804  * We ignore all fulfilled permuations (like 7->7)
805  * In a first pass we create as much copy instructions as possible as they
806  * are generally cheaper than exchanges. We do this by counting into how many
807  * destinations a register has to be copied (in the example it's 2 for register
808  * 3, or 1 for the registers 1,2,4 and 7).
809  * We can then create a copy into every destination register when the usecount
810  * of that register is 0 (= noone else needs the value in the register).
811  *
812  * After this step we should only have cycles left. We implement a cyclic
813  * permutation of n registers with n-1 transpositions.
814  *
815  * @param live_nodes   the set of live nodes, updated due to live range split
816  * @param before       the node before we add the permutation
817  * @param permutation  the permutation array indices are the destination
818  *                     registers, the values in the array are the source
819  *                     registers.
820  */
821 static void permute_values(ir_nodeset_t *live_nodes, ir_node *before,
822                            unsigned *permutation)
823 {
824         unsigned *n_used = ALLOCANZ(unsigned, n_regs);
825
826         /* determine how often each source register needs to be read */
827         for (unsigned r = 0; r < n_regs; ++r) {
828                 unsigned  old_reg = permutation[r];
829                 ir_node  *value;
830
831                 value = assignments[old_reg];
832                 if (value == NULL) {
833                         /* nothing to do here, reg is not live. Mark it as fixpoint
834                          * so we ignore it in the next steps */
835                         permutation[r] = r;
836                         continue;
837                 }
838
839                 ++n_used[old_reg];
840         }
841
842         ir_node *block = get_nodes_block(before);
843
844         /* step1: create copies where immediately possible */
845         for (unsigned r = 0; r < n_regs; /* empty */) {
846                 unsigned old_r = permutation[r];
847
848                 /* - no need to do anything for fixed points.
849                    - we can't copy if the value in the dest reg is still needed */
850                 if (old_r == r || n_used[r] > 0) {
851                         ++r;
852                         continue;
853                 }
854
855                 /* create a copy */
856                 ir_node *src  = assignments[old_r];
857                 ir_node *copy = be_new_Copy(block, src);
858                 sched_add_before(before, copy);
859                 const arch_register_t *reg = arch_register_for_index(cls, r);
860                 DB((dbg, LEVEL_2, "Copy %+F (from %+F, before %+F) -> %s\n",
861                     copy, src, before, reg->name));
862                 mark_as_copy_of(copy, src);
863                 unsigned width = 1; /* TODO */
864                 use_reg(copy, reg, width);
865
866                 if (live_nodes != NULL) {
867                         ir_nodeset_insert(live_nodes, copy);
868                 }
869
870                 /* old register has 1 user less, permutation is resolved */
871                 assert(arch_get_irn_register(src)->index == old_r);
872                 permutation[r] = r;
873
874                 assert(n_used[old_r] > 0);
875                 --n_used[old_r];
876                 if (n_used[old_r] == 0) {
877                         if (live_nodes != NULL) {
878                                 ir_nodeset_remove(live_nodes, src);
879                         }
880                         free_reg_of_value(src);
881                 }
882
883                 /* advance or jump back (if this copy enabled another copy) */
884                 if (old_r < r && n_used[old_r] == 0) {
885                         r = old_r;
886                 } else {
887                         ++r;
888                 }
889         }
890
891         /* at this point we only have "cycles" left which we have to resolve with
892          * perm instructions
893          * TODO: if we have free registers left, then we should really use copy
894          * instructions for any cycle longer than 2 registers...
895          * (this is probably architecture dependent, there might be archs where
896          *  copies are preferable even for 2-cycles) */
897
898         /* create perms with the rest */
899         for (unsigned r = 0; r < n_regs; /* empty */) {
900                 unsigned old_r = permutation[r];
901
902                 if (old_r == r) {
903                         ++r;
904                         continue;
905                 }
906
907                 /* we shouldn't have copies from 1 value to multiple destinations left*/
908                 assert(n_used[old_r] == 1);
909
910                 /* exchange old_r and r2; after that old_r is a fixed point */
911                 unsigned r2 = permutation[old_r];
912
913                 ir_node *in[2] = { assignments[r2], assignments[old_r] };
914                 ir_node *perm = be_new_Perm(cls, block, 2, in);
915                 sched_add_before(before, perm);
916                 DB((dbg, LEVEL_2, "Perm %+F (perm %+F,%+F, before %+F)\n",
917                     perm, in[0], in[1], before));
918
919                 unsigned width = 1; /* TODO */
920
921                 ir_node *proj0 = new_r_Proj(perm, get_irn_mode(in[0]), 0);
922                 mark_as_copy_of(proj0, in[0]);
923                 const arch_register_t *reg0 = arch_register_for_index(cls, old_r);
924                 use_reg(proj0, reg0, width);
925
926                 ir_node *proj1 = new_r_Proj(perm, get_irn_mode(in[1]), 1);
927                 mark_as_copy_of(proj1, in[1]);
928                 const arch_register_t *reg1 = arch_register_for_index(cls, r2);
929                 use_reg(proj1, reg1, width);
930
931                 /* 1 value is now in the correct register */
932                 permutation[old_r] = old_r;
933                 /* the source of r changed to r2 */
934                 permutation[r] = r2;
935
936                 /* if we have reached a fixpoint update data structures */
937                 if (live_nodes != NULL) {
938                         ir_nodeset_remove(live_nodes, in[0]);
939                         ir_nodeset_remove(live_nodes, in[1]);
940                         ir_nodeset_remove(live_nodes, proj0);
941                         ir_nodeset_insert(live_nodes, proj1);
942                 }
943         }
944
945 #ifndef NDEBUG
946         /* now we should only have fixpoints left */
947         for (unsigned r = 0; r < n_regs; ++r) {
948                 assert(permutation[r] == r);
949         }
950 #endif
951 }
952
953 /**
954  * Free regs for values last used.
955  *
956  * @param live_nodes   set of live nodes, will be updated
957  * @param node         the node to consider
958  */
959 static void free_last_uses(ir_nodeset_t *live_nodes, ir_node *node)
960 {
961         allocation_info_t *info      = get_allocation_info(node);
962         const unsigned    *last_uses = info->last_uses;
963         int                arity     = get_irn_arity(node);
964
965         for (int i = 0; i < arity; ++i) {
966                 /* check if one operand is the last use */
967                 if (!rbitset_is_set(last_uses, i))
968                         continue;
969
970                 ir_node *op = get_irn_n(node, i);
971                 free_reg_of_value(op);
972                 ir_nodeset_remove(live_nodes, op);
973         }
974 }
975
976 /**
977  * change inputs of a node to the current value (copies/perms)
978  */
979 static void rewire_inputs(ir_node *node)
980 {
981         int arity = get_irn_arity(node);
982         for (int i = 0; i < arity; ++i) {
983                 ir_node           *op = get_irn_n(node, i);
984                 allocation_info_t *info = try_get_allocation_info(op);
985
986                 if (info == NULL)
987                         continue;
988
989                 info = get_allocation_info(info->original_value);
990                 if (info->current_value != op) {
991                         set_irn_n(node, i, info->current_value);
992                 }
993         }
994 }
995
996 /**
997  * Create a bitset of registers occupied with value living through an
998  * instruction
999  */
1000 static void determine_live_through_regs(unsigned *bitset, ir_node *node)
1001 {
1002         const allocation_info_t *info = get_allocation_info(node);
1003
1004         /* mark all used registers as potentially live-through */
1005         for (unsigned r = 0; r < n_regs; ++r) {
1006                 if (assignments[r] == NULL)
1007                         continue;
1008                 if (!rbitset_is_set(normal_regs, r))
1009                         continue;
1010
1011                 rbitset_set(bitset, r);
1012         }
1013
1014         /* remove registers of value dying at the instruction */
1015         int arity = get_irn_arity(node);
1016         for (int i = 0; i < arity; ++i) {
1017                 if (!rbitset_is_set(info->last_uses, i))
1018                         continue;
1019
1020                 ir_node               *op  = get_irn_n(node, i);
1021                 const arch_register_t *reg = arch_get_irn_register(op);
1022                 rbitset_clear(bitset, reg->index);
1023         }
1024 }
1025
1026 static void solve_lpp(ir_nodeset_t *live_nodes, ir_node *node,
1027                       unsigned *forbidden_regs, unsigned *live_through_regs)
1028 {
1029         unsigned *forbidden_edges = rbitset_malloc(n_regs * n_regs);
1030         int      *lpp_vars        = XMALLOCNZ(int, n_regs*n_regs);
1031
1032         lpp_t *lpp = lpp_new("prefalloc", lpp_minimize);
1033         //lpp_set_time_limit(lpp, 20);
1034         lpp_set_log(lpp, stdout);
1035
1036         /** mark some edges as forbidden */
1037         int arity = get_irn_arity(node);
1038         for (int i = 0; i < arity; ++i) {
1039                 ir_node *op = get_irn_n(node, i);
1040                 if (!arch_irn_consider_in_reg_alloc(cls, op))
1041                         continue;
1042
1043                 const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
1044                 if (!arch_register_req_is(req, limited))
1045                         continue;
1046
1047                 const unsigned        *limited     = req->limited;
1048                 const arch_register_t *reg         = arch_get_irn_register(op);
1049                 unsigned               current_reg = reg->index;
1050                 for (unsigned r = 0; r < n_regs; ++r) {
1051                         if (rbitset_is_set(limited, r))
1052                                 continue;
1053
1054                         rbitset_set(forbidden_edges, current_reg*n_regs + r);
1055                 }
1056         }
1057
1058         /* add all combinations, except for not allowed ones */
1059         for (unsigned l = 0; l < n_regs; ++l) {
1060                 if (!rbitset_is_set(normal_regs, l)) {
1061                         char name[15];
1062                         snprintf(name, sizeof(name), "%u_to_%u", l, l);
1063                         lpp_vars[l*n_regs+l] = lpp_add_var(lpp, name, lpp_binary, 1);
1064                         continue;
1065                 }
1066
1067                 for (unsigned r = 0; r < n_regs; ++r) {
1068                         if (!rbitset_is_set(normal_regs, r))
1069                                 continue;
1070                         if (rbitset_is_set(forbidden_edges, l*n_regs + r))
1071                                 continue;
1072                         /* livethrough values may not use constrained output registers */
1073                         if (rbitset_is_set(live_through_regs, l)
1074                             && rbitset_is_set(forbidden_regs, r))
1075                                 continue;
1076
1077                         char name[15];
1078                         snprintf(name, sizeof(name), "%u_to_%u", l, r);
1079
1080                         double costs = l==r ? 9 : 8;
1081                         lpp_vars[l*n_regs+r]
1082                                 = lpp_add_var(lpp, name, lpp_binary, costs);
1083                         assert(lpp_vars[l*n_regs+r] > 0);
1084                 }
1085         }
1086         /* add constraints */
1087         for (unsigned l = 0; l < n_regs; ++l) {
1088                 /* only 1 destination per register */
1089                 int constraint = -1;
1090                 for (unsigned r = 0; r < n_regs; ++r) {
1091                         int var = lpp_vars[l*n_regs+r];
1092                         if (var == 0)
1093                                 continue;
1094                         if (constraint < 0) {
1095                                 char name[64];
1096                                 snprintf(name, sizeof(name), "%u_to_dest", l);
1097                                 constraint = lpp_add_cst(lpp, name, lpp_equal, 1);
1098                         }
1099                         lpp_set_factor_fast(lpp, constraint, var, 1);
1100                 }
1101                 /* each destination used by at most 1 value */
1102                 constraint = -1;
1103                 for (unsigned r = 0; r < n_regs; ++r) {
1104                         int var = lpp_vars[r*n_regs+l];
1105                         if (var == 0)
1106                                 continue;
1107                         if (constraint < 0) {
1108                                 char name[64];
1109                                 snprintf(name, sizeof(name), "one_to_%u", l);
1110                                 constraint = lpp_add_cst(lpp, name, lpp_less_equal, 1);
1111                         }
1112                         lpp_set_factor_fast(lpp, constraint, var, 1);
1113                 }
1114         }
1115
1116         lpp_dump_plain(lpp, fopen("lppdump.txt", "w"));
1117
1118         /* solve lpp */
1119         lpp_solve(lpp, be_options.ilp_server, be_options.ilp_solver);
1120         if (!lpp_is_sol_valid(lpp))
1121                 panic("ilp solution not valid!");
1122
1123         unsigned *assignment = ALLOCAN(unsigned, n_regs);
1124         for (unsigned l = 0; l < n_regs; ++l) {
1125                 unsigned dest_reg = (unsigned)-1;
1126                 for (unsigned r = 0; r < n_regs; ++r) {
1127                         int var = lpp_vars[l*n_regs+r];
1128                         if (var == 0)
1129                                 continue;
1130                         double val = lpp_get_var_sol(lpp, var);
1131                         if (val == 1) {
1132                                 assert(dest_reg == (unsigned)-1);
1133                                 dest_reg = r;
1134                         }
1135                 }
1136                 assert(dest_reg != (unsigned)-1);
1137                 assignment[dest_reg] = l;
1138         }
1139
1140         fprintf(stderr, "Assignment: ");
1141         for (unsigned l = 0; l < n_regs; ++l) {
1142                 fprintf(stderr, "%u ", assignment[l]);
1143         }
1144         fprintf(stderr, "\n");
1145         fflush(stdout);
1146         permute_values(live_nodes, node, assignment);
1147         lpp_free(lpp);
1148 }
1149
1150 static bool is_aligned(unsigned num, unsigned alignment)
1151 {
1152         unsigned mask = alignment-1;
1153         assert(is_po2(alignment));
1154         return (num&mask) == 0;
1155 }
1156
1157 /**
1158  * Enforce constraints at a node by live range splits.
1159  *
1160  * @param  live_nodes  the set of live nodes, might be changed
1161  * @param  node        the current node
1162  */
1163 static void enforce_constraints(ir_nodeset_t *live_nodes, ir_node *node,
1164                                 unsigned *forbidden_regs)
1165 {
1166         /* see if any use constraints are not met and whether double-width
1167          * values are involved */
1168         bool double_width = false;
1169         bool good = true;
1170         int  arity = get_irn_arity(node);
1171         for (int i = 0; i < arity; ++i) {
1172                 ir_node *op = get_irn_n(node, i);
1173                 if (!arch_irn_consider_in_reg_alloc(cls, op))
1174                         continue;
1175
1176                 /* are there any limitations for the i'th operand? */
1177                 const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
1178                 if (req->width > 1)
1179                         double_width = true;
1180                 const arch_register_t *reg       = arch_get_irn_register(op);
1181                 unsigned               reg_index = reg->index;
1182                 if (arch_register_req_is(req, aligned)) {
1183                         if (!is_aligned(reg_index, req->width)) {
1184                                 good = false;
1185                                 continue;
1186                         }
1187                 }
1188                 if (!arch_register_req_is(req, limited))
1189                         continue;
1190
1191                 const unsigned *limited = req->limited;
1192                 if (!rbitset_is_set(limited, reg_index)) {
1193                         /* found an assignment outside the limited set */
1194                         good = false;
1195                         continue;
1196                 }
1197         }
1198
1199         /* is any of the live-throughs using a constrained output register? */
1200         unsigned *live_through_regs = NULL;
1201         be_foreach_definition(node, cls, value,
1202                 (void)value;
1203                 if (req_->width > 1)
1204                         double_width = true;
1205                 if (!arch_register_req_is(req_, limited))
1206                         continue;
1207                 if (live_through_regs == NULL) {
1208                         live_through_regs = rbitset_alloca(n_regs);
1209                         determine_live_through_regs(live_through_regs, node);
1210                 }
1211                 rbitset_or(forbidden_regs, req_->limited, n_regs);
1212                 if (rbitsets_have_common(req_->limited, live_through_regs, n_regs))
1213                         good = false;
1214         );
1215
1216         if (good)
1217                 return;
1218
1219         /* create these arrays if we haven't yet */
1220         if (live_through_regs == NULL) {
1221                 live_through_regs = rbitset_alloca(n_regs);
1222         }
1223
1224         if (double_width) {
1225                 /* only the ILP variant can solve this yet */
1226                 solve_lpp(live_nodes, node, forbidden_regs, live_through_regs);
1227                 return;
1228         }
1229
1230         /* at this point we have to construct a bipartite matching problem to see
1231          * which values should go to which registers
1232          * Note: We're building the matrix in "reverse" - source registers are
1233          *       right, destinations left because this will produce the solution
1234          *       in the format required for permute_values.
1235          */
1236         hungarian_problem_t *bp
1237                 = hungarian_new(n_regs, n_regs, HUNGARIAN_MATCH_PERFECT);
1238
1239         /* add all combinations, then remove not allowed ones */
1240         for (unsigned l = 0; l < n_regs; ++l) {
1241                 if (!rbitset_is_set(normal_regs, l)) {
1242                         hungarian_add(bp, l, l, 1);
1243                         continue;
1244                 }
1245
1246                 for (unsigned r = 0; r < n_regs; ++r) {
1247                         if (!rbitset_is_set(normal_regs, r))
1248                                 continue;
1249                         /* livethrough values may not use constrainted output registers */
1250                         if (rbitset_is_set(live_through_regs, l)
1251                                         && rbitset_is_set(forbidden_regs, r))
1252                                 continue;
1253
1254                         hungarian_add(bp, r, l, l == r ? 9 : 8);
1255                 }
1256         }
1257
1258         for (int i = 0; i < arity; ++i) {
1259                 ir_node *op = get_irn_n(node, i);
1260                 if (!arch_irn_consider_in_reg_alloc(cls, op))
1261                         continue;
1262
1263                 const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
1264                 if (!arch_register_req_is(req, limited))
1265                         continue;
1266
1267                 const unsigned        *limited     = req->limited;
1268                 const arch_register_t *reg         = arch_get_irn_register(op);
1269                 unsigned               current_reg = reg->index;
1270                 for (unsigned r = 0; r < n_regs; ++r) {
1271                         if (rbitset_is_set(limited, r))
1272                                 continue;
1273                         hungarian_remove(bp, r, current_reg);
1274                 }
1275         }
1276
1277         //hungarian_print_cost_matrix(bp, 1);
1278         hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
1279
1280         unsigned *assignment = ALLOCAN(unsigned, n_regs);
1281         int res = hungarian_solve(bp, assignment, NULL, 0);
1282         assert(res == 0);
1283
1284 #if 0
1285         fprintf(stderr, "Swap result:");
1286         for (i = 0; i < (int) n_regs; ++i) {
1287                 fprintf(stderr, " %d", assignment[i]);
1288         }
1289         fprintf(stderr, "\n");
1290 #endif
1291
1292         hungarian_free(bp);
1293
1294         permute_values(live_nodes, node, assignment);
1295 }
1296
1297 /** test whether a node @p n is a copy of the value of node @p of */
1298 static bool is_copy_of(ir_node *value, ir_node *test_value)
1299 {
1300         if (value == test_value)
1301                 return true;
1302
1303         allocation_info_t *info      = get_allocation_info(value);
1304         allocation_info_t *test_info = get_allocation_info(test_value);
1305         return test_info->original_value == info->original_value;
1306 }
1307
1308 /**
1309  * find a value in the end-assignment of a basic block
1310  * @returns the index into the assignment array if found
1311  *          -1 if not found
1312  */
1313 static int find_value_in_block_info(block_info_t *info, ir_node *value)
1314 {
1315         ir_node  **end_assignments = info->assignments;
1316         for (unsigned r = 0; r < n_regs; ++r) {
1317                 ir_node *a_value = end_assignments[r];
1318
1319                 if (a_value == NULL)
1320                         continue;
1321                 if (is_copy_of(a_value, value))
1322                         return (int) r;
1323         }
1324
1325         return -1;
1326 }
1327
1328 /**
1329  * Create the necessary permutations at the end of a basic block to fullfill
1330  * the register assignment for phi-nodes in the next block
1331  */
1332 static void add_phi_permutations(ir_node *block, int p)
1333 {
1334         ir_node      *pred      = get_Block_cfgpred_block(block, p);
1335         block_info_t *pred_info = get_block_info(pred);
1336
1337         /* predecessor not processed yet? nothing to do */
1338         if (!pred_info->processed)
1339                 return;
1340
1341         unsigned *permutation = ALLOCAN(unsigned, n_regs);
1342         for (unsigned r = 0; r < n_regs; ++r) {
1343                 permutation[r] = r;
1344         }
1345
1346         /* check phi nodes */
1347         bool     need_permutation = false;
1348         ir_node *phi              = sched_first(block);
1349         for ( ; is_Phi(phi); phi = sched_next(phi)) {
1350                 if (!arch_irn_consider_in_reg_alloc(cls, phi))
1351                         continue;
1352
1353                 ir_node *phi_pred = get_Phi_pred(phi, p);
1354                 int      a        = find_value_in_block_info(pred_info, phi_pred);
1355                 assert(a >= 0);
1356
1357                 const arch_register_t *reg  = arch_get_irn_register(phi);
1358                 int                    regn = reg->index;
1359                 /* same register? nothing to do */
1360                 if (regn == a)
1361                         continue;
1362
1363                 ir_node               *op     = pred_info->assignments[a];
1364                 const arch_register_t *op_reg = arch_get_irn_register(op);
1365                 /* Virtual registers are ok, too. */
1366                 if (op_reg->type & arch_register_type_virtual)
1367                         continue;
1368
1369                 permutation[regn] = a;
1370                 need_permutation  = true;
1371         }
1372
1373         if (need_permutation) {
1374                 /* permute values at end of predecessor */
1375                 ir_node **old_assignments = assignments;
1376                 assignments     = pred_info->assignments;
1377                 permute_values(NULL, be_get_end_of_block_insertion_point(pred),
1378                                permutation);
1379                 assignments = old_assignments;
1380         }
1381
1382         /* change phi nodes to use the copied values */
1383         phi = sched_first(block);
1384         for ( ; is_Phi(phi); phi = sched_next(phi)) {
1385                 if (!arch_irn_consider_in_reg_alloc(cls, phi))
1386                         continue;
1387
1388                 /* we have permuted all values into the correct registers so we can
1389                    simply query which value occupies the phis register in the
1390                    predecessor */
1391                 int      a  = arch_get_irn_register(phi)->index;
1392                 ir_node *op = pred_info->assignments[a];
1393                 set_Phi_pred(phi, p, op);
1394         }
1395 }
1396
1397 /**
1398  * Set preferences for a phis register based on the registers used on the
1399  * phi inputs.
1400  */
1401 static void adapt_phi_prefs(ir_node *phi)
1402 {
1403         ir_node           *block = get_nodes_block(phi);
1404         allocation_info_t *info  = get_allocation_info(phi);
1405
1406         int arity = get_irn_arity(phi);
1407         for (int i = 0; i < arity; ++i) {
1408                 ir_node               *op  = get_irn_n(phi, i);
1409                 const arch_register_t *reg = arch_get_irn_register(op);
1410
1411                 if (reg == NULL)
1412                         continue;
1413                 /* we only give the bonus if the predecessor already has registers
1414                  * assigned, otherwise we only see a dummy value
1415                  * and any conclusions about its register are useless */
1416                 ir_node      *pred_block      = get_Block_cfgpred_block(block, i);
1417                 block_info_t *pred_block_info = get_block_info(pred_block);
1418                 if (!pred_block_info->processed)
1419                         continue;
1420
1421                 /* give bonus for already assigned register */
1422                 float weight = (float)get_block_execfreq(pred_block);
1423                 info->prefs[reg->index] += weight * AFF_PHI;
1424         }
1425 }
1426
1427 /**
1428  * After a phi has been assigned a register propagate preference inputs
1429  * to the phi inputs.
1430  */
1431 static void propagate_phi_register(ir_node *phi, unsigned assigned_r)
1432 {
1433         ir_node *block = get_nodes_block(phi);
1434
1435         int arity = get_irn_arity(phi);
1436         for (int i = 0; i < arity; ++i) {
1437                 ir_node           *op         = get_Phi_pred(phi, i);
1438                 allocation_info_t *info       = get_allocation_info(op);
1439                 ir_node           *pred_block = get_Block_cfgpred_block(block, i);
1440                 float              weight
1441                         = (float)get_block_execfreq(pred_block) * AFF_PHI;
1442
1443                 if (info->prefs[assigned_r] >= weight)
1444                         continue;
1445
1446                 /* promote the prefered register */
1447                 for (unsigned r = 0; r < n_regs; ++r) {
1448                         if (info->prefs[r] > -weight) {
1449                                 info->prefs[r] = -weight;
1450                         }
1451                 }
1452                 info->prefs[assigned_r] = weight;
1453
1454                 if (is_Phi(op))
1455                         propagate_phi_register(op, assigned_r);
1456         }
1457 }
1458
1459 static void assign_phi_registers(ir_node *block)
1460 {
1461         /* count phi nodes */
1462         int n_phis = 0;
1463         sched_foreach(block, node) {
1464                 if (!is_Phi(node))
1465                         break;
1466                 if (!arch_irn_consider_in_reg_alloc(cls, node))
1467                         continue;
1468                 ++n_phis;
1469         }
1470
1471         if (n_phis == 0)
1472                 return;
1473
1474         /* build a bipartite matching problem for all phi nodes */
1475         hungarian_problem_t *bp
1476                 = hungarian_new(n_phis, n_regs, HUNGARIAN_MATCH_PERFECT);
1477         int n = 0;
1478         sched_foreach(block, node) {
1479                 if (!is_Phi(node))
1480                         break;
1481                 if (!arch_irn_consider_in_reg_alloc(cls, node))
1482                         continue;
1483
1484                 /* give boni for predecessor colorings */
1485                 adapt_phi_prefs(node);
1486                 /* add stuff to bipartite problem */
1487                 allocation_info_t *info = get_allocation_info(node);
1488                 DB((dbg, LEVEL_3, "Prefs for %+F: ", node));
1489                 for (unsigned r = 0; r < n_regs; ++r) {
1490                         if (!rbitset_is_set(normal_regs, r))
1491                                 continue;
1492
1493                         float costs = info->prefs[r];
1494                         costs = costs < 0 ? -logf(-costs+1) : logf(costs+1);
1495                         costs *= 100;
1496                         costs += 10000;
1497                         hungarian_add(bp, n, r, (int)costs);
1498                         DB((dbg, LEVEL_3, " %s(%f)", arch_register_for_index(cls, r)->name,
1499                                                 info->prefs[r]));
1500                 }
1501                 DB((dbg, LEVEL_3, "\n"));
1502                 ++n;
1503         }
1504
1505         //hungarian_print_cost_matrix(bp, 7);
1506         hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
1507
1508         unsigned *assignment = ALLOCAN(unsigned, n_regs);
1509         int       res        = hungarian_solve(bp, assignment, NULL, 0);
1510         assert(res == 0);
1511
1512         /* apply results */
1513         n = 0;
1514         sched_foreach(block, node) {
1515                 if (!is_Phi(node))
1516                         break;
1517                 if (!arch_irn_consider_in_reg_alloc(cls, node))
1518                         continue;
1519                 const arch_register_req_t *req
1520                         = arch_get_irn_register_req(node);
1521
1522                 unsigned r = assignment[n++];
1523                 assert(rbitset_is_set(normal_regs, r));
1524                 const arch_register_t *reg = arch_register_for_index(cls, r);
1525                 DB((dbg, LEVEL_2, "Assign %+F -> %s\n", node, reg->name));
1526                 use_reg(node, reg, req->width);
1527
1528                 /* adapt preferences for phi inputs */
1529                 propagate_phi_register(node, r);
1530         }
1531 }
1532
1533 static arch_register_req_t *allocate_reg_req(ir_graph *irg)
1534 {
1535         struct obstack *obst = be_get_be_obst(irg);
1536         arch_register_req_t *req = OALLOCZ(obst, arch_register_req_t);
1537         return req;
1538 }
1539
1540 /**
1541  * Walker: assign registers to all nodes of a block that
1542  * need registers from the currently considered register class.
1543  */
1544 static void allocate_coalesce_block(ir_node *block, void *data)
1545 {
1546         (void) data;
1547         DB((dbg, LEVEL_2, "* Block %+F\n", block));
1548
1549         /* clear assignments */
1550         block_info_t *block_info  = get_block_info(block);
1551         assignments = block_info->assignments;
1552
1553         ir_nodeset_t live_nodes;
1554         ir_nodeset_init(&live_nodes);
1555
1556         /* gather regalloc infos of predecessor blocks */
1557         int            n_preds          = get_Block_n_cfgpreds(block);
1558         block_info_t **pred_block_infos = ALLOCAN(block_info_t*, n_preds);
1559         for (int i = 0; i < n_preds; ++i) {
1560                 ir_node      *pred      = get_Block_cfgpred_block(block, i);
1561                 block_info_t *pred_info = get_block_info(pred);
1562                 pred_block_infos[i]     = pred_info;
1563         }
1564
1565         ir_node **phi_ins = ALLOCAN(ir_node*, n_preds);
1566
1567         /* collect live-in nodes and preassigned values */
1568         be_lv_foreach(lv, block, be_lv_state_in, node) {
1569                 const arch_register_req_t *req = arch_get_irn_register_req(node);
1570                 if (req->cls != cls)
1571                         continue;
1572
1573                 if (arch_register_req_is(req, limited)) {
1574                         allocation_info_t *info = get_allocation_info(node);
1575                         info->current_value = node;
1576
1577                         const arch_register_t *reg = arch_get_irn_register(node);
1578                         assert(reg != NULL); /* ignore values must be preassigned */
1579                         use_reg(node, reg, req->width);
1580                         continue;
1581                 }
1582
1583                 /* check all predecessors for this value, if it is not everywhere the
1584                    same or unknown then we have to construct a phi
1585                    (we collect the potential phi inputs here) */
1586                 bool need_phi = false;
1587                 for (int p = 0; p < n_preds; ++p) {
1588                         block_info_t *pred_info = pred_block_infos[p];
1589
1590                         if (!pred_info->processed) {
1591                                 /* use node for now, it will get fixed later */
1592                                 phi_ins[p] = node;
1593                                 need_phi   = true;
1594                         } else {
1595                                 int a = find_value_in_block_info(pred_info, node);
1596
1597                                 /* must live out of predecessor */
1598                                 assert(a >= 0);
1599                                 phi_ins[p] = pred_info->assignments[a];
1600                                 /* different value from last time? then we need a phi */
1601                                 if (p > 0 && phi_ins[p-1] != phi_ins[p]) {
1602                                         need_phi = true;
1603                                 }
1604                         }
1605                 }
1606
1607                 if (need_phi) {
1608                         ir_mode *mode = get_irn_mode(node);
1609                         const arch_register_req_t *phi_req = cls->class_req;
1610                         if (req->width > 1) {
1611                                 arch_register_req_t *new_req = allocate_reg_req(irg);
1612                                 new_req->cls   = cls;
1613                                 new_req->type  = req->type & arch_register_req_type_aligned;
1614                                 new_req->width = req->width;
1615                                 phi_req = new_req;
1616                         }
1617                         ir_node *phi  = be_new_Phi(block, n_preds, phi_ins, mode,
1618                                                    phi_req);
1619
1620                         DB((dbg, LEVEL_3, "Create Phi %+F (for %+F) -", phi, node));
1621 #ifdef DEBUG_libfirm
1622                         for (int pi = 0; pi < n_preds; ++pi) {
1623                                 DB((dbg, LEVEL_3, " %+F", phi_ins[pi]));
1624                         }
1625                         DB((dbg, LEVEL_3, "\n"));
1626 #endif
1627                         mark_as_copy_of(phi, node);
1628                         sched_add_after(block, phi);
1629
1630                         node = phi;
1631                 } else {
1632                         allocation_info_t *info = get_allocation_info(node);
1633                         info->current_value = phi_ins[0];
1634
1635                         /* Grab 1 of the inputs we constructed (might not be the same as
1636                          * "node" as we could see the same copy of the value in all
1637                          * predecessors */
1638                         node = phi_ins[0];
1639                 }
1640
1641                 /* if the node already has a register assigned use it */
1642                 const arch_register_t *reg = arch_get_irn_register(node);
1643                 if (reg != NULL) {
1644                         use_reg(node, reg, req->width);
1645                 }
1646
1647                 /* remember that this node is live at the beginning of the block */
1648                 ir_nodeset_insert(&live_nodes, node);
1649         }
1650
1651         /** Collects registers which must not be used for optimistic splits. */
1652         unsigned *const forbidden_regs = rbitset_alloca(n_regs);
1653
1654         /* handle phis... */
1655         assign_phi_registers(block);
1656
1657         /* all live-ins must have a register */
1658 #ifndef NDEBUG
1659         foreach_ir_nodeset(&live_nodes, node, iter) {
1660                 const arch_register_t *reg = arch_get_irn_register(node);
1661                 assert(reg != NULL);
1662         }
1663 #endif
1664
1665         /* assign instructions in the block */
1666         sched_foreach(block, node) {
1667                 /* phis are already assigned */
1668                 if (is_Phi(node))
1669                         continue;
1670
1671                 rewire_inputs(node);
1672
1673                 /* enforce use constraints */
1674                 rbitset_clear_all(forbidden_regs, n_regs);
1675                 enforce_constraints(&live_nodes, node, forbidden_regs);
1676
1677                 rewire_inputs(node);
1678
1679                 /* we may not use registers used for inputs for optimistic splits */
1680                 int arity = get_irn_arity(node);
1681                 for (int i = 0; i < arity; ++i) {
1682                         ir_node *op = get_irn_n(node, i);
1683                         if (!arch_irn_consider_in_reg_alloc(cls, op))
1684                                 continue;
1685
1686                         const arch_register_t *reg = arch_get_irn_register(op);
1687                         rbitset_set(forbidden_regs, reg->index);
1688                 }
1689
1690                 /* free registers of values last used at this instruction */
1691                 free_last_uses(&live_nodes, node);
1692
1693                 /* assign output registers */
1694                 be_foreach_definition_(node, cls, value,
1695                         assign_reg(block, value, forbidden_regs);
1696                 );
1697         }
1698
1699         ir_nodeset_destroy(&live_nodes);
1700         assignments = NULL;
1701
1702         block_info->processed = true;
1703
1704         /* permute values at end of predecessor blocks in case of phi-nodes */
1705         if (n_preds > 1) {
1706                 for (int p = 0; p < n_preds; ++p) {
1707                         add_phi_permutations(block, p);
1708                 }
1709         }
1710
1711         /* if we have exactly 1 successor then we might be able to produce phi
1712            copies now */
1713         if (get_irn_n_edges_kind(block, EDGE_KIND_BLOCK) == 1) {
1714                 const ir_edge_t *edge
1715                         = get_irn_out_edge_first_kind(block, EDGE_KIND_BLOCK);
1716                 ir_node      *succ      = get_edge_src_irn(edge);
1717                 int           p         = get_edge_src_pos(edge);
1718                 block_info_t *succ_info = get_block_info(succ);
1719
1720                 if (succ_info->processed) {
1721                         add_phi_permutations(succ, p);
1722                 }
1723         }
1724 }
1725
1726 typedef struct block_costs_t block_costs_t;
1727 struct block_costs_t {
1728         float costs;   /**< costs of the block */
1729         int   dfs_num; /**< depth first search number (to detect backedges) */
1730 };
1731
1732 static int cmp_block_costs(const void *d1, const void *d2)
1733 {
1734         const ir_node       * const *block1 = (const ir_node**)d1;
1735         const ir_node       * const *block2 = (const ir_node**)d2;
1736         const block_costs_t *info1  = (const block_costs_t*)get_irn_link(*block1);
1737         const block_costs_t *info2  = (const block_costs_t*)get_irn_link(*block2);
1738         return QSORT_CMP(info2->costs, info1->costs);
1739 }
1740
1741 static void determine_block_order(void)
1742 {
1743         ir_node **blocklist = be_get_cfgpostorder(irg);
1744         size_t    n_blocks  = ARR_LEN(blocklist);
1745         int       dfs_num   = 0;
1746         pdeq     *worklist  = new_pdeq();
1747         ir_node **order     = XMALLOCN(ir_node*, n_blocks);
1748         size_t    order_p   = 0;
1749
1750         /* clear block links... */
1751         for (size_t p = 0; p < n_blocks; ++p) {
1752                 ir_node *block = blocklist[p];
1753                 set_irn_link(block, NULL);
1754         }
1755
1756         /* walk blocks in reverse postorder, the costs for each block are the
1757          * sum of the costs of its predecessors (excluding the costs on backedges
1758          * which we can't determine) */
1759         for (size_t p = n_blocks; p > 0;) {
1760                 block_costs_t *cost_info;
1761                 ir_node *block = blocklist[--p];
1762
1763                 float execfreq   = (float)get_block_execfreq(block);
1764                 float costs      = execfreq;
1765                 int   n_cfgpreds = get_Block_n_cfgpreds(block);
1766                 for (int p2 = 0; p2 < n_cfgpreds; ++p2) {
1767                         ir_node       *pred_block = get_Block_cfgpred_block(block, p2);
1768                         block_costs_t *pred_costs = (block_costs_t*)get_irn_link(pred_block);
1769                         /* we don't have any info for backedges */
1770                         if (pred_costs == NULL)
1771                                 continue;
1772                         costs += pred_costs->costs;
1773                 }
1774
1775                 cost_info          = OALLOCZ(&obst, block_costs_t);
1776                 cost_info->costs   = costs;
1777                 cost_info->dfs_num = dfs_num++;
1778                 set_irn_link(block, cost_info);
1779         }
1780
1781         /* sort array by block costs */
1782         qsort(blocklist, n_blocks, sizeof(blocklist[0]), cmp_block_costs);
1783
1784         ir_reserve_resources(irg, IR_RESOURCE_BLOCK_VISITED);
1785         inc_irg_block_visited(irg);
1786
1787         for (size_t p = 0; p < n_blocks; ++p) {
1788                 ir_node *block = blocklist[p];
1789                 if (Block_block_visited(block))
1790                         continue;
1791
1792                 /* continually add predecessors with highest costs to worklist
1793                  * (without using backedges) */
1794                 do {
1795                         block_costs_t *info       = (block_costs_t*)get_irn_link(block);
1796                         ir_node       *best_pred  = NULL;
1797                         float          best_costs = -1;
1798                         int            n_cfgpred  = get_Block_n_cfgpreds(block);
1799
1800                         pdeq_putr(worklist, block);
1801                         mark_Block_block_visited(block);
1802                         for (int i = 0; i < n_cfgpred; ++i) {
1803                                 ir_node       *pred_block = get_Block_cfgpred_block(block, i);
1804                                 block_costs_t *pred_info  = (block_costs_t*)get_irn_link(pred_block);
1805
1806                                 /* ignore backedges */
1807                                 if (pred_info->dfs_num > info->dfs_num)
1808                                         continue;
1809
1810                                 if (info->costs > best_costs) {
1811                                         best_costs = info->costs;
1812                                         best_pred  = pred_block;
1813                                 }
1814                         }
1815                         block = best_pred;
1816                 } while (block != NULL && !Block_block_visited(block));
1817
1818                 /* now put all nodes in the worklist in our final order */
1819                 while (!pdeq_empty(worklist)) {
1820                         ir_node *pblock = (ir_node*)pdeq_getr(worklist);
1821                         assert(order_p < n_blocks);
1822                         order[order_p++] = pblock;
1823                 }
1824         }
1825         assert(order_p == n_blocks);
1826         del_pdeq(worklist);
1827
1828         ir_free_resources(irg, IR_RESOURCE_BLOCK_VISITED);
1829
1830         DEL_ARR_F(blocklist);
1831
1832         obstack_free(&obst, NULL);
1833         obstack_init(&obst);
1834
1835         block_order   = order;
1836         n_block_order = n_blocks;
1837 }
1838
1839 static void free_block_order(void)
1840 {
1841         xfree(block_order);
1842 }
1843
1844 /**
1845  * Run the register allocator for the current register class.
1846  */
1847 static void be_pref_alloc_cls(void)
1848 {
1849         be_assure_live_sets(irg);
1850         lv = be_get_irg_liveness(irg);
1851
1852         ir_reserve_resources(irg, IR_RESOURCE_IRN_LINK);
1853
1854         DB((dbg, LEVEL_2, "=== Allocating registers of %s ===\n", cls->name));
1855
1856         be_clear_links(irg);
1857
1858         irg_block_walk_graph(irg, NULL, analyze_block, NULL);
1859         combine_congruence_classes();
1860
1861         for (size_t i = 0; i < n_block_order; ++i) {
1862                 ir_node *block = block_order[i];
1863                 allocate_coalesce_block(block, NULL);
1864         }
1865
1866         ir_free_resources(irg, IR_RESOURCE_IRN_LINK);
1867 }
1868
1869 static void dump(int mask, ir_graph *irg, const char *suffix)
1870 {
1871         if (be_options.dump_flags & mask)
1872                 dump_ir_graph(irg, suffix);
1873 }
1874
1875 /**
1876  * Run the spiller on the current graph.
1877  */
1878 static void spill(void)
1879 {
1880         /* make sure all nodes show their real register pressure */
1881         be_timer_push(T_RA_CONSTR);
1882         be_pre_spill_prepare_constr(irg, cls);
1883         be_timer_pop(T_RA_CONSTR);
1884
1885         dump(DUMP_RA, irg, "spillprepare");
1886
1887         /* spill */
1888         be_timer_push(T_RA_SPILL);
1889         be_do_spill(irg, cls);
1890         be_timer_pop(T_RA_SPILL);
1891
1892         be_timer_push(T_RA_SPILL_APPLY);
1893         check_for_memory_operands(irg);
1894         be_timer_pop(T_RA_SPILL_APPLY);
1895
1896         dump(DUMP_RA, irg, "spill");
1897 }
1898
1899 /**
1900  * The pref register allocator for a whole procedure.
1901  */
1902 static void be_pref_alloc(ir_graph *new_irg)
1903 {
1904         obstack_init(&obst);
1905
1906         irg = new_irg;
1907
1908         /* determine a good coloring order */
1909         determine_block_order();
1910
1911         const arch_env_t *arch_env = be_get_irg_arch_env(new_irg);
1912         int               n_cls    = arch_env->n_register_classes;
1913         for (int c = 0; c < n_cls; ++c) {
1914                 cls = &arch_env->register_classes[c];
1915                 if (arch_register_class_flags(cls) & arch_register_class_flag_manual_ra)
1916                         continue;
1917
1918                 stat_ev_ctx_push_str("regcls", cls->name);
1919
1920                 n_regs      = arch_register_class_n_regs(cls);
1921                 normal_regs = rbitset_malloc(n_regs);
1922                 be_set_allocatable_regs(irg, cls, normal_regs);
1923
1924                 spill();
1925
1926                 /* verify schedule and register pressure */
1927                 be_timer_push(T_VERIFY);
1928                 if (be_options.verify_option == BE_VERIFY_WARN) {
1929                         be_verify_schedule(irg);
1930                         be_verify_register_pressure(irg, cls);
1931                 } else if (be_options.verify_option == BE_VERIFY_ASSERT) {
1932                         assert(be_verify_schedule(irg) && "Schedule verification failed");
1933                         assert(be_verify_register_pressure(irg, cls)
1934                                 && "Register pressure verification failed");
1935                 }
1936                 be_timer_pop(T_VERIFY);
1937
1938                 be_timer_push(T_RA_COLOR);
1939                 be_pref_alloc_cls();
1940                 be_timer_pop(T_RA_COLOR);
1941
1942                 /* we most probably constructed new Phis so liveness info is invalid
1943                  * now */
1944                 be_invalidate_live_sets(irg);
1945                 free(normal_regs);
1946
1947                 stat_ev_ctx_pop("regcls");
1948         }
1949
1950         free_block_order();
1951
1952         be_timer_push(T_RA_SPILL_APPLY);
1953         be_abi_fix_stack_nodes(irg);
1954         be_timer_pop(T_RA_SPILL_APPLY);
1955
1956         be_timer_push(T_VERIFY);
1957         if (be_options.verify_option == BE_VERIFY_WARN) {
1958                 be_verify_register_allocation(irg);
1959         } else if (be_options.verify_option == BE_VERIFY_ASSERT) {
1960                 assert(be_verify_register_allocation(irg)
1961                        && "Register allocation invalid");
1962         }
1963         be_timer_pop(T_VERIFY);
1964
1965         obstack_free(&obst, NULL);
1966 }
1967
1968 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_pref_alloc)
1969 void be_init_pref_alloc(void)
1970 {
1971         static be_ra_t be_ra_pref = { be_pref_alloc };
1972         be_register_allocator("pref", &be_ra_pref);
1973         FIRM_DBG_REGISTER(dbg, "firm.be.prefalloc");
1974 }