2 * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Preference Guided Register Assignment
23 * @author Matthias Braun
26 * The idea is to allocate registers in 2 passes:
27 * 1. A first pass to determine "preferred" registers for live-ranges. This
28 * calculates for each register and each live-range a value indicating
29 * the usefulness. (You can roughly think of the value as the negative
30 * costs needed for copies when the value is in the specific registers...)
32 * 2. Walk blocks and assigns registers in a greedy fashion. Preferring
33 * registers with high preferences. When register constraints are not met,
34 * add copies and split live-ranges.
37 * - make use of free registers in the permute_values code
50 #include "iredges_t.h"
51 #include "irgraph_t.h"
59 #include "raw_bitset.h"
60 #include "unionfind.h"
62 #include "hungarian.h"
65 #include "bechordal_t.h"
74 #include "bespillutil.h"
79 #define USE_FACTOR 1.0f
80 #define DEF_FACTOR 1.0f
81 #define NEIGHBOR_FACTOR 0.2f
82 #define AFF_SHOULD_BE_SAME 0.5f
84 #define SPLIT_DELTA 1.0f
85 #define MAX_OPTIMISTIC_SPLIT_RECURSION 0
87 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
89 static struct obstack obst;
91 static const arch_register_class_t *cls;
93 static const ir_exec_freq *execfreqs;
94 static unsigned n_regs;
95 static unsigned *normal_regs;
96 static int *congruence_classes;
97 static ir_node **block_order;
98 static size_t n_block_order;
99 static int create_preferences = true;
100 static int create_congruence_classes = true;
101 static int propagate_phi_registers = true;
103 static const lc_opt_table_entry_t options[] = {
104 LC_OPT_ENT_BOOL("prefs", "use preference based coloring", &create_preferences),
105 LC_OPT_ENT_BOOL("congruences", "create congruence classes", &create_congruence_classes),
106 LC_OPT_ENT_BOOL("prop_phi", "propagate phi registers", &propagate_phi_registers),
110 /** currently active assignments (while processing a basic block)
111 * maps registers to values(their current copies) */
112 static ir_node **assignments;
115 * allocation information: last_uses, register preferences
116 * the information is per firm-node.
118 struct allocation_info_t {
119 unsigned last_uses[2]; /**< bitset indicating last uses (input pos) */
120 ir_node *current_value; /**< copy of the value that should be used */
121 ir_node *original_value; /**< for copies point to original value */
122 float prefs[]; /**< register preferences */
124 typedef struct allocation_info_t allocation_info_t;
126 /** helper datastructure used when sorting register preferences */
131 typedef struct reg_pref_t reg_pref_t;
133 /** per basic-block information */
134 struct block_info_t {
135 bool processed; /**< indicate whether block is processed */
136 ir_node *assignments[]; /**< register assignments at end of block */
138 typedef struct block_info_t block_info_t;
141 * Get the allocation info for a node.
142 * The info is allocated on the first visit of a node.
144 static allocation_info_t *get_allocation_info(ir_node *node)
146 allocation_info_t *info = (allocation_info_t*)get_irn_link(node);
148 info = OALLOCFZ(&obst, allocation_info_t, prefs, n_regs);
149 info->current_value = node;
150 info->original_value = node;
151 set_irn_link(node, info);
157 static allocation_info_t *try_get_allocation_info(const ir_node *node)
159 return (allocation_info_t*) get_irn_link(node);
163 * Get allocation information for a basic block
165 static block_info_t *get_block_info(ir_node *block)
167 block_info_t *info = (block_info_t*)get_irn_link(block);
169 assert(is_Block(block));
171 info = OALLOCFZ(&obst, block_info_t, assignments, n_regs);
172 set_irn_link(block, info);
179 * Link the allocation info of a node to a copy.
180 * Afterwards, both nodes uses the same allocation info.
181 * Copy must not have an allocation info assigned yet.
183 * @param copy the node that gets the allocation info assigned
184 * @param value the original node
186 static void mark_as_copy_of(ir_node *copy, ir_node *value)
189 allocation_info_t *info = get_allocation_info(value);
190 allocation_info_t *copy_info = get_allocation_info(copy);
192 /* find original value */
193 original = info->original_value;
194 if (original != value) {
195 info = get_allocation_info(original);
198 assert(info->original_value == original);
199 info->current_value = copy;
201 /* the copy should not be linked to something else yet */
202 assert(copy_info->original_value == copy);
203 copy_info->original_value = original;
205 /* copy over allocation preferences */
206 memcpy(copy_info->prefs, info->prefs, n_regs * sizeof(copy_info->prefs[0]));
210 * Calculate the penalties for every register on a node and its live neighbors.
212 * @param live_nodes the set of live nodes at the current position, may be NULL
213 * @param penalty the penalty to subtract from
214 * @param limited a raw bitset containing the limited set for the node
215 * @param node the node
217 static void give_penalties_for_limits(const ir_nodeset_t *live_nodes,
218 float penalty, const unsigned* limited,
221 ir_nodeset_iterator_t iter;
224 allocation_info_t *info = get_allocation_info(node);
227 /* give penalty for all forbidden regs */
228 for (r = 0; r < n_regs; ++r) {
229 if (rbitset_is_set(limited, r))
232 info->prefs[r] -= penalty;
235 /* all other live values should get a penalty for allowed regs */
236 if (live_nodes == NULL)
239 penalty *= NEIGHBOR_FACTOR;
240 n_allowed = rbitset_popcount(limited, n_regs);
242 /* only create a very weak penalty if multiple regs are allowed */
243 penalty = (penalty * 0.8f) / n_allowed;
245 foreach_ir_nodeset(live_nodes, neighbor, iter) {
246 allocation_info_t *neighbor_info;
248 /* TODO: if op is used on multiple inputs we might not do a
250 if (neighbor == node)
253 neighbor_info = get_allocation_info(neighbor);
254 for (r = 0; r < n_regs; ++r) {
255 if (!rbitset_is_set(limited, r))
258 neighbor_info->prefs[r] -= penalty;
264 * Calculate the preferences of a definition for the current register class.
265 * If the definition uses a limited set of registers, reduce the preferences
266 * for the limited register on the node and its neighbors.
268 * @param live_nodes the set of live nodes at the current node
269 * @param weight the weight
270 * @param node the current node
272 static void check_defs(const ir_nodeset_t *live_nodes, float weight,
275 const arch_register_req_t *req = arch_get_irn_register_req(node);
276 if (req->type & arch_register_req_type_limited) {
277 const unsigned *limited = req->limited;
278 float penalty = weight * DEF_FACTOR;
279 give_penalties_for_limits(live_nodes, penalty, limited, node);
282 if (req->type & arch_register_req_type_should_be_same) {
283 ir_node *insn = skip_Proj(node);
284 allocation_info_t *info = get_allocation_info(node);
285 int arity = get_irn_arity(insn);
288 float factor = 1.0f / rbitset_popcount(&req->other_same, arity);
289 for (i = 0; i < arity; ++i) {
292 allocation_info_t *op_info;
294 if (!rbitset_is_set(&req->other_same, i))
297 op = get_irn_n(insn, i);
299 /* if we the value at the should_be_same input doesn't die at the
300 * node, then it is no use to propagate the constraints (since a
301 * copy will emerge anyway) */
302 if (ir_nodeset_contains(live_nodes, op))
305 op_info = get_allocation_info(op);
306 for (r = 0; r < n_regs; ++r) {
307 op_info->prefs[r] += info->prefs[r] * factor;
314 * Walker: Runs an a block calculates the preferences for any
315 * node and every register from the considered register class.
317 static void analyze_block(ir_node *block, void *data)
319 float weight = (float)get_block_execfreq(execfreqs, block);
320 ir_nodeset_t live_nodes;
323 ir_nodeset_init(&live_nodes);
324 be_liveness_end_of_block(lv, cls, block, &live_nodes);
326 sched_foreach_reverse(block, node) {
327 allocation_info_t *info;
334 if (create_preferences) {
336 be_foreach_definition(node, cls, value,
337 check_defs(&live_nodes, weight, value);
342 arity = get_irn_arity(node);
344 /* the allocation info node currently only uses 1 unsigned value
345 to mark last used inputs. So we will fail for a node with more than
347 if (arity >= (int) sizeof(info->last_uses) * 8) {
348 panic("Node with more than %d inputs not supported yet",
349 (int) sizeof(info->last_uses) * 8);
352 info = get_allocation_info(node);
353 for (i = 0; i < arity; ++i) {
354 ir_node *op = get_irn_n(node, i);
355 const arch_register_req_t *req = arch_get_irn_register_req(op);
359 /* last usage of a value? */
360 if (!ir_nodeset_contains(&live_nodes, op)) {
361 rbitset_set(info->last_uses, i);
365 be_liveness_transfer(cls, node, &live_nodes);
367 if (create_preferences) {
368 /* update weights based on usage constraints */
369 for (i = 0; i < arity; ++i) {
370 const arch_register_req_t *req;
371 const unsigned *limited;
372 ir_node *op = get_irn_n(node, i);
374 if (!arch_irn_consider_in_reg_alloc(cls, op))
377 req = arch_get_irn_register_req_in(node, i);
378 if (!(req->type & arch_register_req_type_limited))
381 limited = req->limited;
382 give_penalties_for_limits(&live_nodes, weight * USE_FACTOR,
388 ir_nodeset_destroy(&live_nodes);
391 static void congruence_def(ir_nodeset_t *live_nodes, const ir_node *node)
393 const arch_register_req_t *req = arch_get_irn_register_req(node);
395 /* should be same constraint? */
396 if (req->type & arch_register_req_type_should_be_same) {
397 const ir_node *insn = skip_Proj_const(node);
398 int arity = get_irn_arity(insn);
400 unsigned node_idx = get_irn_idx(node);
401 node_idx = uf_find(congruence_classes, node_idx);
403 for (i = 0; i < arity; ++i) {
407 ir_nodeset_iterator_t iter;
408 bool interferes = false;
410 if (!rbitset_is_set(&req->other_same, i))
413 op = get_irn_n(insn, i);
414 op_idx = get_irn_idx(op);
415 op_idx = uf_find(congruence_classes, op_idx);
417 /* do we interfere with the value */
418 foreach_ir_nodeset(live_nodes, live, iter) {
419 int lv_idx = get_irn_idx(live);
420 lv_idx = uf_find(congruence_classes, lv_idx);
421 if (lv_idx == op_idx) {
426 /* don't put in same affinity class if we interfere */
430 node_idx = uf_union(congruence_classes, node_idx, op_idx);
431 DB((dbg, LEVEL_3, "Merge %+F and %+F congruence classes\n",
433 /* one should_be_same is enough... */
439 static void create_congruence_class(ir_node *block, void *data)
441 ir_nodeset_t live_nodes;
444 ir_nodeset_init(&live_nodes);
445 be_liveness_end_of_block(lv, cls, block, &live_nodes);
447 /* check should be same constraints */
448 sched_foreach_reverse(block, node) {
453 be_foreach_definition(node, cls, value,
454 congruence_def(&live_nodes, value);
456 be_liveness_transfer(cls, node, &live_nodes);
459 /* check phi congruence classes */
460 sched_foreach_reverse_from(node, node) {
464 assert(is_Phi(node));
466 if (!arch_irn_consider_in_reg_alloc(cls, node))
469 node_idx = get_irn_idx(node);
470 node_idx = uf_find(congruence_classes, node_idx);
472 arity = get_irn_arity(node);
473 for (i = 0; i < arity; ++i) {
474 bool interferes = false;
475 ir_nodeset_iterator_t iter;
479 allocation_info_t *head_info;
480 allocation_info_t *other_info;
481 ir_node *op = get_Phi_pred(node, i);
482 int op_idx = get_irn_idx(op);
483 op_idx = uf_find(congruence_classes, op_idx);
485 /* do we interfere with the value */
486 foreach_ir_nodeset(&live_nodes, live, iter) {
487 int lv_idx = get_irn_idx(live);
488 lv_idx = uf_find(congruence_classes, lv_idx);
489 if (lv_idx == op_idx) {
494 /* don't put in same affinity class if we interfere */
497 /* any other phi has the same input? */
498 sched_foreach(block, phi) {
503 if (!arch_irn_consider_in_reg_alloc(cls, phi))
505 oop = get_Phi_pred(phi, i);
508 oop_idx = get_irn_idx(oop);
509 oop_idx = uf_find(congruence_classes, oop_idx);
510 if (oop_idx == op_idx) {
518 /* merge the 2 congruence classes and sum up their preferences */
519 old_node_idx = node_idx;
520 node_idx = uf_union(congruence_classes, node_idx, op_idx);
521 DB((dbg, LEVEL_3, "Merge %+F and %+F congruence classes\n",
524 old_node_idx = node_idx == old_node_idx ? op_idx : old_node_idx;
525 head_info = get_allocation_info(get_idx_irn(irg, node_idx));
526 other_info = get_allocation_info(get_idx_irn(irg, old_node_idx));
527 for (r = 0; r < n_regs; ++r) {
528 head_info->prefs[r] += other_info->prefs[r];
534 static void set_congruence_prefs(ir_node *node, void *data)
536 allocation_info_t *info;
537 allocation_info_t *head_info;
538 unsigned node_idx = get_irn_idx(node);
539 unsigned node_set = uf_find(congruence_classes, node_idx);
543 /* head of congruence class or not in any class */
544 if (node_set == node_idx)
547 if (!arch_irn_consider_in_reg_alloc(cls, node))
550 head_info = get_allocation_info(get_idx_irn(irg, node_set));
551 info = get_allocation_info(node);
553 memcpy(info->prefs, head_info->prefs, n_regs * sizeof(info->prefs[0]));
556 static void combine_congruence_classes(void)
558 size_t n = get_irg_last_idx(irg);
559 congruence_classes = XMALLOCN(int, n);
560 uf_init(congruence_classes, n);
562 /* create congruence classes */
563 irg_block_walk_graph(irg, create_congruence_class, NULL, NULL);
564 /* merge preferences */
565 irg_walk_graph(irg, set_congruence_prefs, NULL, NULL);
566 free(congruence_classes);
572 * Assign register reg to the given node.
574 * @param node the node
575 * @param reg the register
577 static void use_reg(ir_node *node, const arch_register_t *reg)
579 unsigned r = arch_register_get_index(reg);
580 assignments[r] = node;
581 arch_set_irn_register(node, reg);
584 static void free_reg_of_value(ir_node *node)
586 const arch_register_t *reg;
589 if (!arch_irn_consider_in_reg_alloc(cls, node))
592 reg = arch_get_irn_register(node);
593 r = arch_register_get_index(reg);
594 /* assignment->value may be NULL if a value is used at 2 inputs
595 so it gets freed twice. */
596 assert(assignments[r] == node || assignments[r] == NULL);
597 assignments[r] = NULL;
601 * Compare two register preferences in decreasing order.
603 static int compare_reg_pref(const void *e1, const void *e2)
605 const reg_pref_t *rp1 = (const reg_pref_t*) e1;
606 const reg_pref_t *rp2 = (const reg_pref_t*) e2;
607 if (rp1->pref < rp2->pref)
609 if (rp1->pref > rp2->pref)
614 static void fill_sort_candidates(reg_pref_t *regprefs,
615 const allocation_info_t *info)
619 for (r = 0; r < n_regs; ++r) {
620 float pref = info->prefs[r];
622 regprefs[r].pref = pref;
624 /* TODO: use a stable sort here to avoid unnecessary register jumping */
625 qsort(regprefs, n_regs, sizeof(regprefs[0]), compare_reg_pref);
628 static bool try_optimistic_split(ir_node *to_split, ir_node *before,
629 float pref, float pref_delta,
630 unsigned *forbidden_regs, int recursion)
632 const arch_register_t *from_reg;
633 const arch_register_t *reg;
634 ir_node *original_insn;
640 allocation_info_t *info = get_allocation_info(to_split);
643 float split_threshold;
647 /* stupid hack: don't optimisticallt split don't spill nodes...
648 * (so we don't split away the values produced because of
649 * must_be_different constraints) */
650 original_insn = skip_Proj(info->original_value);
651 if (arch_get_irn_flags(original_insn) & arch_irn_flags_dont_spill)
654 from_reg = arch_get_irn_register(to_split);
655 from_r = arch_register_get_index(from_reg);
656 block = get_nodes_block(before);
657 split_threshold = (float)get_block_execfreq(execfreqs, block) * SPLIT_DELTA;
659 if (pref_delta < split_threshold*0.5)
662 /* find the best free position where we could move to */
663 prefs = ALLOCAN(reg_pref_t, n_regs);
664 fill_sort_candidates(prefs, info);
665 for (i = 0; i < n_regs; ++i) {
669 bool old_source_state;
671 /* we need a normal register which is not an output register
672 an different from the current register of to_split */
674 if (!rbitset_is_set(normal_regs, r))
676 if (rbitset_is_set(forbidden_regs, r))
681 /* is the split worth it? */
682 delta = pref_delta + prefs[i].pref;
683 if (delta < split_threshold) {
684 DB((dbg, LEVEL_3, "Not doing optimistical split of %+F (depth %d), win %f too low\n",
685 to_split, recursion, delta));
689 /* if the register is free then we can do the split */
690 if (assignments[r] == NULL)
693 /* otherwise we might try recursively calling optimistic_split */
694 if (recursion+1 > MAX_OPTIMISTIC_SPLIT_RECURSION)
697 apref = prefs[i].pref;
698 apref_delta = i+1 < n_regs ? apref - prefs[i+1].pref : 0;
699 apref_delta += pref_delta - split_threshold;
701 /* our source register isn't a useful destination for recursive
703 old_source_state = rbitset_is_set(forbidden_regs, from_r);
704 rbitset_set(forbidden_regs, from_r);
705 /* try recursive split */
706 res = try_optimistic_split(assignments[r], before, apref,
707 apref_delta, forbidden_regs, recursion+1);
708 /* restore our destination */
709 if (old_source_state) {
710 rbitset_set(forbidden_regs, from_r);
712 rbitset_clear(forbidden_regs, from_r);
721 reg = arch_register_for_index(cls, r);
722 copy = be_new_Copy(block, to_split);
723 mark_as_copy_of(copy, to_split);
724 /* hacky, but correct here */
725 if (assignments[arch_register_get_index(from_reg)] == to_split)
726 free_reg_of_value(to_split);
728 sched_add_before(before, copy);
731 "Optimistic live-range split %+F move %+F(%s) -> %s before %+F (win %f, depth %d)\n",
732 copy, to_split, from_reg->name, reg->name, before, delta, recursion));
737 * Determine and assign a register for node @p node
739 static void assign_reg(const ir_node *block, ir_node *node,
740 unsigned *forbidden_regs)
742 const arch_register_t *final_reg;
743 allocation_info_t *info;
744 const arch_register_req_t *req;
745 reg_pref_t *reg_prefs;
748 const unsigned *allowed_regs;
749 unsigned final_reg_index = 0;
751 assert(!is_Phi(node));
752 /* preassigned register? */
753 final_reg = arch_get_irn_register(node);
754 if (final_reg != NULL) {
755 DB((dbg, LEVEL_2, "Preassignment %+F -> %s\n", node, final_reg->name));
756 use_reg(node, final_reg);
760 req = arch_get_irn_register_req(node);
761 /* ignore reqs must be preassigned */
762 assert (! (req->type & arch_register_req_type_ignore));
764 /* give should_be_same boni */
765 info = get_allocation_info(node);
766 in_node = skip_Proj(node);
767 if (req->type & arch_register_req_type_should_be_same) {
768 float weight = (float)get_block_execfreq(execfreqs, block);
769 int arity = get_irn_arity(in_node);
772 assert(arity <= (int) sizeof(req->other_same) * 8);
773 for (i = 0; i < arity; ++i) {
775 const arch_register_t *reg;
777 if (!rbitset_is_set(&req->other_same, i))
780 in = get_irn_n(in_node, i);
781 reg = arch_get_irn_register(in);
783 reg_index = arch_register_get_index(reg);
785 /* if the value didn't die here then we should not propagate the
786 * should_be_same info */
787 if (assignments[reg_index] == in)
790 info->prefs[reg_index] += weight * AFF_SHOULD_BE_SAME;
794 /* create list of register candidates and sort by their preference */
795 DB((dbg, LEVEL_2, "Candidates for %+F:", node));
796 reg_prefs = ALLOCAN(reg_pref_t, n_regs);
797 fill_sort_candidates(reg_prefs, info);
798 for (r = 0; r < n_regs; ++r) {
799 unsigned num = reg_prefs[r].num;
800 const arch_register_t *reg;
802 if (!rbitset_is_set(normal_regs, num))
804 reg = arch_register_for_index(cls, num);
805 DB((dbg, LEVEL_2, " %s(%f)", reg->name, reg_prefs[r].pref));
807 DB((dbg, LEVEL_2, "\n"));
809 allowed_regs = normal_regs;
810 if (req->type & arch_register_req_type_limited) {
811 allowed_regs = req->limited;
814 for (r = 0; r < n_regs; ++r) {
819 final_reg_index = reg_prefs[r].num;
820 if (!rbitset_is_set(allowed_regs, final_reg_index))
822 /* alignment constraint? */
823 if (req->width > 1 && (req->type & arch_register_req_type_aligned)
824 && (final_reg_index % req->width) != 0)
827 if (assignments[final_reg_index] == NULL)
829 pref = reg_prefs[r].pref;
830 delta = r+1 < n_regs ? pref - reg_prefs[r+1].pref : 0;
831 before = skip_Proj(node);
832 res = try_optimistic_split(assignments[final_reg_index], before,
833 pref, delta, forbidden_regs, 0);
838 /* the common reason to hit this panic is when 1 of your nodes is not
839 * register pressure faithful */
840 panic("No register left for %+F\n", node);
843 final_reg = arch_register_for_index(cls, final_reg_index);
844 DB((dbg, LEVEL_2, "Assign %+F -> %s\n", node, final_reg->name));
845 use_reg(node, final_reg);
849 * Add an permutation in front of a node and change the assignments
850 * due to this permutation.
852 * To understand this imagine a permutation like this:
862 * First we count how many destinations a single value has. At the same time
863 * we can be sure that each destination register has at most 1 source register
864 * (it can have 0 which means we don't care what value is in it).
865 * We ignore all fulfilled permuations (like 7->7)
866 * In a first pass we create as much copy instructions as possible as they
867 * are generally cheaper than exchanges. We do this by counting into how many
868 * destinations a register has to be copied (in the example it's 2 for register
869 * 3, or 1 for the registers 1,2,4 and 7).
870 * We can then create a copy into every destination register when the usecount
871 * of that register is 0 (= noone else needs the value in the register).
873 * After this step we should only have cycles left. We implement a cyclic
874 * permutation of n registers with n-1 transpositions.
876 * @param live_nodes the set of live nodes, updated due to live range split
877 * @param before the node before we add the permutation
878 * @param permutation the permutation array indices are the destination
879 * registers, the values in the array are the source
882 static void permute_values(ir_nodeset_t *live_nodes, ir_node *before,
883 unsigned *permutation)
885 unsigned *n_used = ALLOCANZ(unsigned, n_regs);
889 /* determine how often each source register needs to be read */
890 for (r = 0; r < n_regs; ++r) {
891 unsigned old_reg = permutation[r];
894 value = assignments[old_reg];
896 /* nothing to do here, reg is not live. Mark it as fixpoint
897 * so we ignore it in the next steps */
905 block = get_nodes_block(before);
907 /* step1: create copies where immediately possible */
908 for (r = 0; r < n_regs; /* empty */) {
911 const arch_register_t *reg;
912 unsigned old_r = permutation[r];
914 /* - no need to do anything for fixed points.
915 - we can't copy if the value in the dest reg is still needed */
916 if (old_r == r || n_used[r] > 0) {
922 src = assignments[old_r];
923 copy = be_new_Copy(block, src);
924 sched_add_before(before, copy);
925 reg = arch_register_for_index(cls, r);
926 DB((dbg, LEVEL_2, "Copy %+F (from %+F, before %+F) -> %s\n",
927 copy, src, before, reg->name));
928 mark_as_copy_of(copy, src);
931 if (live_nodes != NULL) {
932 ir_nodeset_insert(live_nodes, copy);
935 /* old register has 1 user less, permutation is resolved */
936 assert(arch_register_get_index(arch_get_irn_register(src)) == old_r);
939 assert(n_used[old_r] > 0);
941 if (n_used[old_r] == 0) {
942 if (live_nodes != NULL) {
943 ir_nodeset_remove(live_nodes, src);
945 free_reg_of_value(src);
948 /* advance or jump back (if this copy enabled another copy) */
949 if (old_r < r && n_used[old_r] == 0) {
956 /* at this point we only have "cycles" left which we have to resolve with
958 * TODO: if we have free registers left, then we should really use copy
959 * instructions for any cycle longer than 2 registers...
960 * (this is probably architecture dependent, there might be archs where
961 * copies are preferable even for 2-cycles) */
963 /* create perms with the rest */
964 for (r = 0; r < n_regs; /* empty */) {
965 const arch_register_t *reg;
966 unsigned old_r = permutation[r];
978 /* we shouldn't have copies from 1 value to multiple destinations left*/
979 assert(n_used[old_r] == 1);
981 /* exchange old_r and r2; after that old_r is a fixed point */
982 r2 = permutation[old_r];
984 in[0] = assignments[r2];
985 in[1] = assignments[old_r];
986 perm = be_new_Perm(cls, block, 2, in);
987 sched_add_before(before, perm);
988 DB((dbg, LEVEL_2, "Perm %+F (perm %+F,%+F, before %+F)\n",
989 perm, in[0], in[1], before));
991 proj0 = new_r_Proj(perm, get_irn_mode(in[0]), 0);
992 mark_as_copy_of(proj0, in[0]);
993 reg = arch_register_for_index(cls, old_r);
996 proj1 = new_r_Proj(perm, get_irn_mode(in[1]), 1);
997 mark_as_copy_of(proj1, in[1]);
998 reg = arch_register_for_index(cls, r2);
1001 /* 1 value is now in the correct register */
1002 permutation[old_r] = old_r;
1003 /* the source of r changed to r2 */
1004 permutation[r] = r2;
1006 /* if we have reached a fixpoint update data structures */
1007 if (live_nodes != NULL) {
1008 ir_nodeset_remove(live_nodes, in[0]);
1009 ir_nodeset_remove(live_nodes, in[1]);
1010 ir_nodeset_remove(live_nodes, proj0);
1011 ir_nodeset_insert(live_nodes, proj1);
1015 #ifdef DEBUG_libfirm
1016 /* now we should only have fixpoints left */
1017 for (r = 0; r < n_regs; ++r) {
1018 assert(permutation[r] == r);
1024 * Free regs for values last used.
1026 * @param live_nodes set of live nodes, will be updated
1027 * @param node the node to consider
1029 static void free_last_uses(ir_nodeset_t *live_nodes, ir_node *node)
1031 allocation_info_t *info = get_allocation_info(node);
1032 const unsigned *last_uses = info->last_uses;
1033 int arity = get_irn_arity(node);
1036 for (i = 0; i < arity; ++i) {
1039 /* check if one operand is the last use */
1040 if (!rbitset_is_set(last_uses, i))
1043 op = get_irn_n(node, i);
1044 free_reg_of_value(op);
1045 ir_nodeset_remove(live_nodes, op);
1050 * change inputs of a node to the current value (copies/perms)
1052 static void rewire_inputs(ir_node *node)
1055 int arity = get_irn_arity(node);
1057 for (i = 0; i < arity; ++i) {
1058 ir_node *op = get_irn_n(node, i);
1059 allocation_info_t *info = try_get_allocation_info(op);
1064 info = get_allocation_info(info->original_value);
1065 if (info->current_value != op) {
1066 set_irn_n(node, i, info->current_value);
1072 * Create a bitset of registers occupied with value living through an
1075 static void determine_live_through_regs(unsigned *bitset, ir_node *node)
1077 const allocation_info_t *info = get_allocation_info(node);
1082 /* mark all used registers as potentially live-through */
1083 for (r = 0; r < n_regs; ++r) {
1084 if (assignments[r] == NULL)
1086 if (!rbitset_is_set(normal_regs, r))
1089 rbitset_set(bitset, r);
1092 /* remove registers of value dying at the instruction */
1093 arity = get_irn_arity(node);
1094 for (i = 0; i < arity; ++i) {
1096 const arch_register_t *reg;
1098 if (!rbitset_is_set(info->last_uses, i))
1101 op = get_irn_n(node, i);
1102 reg = arch_get_irn_register(op);
1103 rbitset_clear(bitset, arch_register_get_index(reg));
1107 static void solve_lpp(ir_nodeset_t *live_nodes, ir_node *node,
1108 unsigned *forbidden_regs, unsigned *live_through_regs)
1110 unsigned *forbidden_edges = rbitset_malloc(n_regs * n_regs);
1111 int *lpp_vars = XMALLOCNZ(int, n_regs*n_regs);
1112 int arity = get_irn_arity(node);
1117 lpp_t *lpp = lpp_new("prefalloc", lpp_minimize);
1118 //lpp_set_time_limit(lpp, 20);
1119 lpp_set_log(lpp, stdout);
1121 /** mark some edges as forbidden */
1122 for (i = 0; i < arity; ++i) {
1123 ir_node *op = get_irn_n(node, i);
1124 const arch_register_t *reg;
1125 const arch_register_req_t *req;
1126 const unsigned *limited;
1127 unsigned current_reg;
1129 if (!arch_irn_consider_in_reg_alloc(cls, op))
1132 req = arch_get_irn_register_req_in(node, i);
1133 if (!(req->type & arch_register_req_type_limited))
1136 limited = req->limited;
1137 reg = arch_get_irn_register(op);
1138 current_reg = arch_register_get_index(reg);
1139 for (r = 0; r < n_regs; ++r) {
1140 if (rbitset_is_set(limited, r))
1143 rbitset_set(forbidden_edges, current_reg*n_regs + r);
1147 /* add all combinations, except for not allowed ones */
1148 for (l = 0; l < n_regs; ++l) {
1149 if (!rbitset_is_set(normal_regs, l)) {
1151 snprintf(name, sizeof(name), "%u_to_%u", l, l);
1152 lpp_vars[l*n_regs+l] = lpp_add_var(lpp, name, lpp_binary, 1);
1156 for (r = 0; r < n_regs; ++r) {
1157 if (!rbitset_is_set(normal_regs, r))
1159 if (rbitset_is_set(forbidden_edges, l*n_regs + r))
1161 /* livethrough values may not use constrained output registers */
1162 if (rbitset_is_set(live_through_regs, l)
1163 && rbitset_is_set(forbidden_regs, r))
1167 snprintf(name, sizeof(name), "%u_to_%u", l, r);
1169 double costs = l==r ? 9 : 8;
1170 lpp_vars[l*n_regs+r]
1171 = lpp_add_var(lpp, name, lpp_binary, costs);
1172 assert(lpp_vars[l*n_regs+r] > 0);
1175 /* add constraints */
1176 for (l = 0; l < n_regs; ++l) {
1178 /* only 1 destination per register */
1180 for (r = 0; r < n_regs; ++r) {
1181 int var = lpp_vars[l*n_regs+r];
1184 if (constraint < 0) {
1186 snprintf(name, sizeof(name), "%u_to_dest", l);
1187 constraint = lpp_add_cst(lpp, name, lpp_equal, 1);
1189 lpp_set_factor_fast(lpp, constraint, var, 1);
1191 /* each destination used by at most 1 value */
1193 for (r = 0; r < n_regs; ++r) {
1194 int var = lpp_vars[r*n_regs+l];
1197 if (constraint < 0) {
1199 snprintf(name, sizeof(name), "one_to_%u", l);
1200 constraint = lpp_add_cst(lpp, name, lpp_less_equal, 1);
1202 lpp_set_factor_fast(lpp, constraint, var, 1);
1206 lpp_dump_plain(lpp, fopen("lppdump.txt", "w"));
1210 unsigned *assignment;
1211 lpp_solve(lpp, be_options.ilp_server, be_options.ilp_solver);
1212 if (!lpp_is_sol_valid(lpp))
1213 panic("ilp solution not valid!");
1215 assignment = ALLOCAN(unsigned, n_regs);
1216 for (l = 0; l < n_regs; ++l) {
1217 unsigned dest_reg = (unsigned)-1;
1218 for (r = 0; r < n_regs; ++r) {
1219 int var = lpp_vars[l*n_regs+r];
1222 double val = lpp_get_var_sol(lpp, var);
1224 assert(dest_reg == (unsigned)-1);
1228 assert(dest_reg != (unsigned)-1);
1229 assignment[dest_reg] = l;
1232 fprintf(stderr, "Assignment: ");
1233 for (l = 0; l < n_regs; ++l) {
1234 fprintf(stderr, "%u ", assignment[l]);
1236 fprintf(stderr, "\n");
1238 permute_values(live_nodes, node, assignment);
1243 static bool is_aligned(unsigned num, unsigned alignment)
1245 unsigned mask = alignment-1;
1246 assert(is_po2(alignment));
1247 return (num&mask) == 0;
1251 * Enforce constraints at a node by live range splits.
1253 * @param live_nodes the set of live nodes, might be changed
1254 * @param node the current node
1256 static void enforce_constraints(ir_nodeset_t *live_nodes, ir_node *node,
1257 unsigned *forbidden_regs)
1259 int arity = get_irn_arity(node);
1261 hungarian_problem_t *bp;
1263 unsigned *assignment;
1266 /* construct a list of register occupied by live-through values */
1267 unsigned *live_through_regs = NULL;
1269 /* see if any use constraints are not met and whether double-width
1270 * values are involved */
1271 bool double_width = false;
1273 for (i = 0; i < arity; ++i) {
1274 ir_node *op = get_irn_n(node, i);
1275 const arch_register_t *reg;
1276 const arch_register_req_t *req;
1277 const unsigned *limited;
1280 if (!arch_irn_consider_in_reg_alloc(cls, op))
1283 /* are there any limitations for the i'th operand? */
1284 req = arch_get_irn_register_req_in(node, i);
1286 double_width = true;
1287 reg = arch_get_irn_register(op);
1288 reg_index = arch_register_get_index(reg);
1289 if (req->type & arch_register_req_type_aligned) {
1290 if (!is_aligned(reg_index, req->width)) {
1295 if (!(req->type & arch_register_req_type_limited))
1298 limited = req->limited;
1299 if (!rbitset_is_set(limited, reg_index)) {
1300 /* found an assignment outside the limited set */
1306 /* is any of the live-throughs using a constrained output register? */
1307 be_foreach_definition(node, cls, value,
1308 if (req_->width > 1)
1309 double_width = true;
1310 if (! (req_->type & arch_register_req_type_limited))
1312 if (live_through_regs == NULL) {
1313 rbitset_alloca(live_through_regs, n_regs);
1314 determine_live_through_regs(live_through_regs, node);
1316 rbitset_or(forbidden_regs, req_->limited, n_regs);
1317 if (rbitsets_have_common(req_->limited, live_through_regs, n_regs))
1324 /* create these arrays if we haven't yet */
1325 if (live_through_regs == NULL) {
1326 rbitset_alloca(live_through_regs, n_regs);
1330 /* only the ILP variant can solve this yet */
1331 solve_lpp(live_nodes, node, forbidden_regs, live_through_regs);
1335 /* at this point we have to construct a bipartite matching problem to see
1336 * which values should go to which registers
1337 * Note: We're building the matrix in "reverse" - source registers are
1338 * right, destinations left because this will produce the solution
1339 * in the format required for permute_values.
1341 bp = hungarian_new(n_regs, n_regs, HUNGARIAN_MATCH_PERFECT);
1343 /* add all combinations, then remove not allowed ones */
1344 for (l = 0; l < n_regs; ++l) {
1345 if (!rbitset_is_set(normal_regs, l)) {
1346 hungarian_add(bp, l, l, 1);
1350 for (r = 0; r < n_regs; ++r) {
1351 if (!rbitset_is_set(normal_regs, r))
1353 /* livethrough values may not use constrainted output registers */
1354 if (rbitset_is_set(live_through_regs, l)
1355 && rbitset_is_set(forbidden_regs, r))
1358 hungarian_add(bp, r, l, l == r ? 9 : 8);
1362 for (i = 0; i < arity; ++i) {
1363 ir_node *op = get_irn_n(node, i);
1364 const arch_register_t *reg;
1365 const arch_register_req_t *req;
1366 const unsigned *limited;
1367 unsigned current_reg;
1369 if (!arch_irn_consider_in_reg_alloc(cls, op))
1372 req = arch_get_irn_register_req_in(node, i);
1373 if (!(req->type & arch_register_req_type_limited))
1376 limited = req->limited;
1377 reg = arch_get_irn_register(op);
1378 current_reg = arch_register_get_index(reg);
1379 for (r = 0; r < n_regs; ++r) {
1380 if (rbitset_is_set(limited, r))
1382 hungarian_remove(bp, r, current_reg);
1386 //hungarian_print_cost_matrix(bp, 1);
1387 hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
1389 assignment = ALLOCAN(unsigned, n_regs);
1390 res = hungarian_solve(bp, assignment, NULL, 0);
1394 fprintf(stderr, "Swap result:");
1395 for (i = 0; i < (int) n_regs; ++i) {
1396 fprintf(stderr, " %d", assignment[i]);
1398 fprintf(stderr, "\n");
1403 permute_values(live_nodes, node, assignment);
1406 /** test whether a node @p n is a copy of the value of node @p of */
1407 static bool is_copy_of(ir_node *value, ir_node *test_value)
1409 allocation_info_t *test_info;
1410 allocation_info_t *info;
1412 if (value == test_value)
1415 info = get_allocation_info(value);
1416 test_info = get_allocation_info(test_value);
1417 return test_info->original_value == info->original_value;
1421 * find a value in the end-assignment of a basic block
1422 * @returns the index into the assignment array if found
1425 static int find_value_in_block_info(block_info_t *info, ir_node *value)
1428 ir_node **end_assignments = info->assignments;
1429 for (r = 0; r < n_regs; ++r) {
1430 ir_node *a_value = end_assignments[r];
1432 if (a_value == NULL)
1434 if (is_copy_of(a_value, value))
1442 * Create the necessary permutations at the end of a basic block to fullfill
1443 * the register assignment for phi-nodes in the next block
1445 static void add_phi_permutations(ir_node *block, int p)
1448 unsigned *permutation;
1449 ir_node **old_assignments;
1450 bool need_permutation;
1452 ir_node *pred = get_Block_cfgpred_block(block, p);
1454 block_info_t *pred_info = get_block_info(pred);
1456 /* predecessor not processed yet? nothing to do */
1457 if (!pred_info->processed)
1460 permutation = ALLOCAN(unsigned, n_regs);
1461 for (r = 0; r < n_regs; ++r) {
1465 /* check phi nodes */
1466 need_permutation = false;
1467 phi = sched_first(block);
1468 for ( ; is_Phi(phi); phi = sched_next(phi)) {
1469 const arch_register_t *reg;
1470 const arch_register_t *op_reg;
1475 if (!arch_irn_consider_in_reg_alloc(cls, phi))
1478 op = get_Phi_pred(phi, p);
1479 a = find_value_in_block_info(pred_info, op);
1482 reg = arch_get_irn_register(phi);
1483 regn = arch_register_get_index(reg);
1484 /* same register? nothing to do */
1488 op = pred_info->assignments[a];
1489 op_reg = arch_get_irn_register(op);
1490 /* virtual or joker registers are ok too */
1491 if ((op_reg->type & arch_register_type_joker)
1492 || (op_reg->type & arch_register_type_virtual))
1495 permutation[regn] = a;
1496 need_permutation = true;
1499 if (need_permutation) {
1500 /* permute values at end of predecessor */
1501 old_assignments = assignments;
1502 assignments = pred_info->assignments;
1503 permute_values(NULL, be_get_end_of_block_insertion_point(pred),
1505 assignments = old_assignments;
1508 /* change phi nodes to use the copied values */
1509 phi = sched_first(block);
1510 for ( ; is_Phi(phi); phi = sched_next(phi)) {
1514 if (!arch_irn_consider_in_reg_alloc(cls, phi))
1517 op = get_Phi_pred(phi, p);
1519 /* we have permuted all values into the correct registers so we can
1520 simply query which value occupies the phis register in the
1522 a = arch_register_get_index(arch_get_irn_register(phi));
1523 op = pred_info->assignments[a];
1524 set_Phi_pred(phi, p, op);
1529 * Set preferences for a phis register based on the registers used on the
1532 static void adapt_phi_prefs(ir_node *phi)
1535 int arity = get_irn_arity(phi);
1536 ir_node *block = get_nodes_block(phi);
1537 allocation_info_t *info = get_allocation_info(phi);
1539 for (i = 0; i < arity; ++i) {
1540 ir_node *op = get_irn_n(phi, i);
1541 const arch_register_t *reg = arch_get_irn_register(op);
1542 ir_node *pred_block;
1543 block_info_t *pred_block_info;
1549 /* we only give the bonus if the predecessor already has registers
1550 * assigned, otherwise we only see a dummy value
1551 * and any conclusions about its register are useless */
1552 pred_block = get_Block_cfgpred_block(block, i);
1553 pred_block_info = get_block_info(pred_block);
1554 if (!pred_block_info->processed)
1557 /* give bonus for already assigned register */
1558 weight = (float)get_block_execfreq(execfreqs, pred_block);
1559 r = arch_register_get_index(reg);
1560 info->prefs[r] += weight * AFF_PHI;
1565 * After a phi has been assigned a register propagate preference inputs
1566 * to the phi inputs.
1568 static void propagate_phi_register(ir_node *phi, unsigned assigned_r)
1571 ir_node *block = get_nodes_block(phi);
1572 int arity = get_irn_arity(phi);
1574 for (i = 0; i < arity; ++i) {
1575 ir_node *op = get_Phi_pred(phi, i);
1576 allocation_info_t *info = get_allocation_info(op);
1577 ir_node *pred_block = get_Block_cfgpred_block(block, i);
1580 = (float)get_block_execfreq(execfreqs, pred_block) * AFF_PHI;
1582 if (info->prefs[assigned_r] >= weight)
1585 /* promote the prefered register */
1586 for (r = 0; r < n_regs; ++r) {
1587 if (info->prefs[r] > -weight) {
1588 info->prefs[r] = -weight;
1591 info->prefs[assigned_r] = weight;
1594 propagate_phi_register(op, assigned_r);
1598 static void assign_phi_registers(ir_node *block)
1603 unsigned *assignment;
1604 hungarian_problem_t *bp;
1606 /* count phi nodes */
1607 sched_foreach(block, node) {
1610 if (!arch_irn_consider_in_reg_alloc(cls, node))
1618 /* build a bipartite matching problem for all phi nodes */
1619 bp = hungarian_new(n_phis, n_regs, HUNGARIAN_MATCH_PERFECT);
1621 sched_foreach(block, node) {
1624 allocation_info_t *info;
1627 if (!arch_irn_consider_in_reg_alloc(cls, node))
1630 /* give boni for predecessor colorings */
1631 adapt_phi_prefs(node);
1632 /* add stuff to bipartite problem */
1633 info = get_allocation_info(node);
1634 DB((dbg, LEVEL_3, "Prefs for %+F: ", node));
1635 for (r = 0; r < n_regs; ++r) {
1638 if (!rbitset_is_set(normal_regs, r))
1641 costs = info->prefs[r];
1642 costs = costs < 0 ? -logf(-costs+1) : logf(costs+1);
1645 hungarian_add(bp, n, r, (int)costs);
1646 DB((dbg, LEVEL_3, " %s(%f)", arch_register_for_index(cls, r)->name,
1649 DB((dbg, LEVEL_3, "\n"));
1653 //hungarian_print_cost_matrix(bp, 7);
1654 hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
1656 assignment = ALLOCAN(unsigned, n_regs);
1657 res = hungarian_solve(bp, assignment, NULL, 0);
1662 sched_foreach(block, node) {
1664 const arch_register_t *reg;
1668 if (!arch_irn_consider_in_reg_alloc(cls, node))
1671 r = assignment[n++];
1672 assert(rbitset_is_set(normal_regs, r));
1673 reg = arch_register_for_index(cls, r);
1674 DB((dbg, LEVEL_2, "Assign %+F -> %s\n", node, reg->name));
1677 /* adapt preferences for phi inputs */
1678 if (propagate_phi_registers)
1679 propagate_phi_register(node, r);
1684 * Walker: assign registers to all nodes of a block that
1685 * need registers from the currently considered register class.
1687 static void allocate_coalesce_block(ir_node *block, void *data)
1689 ir_nodeset_t live_nodes;
1691 block_info_t *block_info;
1692 block_info_t **pred_block_infos;
1694 unsigned *forbidden_regs; /**< collects registers which must
1695 not be used for optimistic splits */
1698 DB((dbg, LEVEL_2, "* Block %+F\n", block));
1700 /* clear assignments */
1701 block_info = get_block_info(block);
1702 assignments = block_info->assignments;
1704 ir_nodeset_init(&live_nodes);
1706 /* gather regalloc infos of predecessor blocks */
1707 n_preds = get_Block_n_cfgpreds(block);
1708 pred_block_infos = ALLOCAN(block_info_t*, n_preds);
1709 for (int i = 0; i < n_preds; ++i) {
1710 ir_node *pred = get_Block_cfgpred_block(block, i);
1711 block_info_t *pred_info = get_block_info(pred);
1712 pred_block_infos[i] = pred_info;
1715 phi_ins = ALLOCAN(ir_node*, n_preds);
1717 /* collect live-in nodes and preassigned values */
1718 be_lv_foreach(lv, block, be_lv_state_in, node) {
1719 bool need_phi = false;
1720 const arch_register_req_t *req;
1721 const arch_register_t *reg;
1724 req = arch_get_irn_register_req(node);
1725 if (req->cls != cls)
1728 if (req->type & arch_register_req_type_ignore) {
1729 allocation_info_t *info = get_allocation_info(node);
1730 info->current_value = node;
1732 reg = arch_get_irn_register(node);
1733 assert(reg != NULL); /* ignore values must be preassigned */
1738 /* check all predecessors for this value, if it is not everywhere the
1739 same or unknown then we have to construct a phi
1740 (we collect the potential phi inputs here) */
1741 for (p = 0; p < n_preds; ++p) {
1742 block_info_t *pred_info = pred_block_infos[p];
1744 if (!pred_info->processed) {
1745 /* use node for now, it will get fixed later */
1749 int a = find_value_in_block_info(pred_info, node);
1751 /* must live out of predecessor */
1753 phi_ins[p] = pred_info->assignments[a];
1754 /* different value from last time? then we need a phi */
1755 if (p > 0 && phi_ins[p-1] != phi_ins[p]) {
1762 ir_mode *mode = get_irn_mode(node);
1763 ir_node *phi = be_new_Phi(block, n_preds, phi_ins, mode,
1766 DB((dbg, LEVEL_3, "Create Phi %+F (for %+F) -", phi, node));
1767 #ifdef DEBUG_libfirm
1770 for (pi = 0; pi < n_preds; ++pi) {
1771 DB((dbg, LEVEL_3, " %+F", phi_ins[pi]));
1773 DB((dbg, LEVEL_3, "\n"));
1776 mark_as_copy_of(phi, node);
1777 sched_add_after(block, phi);
1781 allocation_info_t *info = get_allocation_info(node);
1782 info->current_value = phi_ins[0];
1784 /* Grab 1 of the inputs we constructed (might not be the same as
1785 * "node" as we could see the same copy of the value in all
1790 /* if the node already has a register assigned use it */
1791 reg = arch_get_irn_register(node);
1796 /* remember that this node is live at the beginning of the block */
1797 ir_nodeset_insert(&live_nodes, node);
1800 rbitset_alloca(forbidden_regs, n_regs);
1802 /* handle phis... */
1803 assign_phi_registers(block);
1805 /* all live-ins must have a register */
1806 #ifdef DEBUG_libfirm
1808 ir_nodeset_iterator_t iter;
1810 foreach_ir_nodeset(&live_nodes, node, iter) {
1811 const arch_register_t *reg = arch_get_irn_register(node);
1812 assert(reg != NULL);
1817 /* assign instructions in the block */
1818 sched_foreach(block, node) {
1822 /* phis are already assigned */
1826 rewire_inputs(node);
1828 /* enforce use constraints */
1829 rbitset_clear_all(forbidden_regs, n_regs);
1830 enforce_constraints(&live_nodes, node, forbidden_regs);
1832 rewire_inputs(node);
1834 /* we may not use registers used for inputs for optimistic splits */
1835 arity = get_irn_arity(node);
1836 for (int i = 0; i < arity; ++i) {
1837 ir_node *op = get_irn_n(node, i);
1838 const arch_register_t *reg;
1839 if (!arch_irn_consider_in_reg_alloc(cls, op))
1842 reg = arch_get_irn_register(op);
1843 rbitset_set(forbidden_regs, arch_register_get_index(reg));
1846 /* free registers of values last used at this instruction */
1847 free_last_uses(&live_nodes, node);
1849 /* assign output registers */
1850 be_foreach_definition_(node, cls, value,
1851 assign_reg(block, value, forbidden_regs);
1855 ir_nodeset_destroy(&live_nodes);
1858 block_info->processed = true;
1860 /* permute values at end of predecessor blocks in case of phi-nodes */
1863 for (p = 0; p < n_preds; ++p) {
1864 add_phi_permutations(block, p);
1868 /* if we have exactly 1 successor then we might be able to produce phi
1870 if (get_irn_n_edges_kind(block, EDGE_KIND_BLOCK) == 1) {
1871 const ir_edge_t *edge
1872 = get_irn_out_edge_first_kind(block, EDGE_KIND_BLOCK);
1873 ir_node *succ = get_edge_src_irn(edge);
1874 int p = get_edge_src_pos(edge);
1875 block_info_t *succ_info = get_block_info(succ);
1877 if (succ_info->processed) {
1878 add_phi_permutations(succ, p);
1883 typedef struct block_costs_t block_costs_t;
1884 struct block_costs_t {
1885 float costs; /**< costs of the block */
1886 int dfs_num; /**< depth first search number (to detect backedges) */
1889 static int cmp_block_costs(const void *d1, const void *d2)
1891 const ir_node * const *block1 = (const ir_node**)d1;
1892 const ir_node * const *block2 = (const ir_node**)d2;
1893 const block_costs_t *info1 = (const block_costs_t*)get_irn_link(*block1);
1894 const block_costs_t *info2 = (const block_costs_t*)get_irn_link(*block2);
1895 return QSORT_CMP(info2->costs, info1->costs);
1898 static void determine_block_order(void)
1901 ir_node **blocklist = be_get_cfgpostorder(irg);
1902 size_t n_blocks = ARR_LEN(blocklist);
1904 pdeq *worklist = new_pdeq();
1905 ir_node **order = XMALLOCN(ir_node*, n_blocks);
1908 /* clear block links... */
1909 for (p = 0; p < n_blocks; ++p) {
1910 ir_node *block = blocklist[p];
1911 set_irn_link(block, NULL);
1914 /* walk blocks in reverse postorder, the costs for each block are the
1915 * sum of the costs of its predecessors (excluding the costs on backedges
1916 * which we can't determine) */
1917 for (p = n_blocks; p > 0;) {
1918 block_costs_t *cost_info;
1919 ir_node *block = blocklist[--p];
1921 float execfreq = (float)get_block_execfreq(execfreqs, block);
1922 float costs = execfreq;
1923 int n_cfgpreds = get_Block_n_cfgpreds(block);
1925 for (p2 = 0; p2 < n_cfgpreds; ++p2) {
1926 ir_node *pred_block = get_Block_cfgpred_block(block, p2);
1927 block_costs_t *pred_costs = (block_costs_t*)get_irn_link(pred_block);
1928 /* we don't have any info for backedges */
1929 if (pred_costs == NULL)
1931 costs += pred_costs->costs;
1934 cost_info = OALLOCZ(&obst, block_costs_t);
1935 cost_info->costs = costs;
1936 cost_info->dfs_num = dfs_num++;
1937 set_irn_link(block, cost_info);
1940 /* sort array by block costs */
1941 qsort(blocklist, n_blocks, sizeof(blocklist[0]), cmp_block_costs);
1943 ir_reserve_resources(irg, IR_RESOURCE_BLOCK_VISITED);
1944 inc_irg_block_visited(irg);
1946 for (p = 0; p < n_blocks; ++p) {
1947 ir_node *block = blocklist[p];
1948 if (Block_block_visited(block))
1951 /* continually add predecessors with highest costs to worklist
1952 * (without using backedges) */
1954 block_costs_t *info = (block_costs_t*)get_irn_link(block);
1955 ir_node *best_pred = NULL;
1956 float best_costs = -1;
1957 int n_cfgpred = get_Block_n_cfgpreds(block);
1960 pdeq_putr(worklist, block);
1961 mark_Block_block_visited(block);
1962 for (i = 0; i < n_cfgpred; ++i) {
1963 ir_node *pred_block = get_Block_cfgpred_block(block, i);
1964 block_costs_t *pred_info = (block_costs_t*)get_irn_link(pred_block);
1966 /* ignore backedges */
1967 if (pred_info->dfs_num > info->dfs_num)
1970 if (info->costs > best_costs) {
1971 best_costs = info->costs;
1972 best_pred = pred_block;
1976 } while (block != NULL && !Block_block_visited(block));
1978 /* now put all nodes in the worklist in our final order */
1979 while (!pdeq_empty(worklist)) {
1980 ir_node *pblock = (ir_node*)pdeq_getr(worklist);
1981 assert(order_p < n_blocks);
1982 order[order_p++] = pblock;
1985 assert(order_p == n_blocks);
1988 ir_free_resources(irg, IR_RESOURCE_BLOCK_VISITED);
1990 DEL_ARR_F(blocklist);
1992 obstack_free(&obst, NULL);
1993 obstack_init(&obst);
1995 block_order = order;
1996 n_block_order = n_blocks;
2000 * Run the register allocator for the current register class.
2002 static void be_pref_alloc_cls(void)
2006 be_assure_live_sets(irg);
2007 lv = be_get_irg_liveness(irg);
2009 ir_reserve_resources(irg, IR_RESOURCE_IRN_LINK);
2011 DB((dbg, LEVEL_2, "=== Allocating registers of %s ===\n", cls->name));
2013 be_clear_links(irg);
2015 irg_block_walk_graph(irg, NULL, analyze_block, NULL);
2016 if (create_congruence_classes)
2017 combine_congruence_classes();
2019 for (i = 0; i < n_block_order; ++i) {
2020 ir_node *block = block_order[i];
2021 allocate_coalesce_block(block, NULL);
2024 ir_free_resources(irg, IR_RESOURCE_IRN_LINK);
2027 static void dump(int mask, ir_graph *irg, const char *suffix)
2029 if (be_options.dump_flags & mask)
2030 dump_ir_graph(irg, suffix);
2034 * Run the spiller on the current graph.
2036 static void spill(void)
2038 /* make sure all nodes show their real register pressure */
2039 be_timer_push(T_RA_CONSTR);
2040 be_pre_spill_prepare_constr(irg, cls);
2041 be_timer_pop(T_RA_CONSTR);
2043 dump(DUMP_RA, irg, "spillprepare");
2046 be_timer_push(T_RA_SPILL);
2047 be_do_spill(irg, cls);
2048 be_timer_pop(T_RA_SPILL);
2050 be_timer_push(T_RA_SPILL_APPLY);
2051 check_for_memory_operands(irg);
2052 be_timer_pop(T_RA_SPILL_APPLY);
2054 dump(DUMP_RA, irg, "spill");
2058 * The pref register allocator for a whole procedure.
2060 static void be_pref_alloc(ir_graph *new_irg)
2062 const arch_env_t *arch_env = be_get_irg_arch_env(new_irg);
2063 int n_cls = arch_env->n_register_classes;
2066 obstack_init(&obst);
2069 execfreqs = be_get_irg_exec_freq(irg);
2071 /* determine a good coloring order */
2072 determine_block_order();
2074 for (c = 0; c < n_cls; ++c) {
2075 cls = &arch_env->register_classes[c];
2076 if (arch_register_class_flags(cls) & arch_register_class_flag_manual_ra)
2079 stat_ev_ctx_push_str("regcls", cls->name);
2081 n_regs = arch_register_class_n_regs(cls);
2082 normal_regs = rbitset_malloc(n_regs);
2083 be_set_allocatable_regs(irg, cls, normal_regs);
2087 /* verify schedule and register pressure */
2088 be_timer_push(T_VERIFY);
2089 if (be_options.verify_option == BE_VERIFY_WARN) {
2090 be_verify_schedule(irg);
2091 be_verify_register_pressure(irg, cls);
2092 } else if (be_options.verify_option == BE_VERIFY_ASSERT) {
2093 assert(be_verify_schedule(irg) && "Schedule verification failed");
2094 assert(be_verify_register_pressure(irg, cls)
2095 && "Register pressure verification failed");
2097 be_timer_pop(T_VERIFY);
2099 be_timer_push(T_RA_COLOR);
2100 be_pref_alloc_cls();
2101 be_timer_pop(T_RA_COLOR);
2103 /* we most probably constructed new Phis so liveness info is invalid
2105 be_invalidate_live_sets(irg);
2108 stat_ev_ctx_pop("regcls");
2111 be_timer_push(T_RA_SPILL_APPLY);
2112 be_abi_fix_stack_nodes(irg);
2113 be_timer_pop(T_RA_SPILL_APPLY);
2115 be_timer_push(T_VERIFY);
2116 if (be_options.verify_option == BE_VERIFY_WARN) {
2117 be_verify_register_allocation(irg);
2118 } else if (be_options.verify_option == BE_VERIFY_ASSERT) {
2119 assert(be_verify_register_allocation(irg)
2120 && "Register allocation invalid");
2122 be_timer_pop(T_VERIFY);
2124 obstack_free(&obst, NULL);
2127 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_pref_alloc)
2128 void be_init_pref_alloc(void)
2130 static be_ra_t be_ra_pref = {
2133 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
2134 lc_opt_entry_t *prefalloc_group = lc_opt_get_grp(be_grp, "prefalloc");
2135 lc_opt_add_table(prefalloc_group, options);
2137 be_register_allocator("pref", &be_ra_pref);
2138 FIRM_DBG_REGISTER(dbg, "firm.be.prefalloc");