2 * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Preference Guided Register Assignment
23 * @author Matthias Braun
26 * The idea is to allocate registers in 2 passes:
27 * 1. A first pass to determine "preferred" registers for live-ranges. This
28 * calculates for each register and each live-range a value indicating
29 * the usefulness. (You can roughly think of the value as the negative
30 * costs needed for copies when the value is in the specific registers...)
32 * 2. Walk blocks and assigns registers in a greedy fashion. Preferring
33 * registers with high preferences. When register constraints are not met,
34 * add copies and split live-ranges.
37 * - make use of free registers in the permute_values code
50 #include "iredges_t.h"
51 #include "irgraph_t.h"
59 #include "raw_bitset.h"
60 #include "unionfind.h"
62 #include "hungarian.h"
65 #include "bechordal_t.h"
74 #include "bespillutil.h"
79 #define USE_FACTOR 1.0f
80 #define DEF_FACTOR 1.0f
81 #define NEIGHBOR_FACTOR 0.2f
82 #define AFF_SHOULD_BE_SAME 0.5f
84 #define SPLIT_DELTA 1.0f
85 #define MAX_OPTIMISTIC_SPLIT_RECURSION 0
87 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
89 static struct obstack obst;
91 static const arch_register_class_t *cls;
93 static unsigned n_regs;
94 static unsigned *normal_regs;
95 static int *congruence_classes;
96 static ir_node **block_order;
97 static size_t n_block_order;
99 /** currently active assignments (while processing a basic block)
100 * maps registers to values(their current copies) */
101 static ir_node **assignments;
104 * allocation information: last_uses, register preferences
105 * the information is per firm-node.
107 struct allocation_info_t {
108 unsigned last_uses[2]; /**< bitset indicating last uses (input pos) */
109 ir_node *current_value; /**< copy of the value that should be used */
110 ir_node *original_value; /**< for copies point to original value */
111 float prefs[]; /**< register preferences */
113 typedef struct allocation_info_t allocation_info_t;
115 /** helper datastructure used when sorting register preferences */
120 typedef struct reg_pref_t reg_pref_t;
122 /** per basic-block information */
123 struct block_info_t {
124 bool processed; /**< indicate whether block is processed */
125 ir_node *assignments[]; /**< register assignments at end of block */
127 typedef struct block_info_t block_info_t;
130 * Get the allocation info for a node.
131 * The info is allocated on the first visit of a node.
133 static allocation_info_t *get_allocation_info(ir_node *node)
135 allocation_info_t *info = (allocation_info_t*)get_irn_link(node);
137 info = OALLOCFZ(&obst, allocation_info_t, prefs, n_regs);
138 info->current_value = node;
139 info->original_value = node;
140 set_irn_link(node, info);
146 static allocation_info_t *try_get_allocation_info(const ir_node *node)
148 return (allocation_info_t*) get_irn_link(node);
152 * Get allocation information for a basic block
154 static block_info_t *get_block_info(ir_node *block)
156 block_info_t *info = (block_info_t*)get_irn_link(block);
158 assert(is_Block(block));
160 info = OALLOCFZ(&obst, block_info_t, assignments, n_regs);
161 set_irn_link(block, info);
168 * Link the allocation info of a node to a copy.
169 * Afterwards, both nodes uses the same allocation info.
170 * Copy must not have an allocation info assigned yet.
172 * @param copy the node that gets the allocation info assigned
173 * @param value the original node
175 static void mark_as_copy_of(ir_node *copy, ir_node *value)
177 allocation_info_t *info = get_allocation_info(value);
178 allocation_info_t *copy_info = get_allocation_info(copy);
180 /* find original value */
181 ir_node *original = info->original_value;
182 if (original != value) {
183 info = get_allocation_info(original);
186 assert(info->original_value == original);
187 info->current_value = copy;
189 /* the copy should not be linked to something else yet */
190 assert(copy_info->original_value == copy);
191 copy_info->original_value = original;
193 /* copy over allocation preferences */
194 memcpy(copy_info->prefs, info->prefs, n_regs * sizeof(copy_info->prefs[0]));
198 * Calculate the penalties for every register on a node and its live neighbors.
200 * @param live_nodes the set of live nodes at the current position, may be NULL
201 * @param penalty the penalty to subtract from
202 * @param limited a raw bitset containing the limited set for the node
203 * @param node the node
205 static void give_penalties_for_limits(const ir_nodeset_t *live_nodes,
206 float penalty, const unsigned* limited,
209 allocation_info_t *info = get_allocation_info(node);
211 /* give penalty for all forbidden regs */
212 for (unsigned r = 0; r < n_regs; ++r) {
213 if (rbitset_is_set(limited, r))
216 info->prefs[r] -= penalty;
219 /* all other live values should get a penalty for allowed regs */
220 if (live_nodes == NULL)
223 penalty *= NEIGHBOR_FACTOR;
224 size_t n_allowed = rbitset_popcount(limited, n_regs);
226 /* only create a very weak penalty if multiple regs are allowed */
227 penalty = (penalty * 0.8f) / n_allowed;
229 foreach_ir_nodeset(live_nodes, neighbor, iter) {
230 allocation_info_t *neighbor_info;
232 /* TODO: if op is used on multiple inputs we might not do a
234 if (neighbor == node)
237 neighbor_info = get_allocation_info(neighbor);
238 for (unsigned r = 0; r < n_regs; ++r) {
239 if (!rbitset_is_set(limited, r))
242 neighbor_info->prefs[r] -= penalty;
248 * Calculate the preferences of a definition for the current register class.
249 * If the definition uses a limited set of registers, reduce the preferences
250 * for the limited register on the node and its neighbors.
252 * @param live_nodes the set of live nodes at the current node
253 * @param weight the weight
254 * @param node the current node
256 static void check_defs(const ir_nodeset_t *live_nodes, float weight,
259 const arch_register_req_t *req = arch_get_irn_register_req(node);
260 if (arch_register_req_is(req, limited)) {
261 const unsigned *limited = req->limited;
262 float penalty = weight * DEF_FACTOR;
263 give_penalties_for_limits(live_nodes, penalty, limited, node);
266 if (arch_register_req_is(req, should_be_same)) {
267 ir_node *insn = skip_Proj(node);
268 allocation_info_t *info = get_allocation_info(node);
269 int arity = get_irn_arity(insn);
271 float factor = 1.0f / rbitset_popcount(&req->other_same, arity);
272 for (int i = 0; i < arity; ++i) {
273 if (!rbitset_is_set(&req->other_same, i))
276 ir_node *op = get_irn_n(insn, i);
278 /* if we the value at the should_be_same input doesn't die at the
279 * node, then it is no use to propagate the constraints (since a
280 * copy will emerge anyway) */
281 if (ir_nodeset_contains(live_nodes, op))
284 allocation_info_t *op_info = get_allocation_info(op);
285 for (unsigned r = 0; r < n_regs; ++r) {
286 op_info->prefs[r] += info->prefs[r] * factor;
293 * Walker: Runs an a block calculates the preferences for any
294 * node and every register from the considered register class.
296 static void analyze_block(ir_node *block, void *data)
298 float weight = (float)get_block_execfreq(block);
299 ir_nodeset_t live_nodes;
302 ir_nodeset_init(&live_nodes);
303 be_liveness_end_of_block(lv, cls, block, &live_nodes);
305 sched_foreach_reverse(block, node) {
309 be_foreach_definition(node, cls, value,
310 check_defs(&live_nodes, weight, value);
314 int arity = get_irn_arity(node);
316 /* the allocation info node currently only uses 1 unsigned value
317 to mark last used inputs. So we will fail for a node with more than
319 allocation_info_t *info = get_allocation_info(node);
320 if (arity >= (int) sizeof(info->last_uses) * 8) {
321 panic("Node with more than %d inputs not supported yet",
322 (int) sizeof(info->last_uses) * 8);
325 for (int i = 0; i < arity; ++i) {
326 ir_node *op = get_irn_n(node, i);
327 const arch_register_req_t *req = arch_get_irn_register_req(op);
331 /* last usage of a value? */
332 if (!ir_nodeset_contains(&live_nodes, op)) {
333 rbitset_set(info->last_uses, i);
337 be_liveness_transfer(cls, node, &live_nodes);
339 /* update weights based on usage constraints */
340 for (int i = 0; i < arity; ++i) {
341 ir_node *op = get_irn_n(node, i);
342 if (!arch_irn_consider_in_reg_alloc(cls, op))
345 const arch_register_req_t *req
346 = arch_get_irn_register_req_in(node, i);
347 if (!arch_register_req_is(req, limited))
350 const unsigned *limited = req->limited;
351 give_penalties_for_limits(&live_nodes, weight * USE_FACTOR,
356 ir_nodeset_destroy(&live_nodes);
359 static void congruence_def(ir_nodeset_t *live_nodes, const ir_node *node)
361 const arch_register_req_t *req = arch_get_irn_register_req(node);
363 /* should be same constraint? */
364 if (arch_register_req_is(req, should_be_same)) {
365 const ir_node *insn = skip_Proj_const(node);
366 int arity = get_irn_arity(insn);
367 unsigned node_idx = get_irn_idx(node);
368 node_idx = uf_find(congruence_classes, node_idx);
370 for (int i = 0; i < arity; ++i) {
371 if (!rbitset_is_set(&req->other_same, i))
374 ir_node *op = get_irn_n(insn, i);
375 int op_idx = get_irn_idx(op);
376 op_idx = uf_find(congruence_classes, op_idx);
378 /* do we interfere with the value */
379 bool interferes = false;
380 foreach_ir_nodeset(live_nodes, live, iter) {
381 int lv_idx = get_irn_idx(live);
382 lv_idx = uf_find(congruence_classes, lv_idx);
383 if (lv_idx == op_idx) {
388 /* don't put in same affinity class if we interfere */
392 uf_union(congruence_classes, node_idx, op_idx);
393 DB((dbg, LEVEL_3, "Merge %+F and %+F congruence classes\n",
395 /* one should_be_same is enough... */
401 static void create_congruence_class(ir_node *block, void *data)
403 ir_nodeset_t live_nodes;
406 ir_nodeset_init(&live_nodes);
407 be_liveness_end_of_block(lv, cls, block, &live_nodes);
409 /* check should be same constraints */
410 ir_node *last_phi = NULL;
411 sched_foreach_reverse(block, node) {
417 be_foreach_definition(node, cls, value,
418 congruence_def(&live_nodes, value);
420 be_liveness_transfer(cls, node, &live_nodes);
423 ir_nodeset_destroy(&live_nodes);
427 /* check phi congruence classes */
428 sched_foreach_reverse_from(last_phi, phi) {
431 if (!arch_irn_consider_in_reg_alloc(cls, phi))
434 int node_idx = get_irn_idx(phi);
435 node_idx = uf_find(congruence_classes, node_idx);
437 int arity = get_irn_arity(phi);
438 for (int i = 0; i < arity; ++i) {
439 ir_node *op = get_Phi_pred(phi, i);
440 int op_idx = get_irn_idx(op);
441 op_idx = uf_find(congruence_classes, op_idx);
443 /* do we interfere with the value */
444 bool interferes = false;
445 foreach_ir_nodeset(&live_nodes, live, iter) {
446 int lv_idx = get_irn_idx(live);
447 lv_idx = uf_find(congruence_classes, lv_idx);
448 if (lv_idx == op_idx) {
453 /* don't put in same affinity class if we interfere */
456 /* any other phi has the same input? */
457 sched_foreach(block, phi) {
462 if (!arch_irn_consider_in_reg_alloc(cls, phi))
464 oop = get_Phi_pred(phi, i);
467 oop_idx = get_irn_idx(oop);
468 oop_idx = uf_find(congruence_classes, oop_idx);
469 if (oop_idx == op_idx) {
477 /* merge the 2 congruence classes and sum up their preferences */
478 int old_node_idx = node_idx;
479 node_idx = uf_union(congruence_classes, node_idx, op_idx);
480 DB((dbg, LEVEL_3, "Merge %+F and %+F congruence classes\n",
483 old_node_idx = node_idx == old_node_idx ? op_idx : old_node_idx;
484 allocation_info_t *head_info
485 = get_allocation_info(get_idx_irn(irg, node_idx));
486 allocation_info_t *other_info
487 = get_allocation_info(get_idx_irn(irg, old_node_idx));
488 for (unsigned r = 0; r < n_regs; ++r) {
489 head_info->prefs[r] += other_info->prefs[r];
493 ir_nodeset_destroy(&live_nodes);
496 static void set_congruence_prefs(ir_node *node, void *data)
499 unsigned node_idx = get_irn_idx(node);
500 unsigned node_set = uf_find(congruence_classes, node_idx);
502 /* head of congruence class or not in any class */
503 if (node_set == node_idx)
506 if (!arch_irn_consider_in_reg_alloc(cls, node))
509 ir_node *head = get_idx_irn(irg, node_set);
510 allocation_info_t *head_info = get_allocation_info(head);
511 allocation_info_t *info = get_allocation_info(node);
513 memcpy(info->prefs, head_info->prefs, n_regs * sizeof(info->prefs[0]));
516 static void combine_congruence_classes(void)
518 size_t n = get_irg_last_idx(irg);
519 congruence_classes = XMALLOCN(int, n);
520 uf_init(congruence_classes, n);
522 /* create congruence classes */
523 irg_block_walk_graph(irg, create_congruence_class, NULL, NULL);
524 /* merge preferences */
525 irg_walk_graph(irg, set_congruence_prefs, NULL, NULL);
526 free(congruence_classes);
532 * Assign register reg to the given node.
534 * @param node the node
535 * @param reg the register
537 static void use_reg(ir_node *node, const arch_register_t *reg, unsigned width)
539 unsigned r = reg->index;
540 for (unsigned r0 = r; r0 < r + width; ++r0)
541 assignments[r0] = node;
542 arch_set_irn_register(node, reg);
545 static void free_reg_of_value(ir_node *node)
547 if (!arch_irn_consider_in_reg_alloc(cls, node))
550 const arch_register_t *reg = arch_get_irn_register(node);
551 const arch_register_req_t *req = arch_get_irn_register_req(node);
552 unsigned r = reg->index;
553 /* assignment->value may be NULL if a value is used at 2 inputs
554 * so it gets freed twice. */
555 for (unsigned r0 = r; r0 < r + req->width; ++r0) {
556 assert(assignments[r0] == node || assignments[r0] == NULL);
557 assignments[r0] = NULL;
562 * Compare two register preferences in decreasing order.
564 static int compare_reg_pref(const void *e1, const void *e2)
566 const reg_pref_t *rp1 = (const reg_pref_t*) e1;
567 const reg_pref_t *rp2 = (const reg_pref_t*) e2;
568 if (rp1->pref < rp2->pref)
570 if (rp1->pref > rp2->pref)
575 static void fill_sort_candidates(reg_pref_t *regprefs,
576 const allocation_info_t *info)
578 for (unsigned r = 0; r < n_regs; ++r) {
579 float pref = info->prefs[r];
581 regprefs[r].pref = pref;
583 /* TODO: use a stable sort here to avoid unnecessary register jumping */
584 qsort(regprefs, n_regs, sizeof(regprefs[0]), compare_reg_pref);
587 static bool try_optimistic_split(ir_node *to_split, ir_node *before,
588 float pref, float pref_delta,
589 unsigned *forbidden_regs, int recursion)
593 allocation_info_t *info = get_allocation_info(to_split);
596 /* stupid hack: don't optimisticallt split don't spill nodes...
597 * (so we don't split away the values produced because of
598 * must_be_different constraints) */
599 ir_node *original_insn = skip_Proj(info->original_value);
600 if (arch_get_irn_flags(original_insn) & arch_irn_flags_dont_spill)
603 const arch_register_t *from_reg = arch_get_irn_register(to_split);
604 unsigned from_r = from_reg->index;
605 ir_node *block = get_nodes_block(before);
606 float split_threshold = (float)get_block_execfreq(block) * SPLIT_DELTA;
608 if (pref_delta < split_threshold*0.5)
611 /* find the best free position where we could move to */
612 reg_pref_t *prefs = ALLOCAN(reg_pref_t, n_regs);
613 fill_sort_candidates(prefs, info);
615 for (i = 0; i < n_regs; ++i) {
616 /* we need a normal register which is not an output register
617 an different from the current register of to_split */
619 if (!rbitset_is_set(normal_regs, r))
621 if (rbitset_is_set(forbidden_regs, r))
626 /* is the split worth it? */
627 delta = pref_delta + prefs[i].pref;
628 if (delta < split_threshold) {
629 DB((dbg, LEVEL_3, "Not doing optimistical split of %+F (depth %d), win %f too low\n",
630 to_split, recursion, delta));
634 /* if the register is free then we can do the split */
635 if (assignments[r] == NULL)
638 /* otherwise we might try recursively calling optimistic_split */
639 if (recursion+1 > MAX_OPTIMISTIC_SPLIT_RECURSION)
642 float apref = prefs[i].pref;
643 float apref_delta = i+1 < n_regs ? apref - prefs[i+1].pref : 0;
644 apref_delta += pref_delta - split_threshold;
646 /* our source register isn't a useful destination for recursive
648 bool old_source_state = rbitset_is_set(forbidden_regs, from_r);
649 rbitset_set(forbidden_regs, from_r);
650 /* try recursive split */
651 bool res = try_optimistic_split(assignments[r], before, apref,
652 apref_delta, forbidden_regs, recursion+1);
653 /* restore our destination */
654 if (old_source_state) {
655 rbitset_set(forbidden_regs, from_r);
657 rbitset_clear(forbidden_regs, from_r);
666 const arch_register_t *reg = arch_register_for_index(cls, r);
667 ir_node *copy = be_new_Copy(block, to_split);
669 mark_as_copy_of(copy, to_split);
670 /* hacky, but correct here */
671 if (assignments[from_reg->index] == to_split)
672 free_reg_of_value(to_split);
673 use_reg(copy, reg, width);
674 sched_add_before(before, copy);
677 "Optimistic live-range split %+F move %+F(%s) -> %s before %+F (win %f, depth %d)\n",
678 copy, to_split, from_reg->name, reg->name, before, delta, recursion));
683 * Determine and assign a register for node @p node
685 static void assign_reg(const ir_node *block, ir_node *node,
686 unsigned *forbidden_regs)
688 assert(!is_Phi(node));
689 /* preassigned register? */
690 const arch_register_t *final_reg = arch_get_irn_register(node);
691 const arch_register_req_t *req = arch_get_irn_register_req(node);
692 unsigned width = req->width;
693 if (final_reg != NULL) {
694 DB((dbg, LEVEL_2, "Preassignment %+F -> %s\n", node, final_reg->name));
695 use_reg(node, final_reg, width);
699 /* ignore reqs must be preassigned */
700 assert(!arch_register_req_is(req, ignore));
702 /* give should_be_same boni */
703 allocation_info_t *info = get_allocation_info(node);
704 ir_node *in_node = skip_Proj(node);
705 if (arch_register_req_is(req, should_be_same)) {
706 float weight = (float)get_block_execfreq(block);
707 int arity = get_irn_arity(in_node);
709 assert(arity <= (int) sizeof(req->other_same) * 8);
710 for (int i = 0; i < arity; ++i) {
711 if (!rbitset_is_set(&req->other_same, i))
714 ir_node *in = get_irn_n(in_node, i);
715 const arch_register_t *reg = arch_get_irn_register(in);
716 unsigned reg_index = reg->index;
718 /* if the value didn't die here then we should not propagate the
719 * should_be_same info */
720 if (assignments[reg_index] == in)
723 info->prefs[reg_index] += weight * AFF_SHOULD_BE_SAME;
727 /* create list of register candidates and sort by their preference */
728 DB((dbg, LEVEL_2, "Candidates for %+F:", node));
729 reg_pref_t *reg_prefs = ALLOCAN(reg_pref_t, n_regs);
730 fill_sort_candidates(reg_prefs, info);
731 for (unsigned r = 0; r < n_regs; ++r) {
732 unsigned num = reg_prefs[r].num;
733 if (!rbitset_is_set(normal_regs, num))
735 const arch_register_t *reg = arch_register_for_index(cls, num);
736 DB((dbg, LEVEL_2, " %s(%f)", reg->name, reg_prefs[r].pref));
738 DB((dbg, LEVEL_2, "\n"));
740 const unsigned *allowed_regs = normal_regs;
741 if (arch_register_req_is(req, limited)) {
742 allowed_regs = req->limited;
745 unsigned final_reg_index = 0;
747 for (r = 0; r < n_regs; ++r) {
748 final_reg_index = reg_prefs[r].num;
749 if (!rbitset_is_set(allowed_regs, final_reg_index))
751 /* alignment constraint? */
753 if (arch_register_req_is(req, aligned) && (final_reg_index % width) != 0)
756 for (unsigned r0 = r+1; r0 < r+width; ++r0) {
757 if (assignments[r0] != NULL)
760 /* TODO: attempt optimistic split here */
765 if (assignments[final_reg_index] == NULL)
767 float pref = reg_prefs[r].pref;
768 float delta = r+1 < n_regs ? pref - reg_prefs[r+1].pref : 0;
769 ir_node *before = skip_Proj(node);
771 = try_optimistic_split(assignments[final_reg_index], before, pref,
772 delta, forbidden_regs, 0);
777 /* the common reason to hit this panic is when 1 of your nodes is not
778 * register pressure faithful */
779 panic("No register left for %+F\n", node);
782 final_reg = arch_register_for_index(cls, final_reg_index);
783 DB((dbg, LEVEL_2, "Assign %+F -> %s\n", node, final_reg->name));
784 use_reg(node, final_reg, width);
788 * Add an permutation in front of a node and change the assignments
789 * due to this permutation.
791 * To understand this imagine a permutation like this:
801 * First we count how many destinations a single value has. At the same time
802 * we can be sure that each destination register has at most 1 source register
803 * (it can have 0 which means we don't care what value is in it).
804 * We ignore all fulfilled permuations (like 7->7)
805 * In a first pass we create as much copy instructions as possible as they
806 * are generally cheaper than exchanges. We do this by counting into how many
807 * destinations a register has to be copied (in the example it's 2 for register
808 * 3, or 1 for the registers 1,2,4 and 7).
809 * We can then create a copy into every destination register when the usecount
810 * of that register is 0 (= noone else needs the value in the register).
812 * After this step we should only have cycles left. We implement a cyclic
813 * permutation of n registers with n-1 transpositions.
815 * @param live_nodes the set of live nodes, updated due to live range split
816 * @param before the node before we add the permutation
817 * @param permutation the permutation array indices are the destination
818 * registers, the values in the array are the source
821 static void permute_values(ir_nodeset_t *live_nodes, ir_node *before,
822 unsigned *permutation)
824 unsigned *n_used = ALLOCANZ(unsigned, n_regs);
826 /* determine how often each source register needs to be read */
827 for (unsigned r = 0; r < n_regs; ++r) {
828 unsigned old_reg = permutation[r];
831 value = assignments[old_reg];
833 /* nothing to do here, reg is not live. Mark it as fixpoint
834 * so we ignore it in the next steps */
842 ir_node *block = get_nodes_block(before);
844 /* step1: create copies where immediately possible */
845 for (unsigned r = 0; r < n_regs; /* empty */) {
846 unsigned old_r = permutation[r];
848 /* - no need to do anything for fixed points.
849 - we can't copy if the value in the dest reg is still needed */
850 if (old_r == r || n_used[r] > 0) {
856 ir_node *src = assignments[old_r];
857 ir_node *copy = be_new_Copy(block, src);
858 sched_add_before(before, copy);
859 const arch_register_t *reg = arch_register_for_index(cls, r);
860 DB((dbg, LEVEL_2, "Copy %+F (from %+F, before %+F) -> %s\n",
861 copy, src, before, reg->name));
862 mark_as_copy_of(copy, src);
863 unsigned width = 1; /* TODO */
864 use_reg(copy, reg, width);
866 if (live_nodes != NULL) {
867 ir_nodeset_insert(live_nodes, copy);
870 /* old register has 1 user less, permutation is resolved */
871 assert(arch_get_irn_register(src)->index == old_r);
874 assert(n_used[old_r] > 0);
876 if (n_used[old_r] == 0) {
877 if (live_nodes != NULL) {
878 ir_nodeset_remove(live_nodes, src);
880 free_reg_of_value(src);
883 /* advance or jump back (if this copy enabled another copy) */
884 if (old_r < r && n_used[old_r] == 0) {
891 /* at this point we only have "cycles" left which we have to resolve with
893 * TODO: if we have free registers left, then we should really use copy
894 * instructions for any cycle longer than 2 registers...
895 * (this is probably architecture dependent, there might be archs where
896 * copies are preferable even for 2-cycles) */
898 /* create perms with the rest */
899 for (unsigned r = 0; r < n_regs; /* empty */) {
900 unsigned old_r = permutation[r];
907 /* we shouldn't have copies from 1 value to multiple destinations left*/
908 assert(n_used[old_r] == 1);
910 /* exchange old_r and r2; after that old_r is a fixed point */
911 unsigned r2 = permutation[old_r];
913 ir_node *in[2] = { assignments[r2], assignments[old_r] };
914 ir_node *perm = be_new_Perm(cls, block, 2, in);
915 sched_add_before(before, perm);
916 DB((dbg, LEVEL_2, "Perm %+F (perm %+F,%+F, before %+F)\n",
917 perm, in[0], in[1], before));
919 unsigned width = 1; /* TODO */
921 ir_node *proj0 = new_r_Proj(perm, get_irn_mode(in[0]), 0);
922 mark_as_copy_of(proj0, in[0]);
923 const arch_register_t *reg0 = arch_register_for_index(cls, old_r);
924 use_reg(proj0, reg0, width);
926 ir_node *proj1 = new_r_Proj(perm, get_irn_mode(in[1]), 1);
927 mark_as_copy_of(proj1, in[1]);
928 const arch_register_t *reg1 = arch_register_for_index(cls, r2);
929 use_reg(proj1, reg1, width);
931 /* 1 value is now in the correct register */
932 permutation[old_r] = old_r;
933 /* the source of r changed to r2 */
936 /* if we have reached a fixpoint update data structures */
937 if (live_nodes != NULL) {
938 ir_nodeset_remove(live_nodes, in[0]);
939 ir_nodeset_remove(live_nodes, in[1]);
940 ir_nodeset_remove(live_nodes, proj0);
941 ir_nodeset_insert(live_nodes, proj1);
946 /* now we should only have fixpoints left */
947 for (unsigned r = 0; r < n_regs; ++r) {
948 assert(permutation[r] == r);
954 * Free regs for values last used.
956 * @param live_nodes set of live nodes, will be updated
957 * @param node the node to consider
959 static void free_last_uses(ir_nodeset_t *live_nodes, ir_node *node)
961 allocation_info_t *info = get_allocation_info(node);
962 const unsigned *last_uses = info->last_uses;
963 int arity = get_irn_arity(node);
965 for (int i = 0; i < arity; ++i) {
966 /* check if one operand is the last use */
967 if (!rbitset_is_set(last_uses, i))
970 ir_node *op = get_irn_n(node, i);
971 free_reg_of_value(op);
972 ir_nodeset_remove(live_nodes, op);
977 * change inputs of a node to the current value (copies/perms)
979 static void rewire_inputs(ir_node *node)
981 int arity = get_irn_arity(node);
982 for (int i = 0; i < arity; ++i) {
983 ir_node *op = get_irn_n(node, i);
984 allocation_info_t *info = try_get_allocation_info(op);
989 info = get_allocation_info(info->original_value);
990 if (info->current_value != op) {
991 set_irn_n(node, i, info->current_value);
997 * Create a bitset of registers occupied with value living through an
1000 static void determine_live_through_regs(unsigned *bitset, ir_node *node)
1002 const allocation_info_t *info = get_allocation_info(node);
1004 /* mark all used registers as potentially live-through */
1005 for (unsigned r = 0; r < n_regs; ++r) {
1006 if (assignments[r] == NULL)
1008 if (!rbitset_is_set(normal_regs, r))
1011 rbitset_set(bitset, r);
1014 /* remove registers of value dying at the instruction */
1015 int arity = get_irn_arity(node);
1016 for (int i = 0; i < arity; ++i) {
1017 if (!rbitset_is_set(info->last_uses, i))
1020 ir_node *op = get_irn_n(node, i);
1021 const arch_register_t *reg = arch_get_irn_register(op);
1022 rbitset_clear(bitset, reg->index);
1026 static void solve_lpp(ir_nodeset_t *live_nodes, ir_node *node,
1027 unsigned *forbidden_regs, unsigned *live_through_regs)
1029 unsigned *forbidden_edges = rbitset_malloc(n_regs * n_regs);
1030 int *lpp_vars = XMALLOCNZ(int, n_regs*n_regs);
1032 lpp_t *lpp = lpp_new("prefalloc", lpp_minimize);
1033 //lpp_set_time_limit(lpp, 20);
1034 lpp_set_log(lpp, stdout);
1036 /** mark some edges as forbidden */
1037 int arity = get_irn_arity(node);
1038 for (int i = 0; i < arity; ++i) {
1039 ir_node *op = get_irn_n(node, i);
1040 if (!arch_irn_consider_in_reg_alloc(cls, op))
1043 const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
1044 if (!arch_register_req_is(req, limited))
1047 const unsigned *limited = req->limited;
1048 const arch_register_t *reg = arch_get_irn_register(op);
1049 unsigned current_reg = reg->index;
1050 for (unsigned r = 0; r < n_regs; ++r) {
1051 if (rbitset_is_set(limited, r))
1054 rbitset_set(forbidden_edges, current_reg*n_regs + r);
1058 /* add all combinations, except for not allowed ones */
1059 for (unsigned l = 0; l < n_regs; ++l) {
1060 if (!rbitset_is_set(normal_regs, l)) {
1062 snprintf(name, sizeof(name), "%u_to_%u", l, l);
1063 lpp_vars[l*n_regs+l] = lpp_add_var(lpp, name, lpp_binary, 1);
1067 for (unsigned r = 0; r < n_regs; ++r) {
1068 if (!rbitset_is_set(normal_regs, r))
1070 if (rbitset_is_set(forbidden_edges, l*n_regs + r))
1072 /* livethrough values may not use constrained output registers */
1073 if (rbitset_is_set(live_through_regs, l)
1074 && rbitset_is_set(forbidden_regs, r))
1078 snprintf(name, sizeof(name), "%u_to_%u", l, r);
1080 double costs = l==r ? 9 : 8;
1081 lpp_vars[l*n_regs+r]
1082 = lpp_add_var(lpp, name, lpp_binary, costs);
1083 assert(lpp_vars[l*n_regs+r] > 0);
1086 /* add constraints */
1087 for (unsigned l = 0; l < n_regs; ++l) {
1088 /* only 1 destination per register */
1089 int constraint = -1;
1090 for (unsigned r = 0; r < n_regs; ++r) {
1091 int var = lpp_vars[l*n_regs+r];
1094 if (constraint < 0) {
1096 snprintf(name, sizeof(name), "%u_to_dest", l);
1097 constraint = lpp_add_cst(lpp, name, lpp_equal, 1);
1099 lpp_set_factor_fast(lpp, constraint, var, 1);
1101 /* each destination used by at most 1 value */
1103 for (unsigned r = 0; r < n_regs; ++r) {
1104 int var = lpp_vars[r*n_regs+l];
1107 if (constraint < 0) {
1109 snprintf(name, sizeof(name), "one_to_%u", l);
1110 constraint = lpp_add_cst(lpp, name, lpp_less_equal, 1);
1112 lpp_set_factor_fast(lpp, constraint, var, 1);
1116 lpp_dump_plain(lpp, fopen("lppdump.txt", "w"));
1119 lpp_solve(lpp, be_options.ilp_server, be_options.ilp_solver);
1120 if (!lpp_is_sol_valid(lpp))
1121 panic("ilp solution not valid!");
1123 unsigned *assignment = ALLOCAN(unsigned, n_regs);
1124 for (unsigned l = 0; l < n_regs; ++l) {
1125 unsigned dest_reg = (unsigned)-1;
1126 for (unsigned r = 0; r < n_regs; ++r) {
1127 int var = lpp_vars[l*n_regs+r];
1130 double val = lpp_get_var_sol(lpp, var);
1132 assert(dest_reg == (unsigned)-1);
1136 assert(dest_reg != (unsigned)-1);
1137 assignment[dest_reg] = l;
1140 fprintf(stderr, "Assignment: ");
1141 for (unsigned l = 0; l < n_regs; ++l) {
1142 fprintf(stderr, "%u ", assignment[l]);
1144 fprintf(stderr, "\n");
1146 permute_values(live_nodes, node, assignment);
1150 static bool is_aligned(unsigned num, unsigned alignment)
1152 unsigned mask = alignment-1;
1153 assert(is_po2(alignment));
1154 return (num&mask) == 0;
1158 * Enforce constraints at a node by live range splits.
1160 * @param live_nodes the set of live nodes, might be changed
1161 * @param node the current node
1163 static void enforce_constraints(ir_nodeset_t *live_nodes, ir_node *node,
1164 unsigned *forbidden_regs)
1166 /* see if any use constraints are not met and whether double-width
1167 * values are involved */
1168 bool double_width = false;
1170 int arity = get_irn_arity(node);
1171 for (int i = 0; i < arity; ++i) {
1172 ir_node *op = get_irn_n(node, i);
1173 if (!arch_irn_consider_in_reg_alloc(cls, op))
1176 /* are there any limitations for the i'th operand? */
1177 const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
1179 double_width = true;
1180 const arch_register_t *reg = arch_get_irn_register(op);
1181 unsigned reg_index = reg->index;
1182 if (arch_register_req_is(req, aligned)) {
1183 if (!is_aligned(reg_index, req->width)) {
1188 if (!arch_register_req_is(req, limited))
1191 const unsigned *limited = req->limited;
1192 if (!rbitset_is_set(limited, reg_index)) {
1193 /* found an assignment outside the limited set */
1199 /* is any of the live-throughs using a constrained output register? */
1200 unsigned *live_through_regs = NULL;
1201 be_foreach_definition(node, cls, value,
1203 if (req_->width > 1)
1204 double_width = true;
1205 if (!arch_register_req_is(req_, limited))
1207 if (live_through_regs == NULL) {
1208 live_through_regs = rbitset_alloca(n_regs);
1209 determine_live_through_regs(live_through_regs, node);
1211 rbitset_or(forbidden_regs, req_->limited, n_regs);
1212 if (rbitsets_have_common(req_->limited, live_through_regs, n_regs))
1219 /* create these arrays if we haven't yet */
1220 if (live_through_regs == NULL) {
1221 live_through_regs = rbitset_alloca(n_regs);
1225 /* only the ILP variant can solve this yet */
1226 solve_lpp(live_nodes, node, forbidden_regs, live_through_regs);
1230 /* at this point we have to construct a bipartite matching problem to see
1231 * which values should go to which registers
1232 * Note: We're building the matrix in "reverse" - source registers are
1233 * right, destinations left because this will produce the solution
1234 * in the format required for permute_values.
1236 hungarian_problem_t *bp
1237 = hungarian_new(n_regs, n_regs, HUNGARIAN_MATCH_PERFECT);
1239 /* add all combinations, then remove not allowed ones */
1240 for (unsigned l = 0; l < n_regs; ++l) {
1241 if (!rbitset_is_set(normal_regs, l)) {
1242 hungarian_add(bp, l, l, 1);
1246 for (unsigned r = 0; r < n_regs; ++r) {
1247 if (!rbitset_is_set(normal_regs, r))
1249 /* livethrough values may not use constrainted output registers */
1250 if (rbitset_is_set(live_through_regs, l)
1251 && rbitset_is_set(forbidden_regs, r))
1254 hungarian_add(bp, r, l, l == r ? 9 : 8);
1258 for (int i = 0; i < arity; ++i) {
1259 ir_node *op = get_irn_n(node, i);
1260 if (!arch_irn_consider_in_reg_alloc(cls, op))
1263 const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
1264 if (!arch_register_req_is(req, limited))
1267 const unsigned *limited = req->limited;
1268 const arch_register_t *reg = arch_get_irn_register(op);
1269 unsigned current_reg = reg->index;
1270 for (unsigned r = 0; r < n_regs; ++r) {
1271 if (rbitset_is_set(limited, r))
1273 hungarian_remove(bp, r, current_reg);
1277 //hungarian_print_cost_matrix(bp, 1);
1278 hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
1280 unsigned *assignment = ALLOCAN(unsigned, n_regs);
1281 int res = hungarian_solve(bp, assignment, NULL, 0);
1285 fprintf(stderr, "Swap result:");
1286 for (i = 0; i < (int) n_regs; ++i) {
1287 fprintf(stderr, " %d", assignment[i]);
1289 fprintf(stderr, "\n");
1294 permute_values(live_nodes, node, assignment);
1297 /** test whether a node @p n is a copy of the value of node @p of */
1298 static bool is_copy_of(ir_node *value, ir_node *test_value)
1300 if (value == test_value)
1303 allocation_info_t *info = get_allocation_info(value);
1304 allocation_info_t *test_info = get_allocation_info(test_value);
1305 return test_info->original_value == info->original_value;
1309 * find a value in the end-assignment of a basic block
1310 * @returns the index into the assignment array if found
1313 static int find_value_in_block_info(block_info_t *info, ir_node *value)
1315 ir_node **end_assignments = info->assignments;
1316 for (unsigned r = 0; r < n_regs; ++r) {
1317 ir_node *a_value = end_assignments[r];
1319 if (a_value == NULL)
1321 if (is_copy_of(a_value, value))
1329 * Create the necessary permutations at the end of a basic block to fullfill
1330 * the register assignment for phi-nodes in the next block
1332 static void add_phi_permutations(ir_node *block, int p)
1334 ir_node *pred = get_Block_cfgpred_block(block, p);
1335 block_info_t *pred_info = get_block_info(pred);
1337 /* predecessor not processed yet? nothing to do */
1338 if (!pred_info->processed)
1341 unsigned *permutation = ALLOCAN(unsigned, n_regs);
1342 for (unsigned r = 0; r < n_regs; ++r) {
1346 /* check phi nodes */
1347 bool need_permutation = false;
1348 ir_node *phi = sched_first(block);
1349 for ( ; is_Phi(phi); phi = sched_next(phi)) {
1350 if (!arch_irn_consider_in_reg_alloc(cls, phi))
1353 ir_node *phi_pred = get_Phi_pred(phi, p);
1354 int a = find_value_in_block_info(pred_info, phi_pred);
1357 const arch_register_t *reg = arch_get_irn_register(phi);
1358 int regn = reg->index;
1359 /* same register? nothing to do */
1363 ir_node *op = pred_info->assignments[a];
1364 const arch_register_t *op_reg = arch_get_irn_register(op);
1365 /* Virtual registers are ok, too. */
1366 if (op_reg->type & arch_register_type_virtual)
1369 permutation[regn] = a;
1370 need_permutation = true;
1373 if (need_permutation) {
1374 /* permute values at end of predecessor */
1375 ir_node **old_assignments = assignments;
1376 assignments = pred_info->assignments;
1377 permute_values(NULL, be_get_end_of_block_insertion_point(pred),
1379 assignments = old_assignments;
1382 /* change phi nodes to use the copied values */
1383 phi = sched_first(block);
1384 for ( ; is_Phi(phi); phi = sched_next(phi)) {
1385 if (!arch_irn_consider_in_reg_alloc(cls, phi))
1388 /* we have permuted all values into the correct registers so we can
1389 simply query which value occupies the phis register in the
1391 int a = arch_get_irn_register(phi)->index;
1392 ir_node *op = pred_info->assignments[a];
1393 set_Phi_pred(phi, p, op);
1398 * Set preferences for a phis register based on the registers used on the
1401 static void adapt_phi_prefs(ir_node *phi)
1403 ir_node *block = get_nodes_block(phi);
1404 allocation_info_t *info = get_allocation_info(phi);
1406 int arity = get_irn_arity(phi);
1407 for (int i = 0; i < arity; ++i) {
1408 ir_node *op = get_irn_n(phi, i);
1409 const arch_register_t *reg = arch_get_irn_register(op);
1413 /* we only give the bonus if the predecessor already has registers
1414 * assigned, otherwise we only see a dummy value
1415 * and any conclusions about its register are useless */
1416 ir_node *pred_block = get_Block_cfgpred_block(block, i);
1417 block_info_t *pred_block_info = get_block_info(pred_block);
1418 if (!pred_block_info->processed)
1421 /* give bonus for already assigned register */
1422 float weight = (float)get_block_execfreq(pred_block);
1423 info->prefs[reg->index] += weight * AFF_PHI;
1428 * After a phi has been assigned a register propagate preference inputs
1429 * to the phi inputs.
1431 static void propagate_phi_register(ir_node *phi, unsigned assigned_r)
1433 ir_node *block = get_nodes_block(phi);
1435 int arity = get_irn_arity(phi);
1436 for (int i = 0; i < arity; ++i) {
1437 ir_node *op = get_Phi_pred(phi, i);
1438 allocation_info_t *info = get_allocation_info(op);
1439 ir_node *pred_block = get_Block_cfgpred_block(block, i);
1441 = (float)get_block_execfreq(pred_block) * AFF_PHI;
1443 if (info->prefs[assigned_r] >= weight)
1446 /* promote the prefered register */
1447 for (unsigned r = 0; r < n_regs; ++r) {
1448 if (info->prefs[r] > -weight) {
1449 info->prefs[r] = -weight;
1452 info->prefs[assigned_r] = weight;
1455 propagate_phi_register(op, assigned_r);
1459 static void assign_phi_registers(ir_node *block)
1461 /* count phi nodes */
1463 sched_foreach(block, node) {
1466 if (!arch_irn_consider_in_reg_alloc(cls, node))
1474 /* build a bipartite matching problem for all phi nodes */
1475 hungarian_problem_t *bp
1476 = hungarian_new(n_phis, n_regs, HUNGARIAN_MATCH_PERFECT);
1478 sched_foreach(block, node) {
1481 if (!arch_irn_consider_in_reg_alloc(cls, node))
1484 /* give boni for predecessor colorings */
1485 adapt_phi_prefs(node);
1486 /* add stuff to bipartite problem */
1487 allocation_info_t *info = get_allocation_info(node);
1488 DB((dbg, LEVEL_3, "Prefs for %+F: ", node));
1489 for (unsigned r = 0; r < n_regs; ++r) {
1490 if (!rbitset_is_set(normal_regs, r))
1493 float costs = info->prefs[r];
1494 costs = costs < 0 ? -logf(-costs+1) : logf(costs+1);
1497 hungarian_add(bp, n, r, (int)costs);
1498 DB((dbg, LEVEL_3, " %s(%f)", arch_register_for_index(cls, r)->name,
1501 DB((dbg, LEVEL_3, "\n"));
1505 //hungarian_print_cost_matrix(bp, 7);
1506 hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
1508 unsigned *assignment = ALLOCAN(unsigned, n_regs);
1509 int res = hungarian_solve(bp, assignment, NULL, 0);
1514 sched_foreach(block, node) {
1517 if (!arch_irn_consider_in_reg_alloc(cls, node))
1519 const arch_register_req_t *req
1520 = arch_get_irn_register_req(node);
1522 unsigned r = assignment[n++];
1523 assert(rbitset_is_set(normal_regs, r));
1524 const arch_register_t *reg = arch_register_for_index(cls, r);
1525 DB((dbg, LEVEL_2, "Assign %+F -> %s\n", node, reg->name));
1526 use_reg(node, reg, req->width);
1528 /* adapt preferences for phi inputs */
1529 propagate_phi_register(node, r);
1533 static arch_register_req_t *allocate_reg_req(ir_graph *irg)
1535 struct obstack *obst = be_get_be_obst(irg);
1536 arch_register_req_t *req = OALLOCZ(obst, arch_register_req_t);
1541 * Walker: assign registers to all nodes of a block that
1542 * need registers from the currently considered register class.
1544 static void allocate_coalesce_block(ir_node *block, void *data)
1547 DB((dbg, LEVEL_2, "* Block %+F\n", block));
1549 /* clear assignments */
1550 block_info_t *block_info = get_block_info(block);
1551 assignments = block_info->assignments;
1553 ir_nodeset_t live_nodes;
1554 ir_nodeset_init(&live_nodes);
1556 /* gather regalloc infos of predecessor blocks */
1557 int n_preds = get_Block_n_cfgpreds(block);
1558 block_info_t **pred_block_infos = ALLOCAN(block_info_t*, n_preds);
1559 for (int i = 0; i < n_preds; ++i) {
1560 ir_node *pred = get_Block_cfgpred_block(block, i);
1561 block_info_t *pred_info = get_block_info(pred);
1562 pred_block_infos[i] = pred_info;
1565 ir_node **phi_ins = ALLOCAN(ir_node*, n_preds);
1567 /* collect live-in nodes and preassigned values */
1568 be_lv_foreach(lv, block, be_lv_state_in, node) {
1569 const arch_register_req_t *req = arch_get_irn_register_req(node);
1570 if (req->cls != cls)
1573 if (arch_register_req_is(req, limited)) {
1574 allocation_info_t *info = get_allocation_info(node);
1575 info->current_value = node;
1577 const arch_register_t *reg = arch_get_irn_register(node);
1578 assert(reg != NULL); /* ignore values must be preassigned */
1579 use_reg(node, reg, req->width);
1583 /* check all predecessors for this value, if it is not everywhere the
1584 same or unknown then we have to construct a phi
1585 (we collect the potential phi inputs here) */
1586 bool need_phi = false;
1587 for (int p = 0; p < n_preds; ++p) {
1588 block_info_t *pred_info = pred_block_infos[p];
1590 if (!pred_info->processed) {
1591 /* use node for now, it will get fixed later */
1595 int a = find_value_in_block_info(pred_info, node);
1597 /* must live out of predecessor */
1599 phi_ins[p] = pred_info->assignments[a];
1600 /* different value from last time? then we need a phi */
1601 if (p > 0 && phi_ins[p-1] != phi_ins[p]) {
1608 ir_mode *mode = get_irn_mode(node);
1609 const arch_register_req_t *phi_req = cls->class_req;
1610 if (req->width > 1) {
1611 arch_register_req_t *new_req = allocate_reg_req(irg);
1613 new_req->type = req->type & arch_register_req_type_aligned;
1614 new_req->width = req->width;
1617 ir_node *phi = be_new_Phi(block, n_preds, phi_ins, mode,
1620 DB((dbg, LEVEL_3, "Create Phi %+F (for %+F) -", phi, node));
1621 #ifdef DEBUG_libfirm
1622 for (int pi = 0; pi < n_preds; ++pi) {
1623 DB((dbg, LEVEL_3, " %+F", phi_ins[pi]));
1625 DB((dbg, LEVEL_3, "\n"));
1627 mark_as_copy_of(phi, node);
1628 sched_add_after(block, phi);
1632 allocation_info_t *info = get_allocation_info(node);
1633 info->current_value = phi_ins[0];
1635 /* Grab 1 of the inputs we constructed (might not be the same as
1636 * "node" as we could see the same copy of the value in all
1641 /* if the node already has a register assigned use it */
1642 const arch_register_t *reg = arch_get_irn_register(node);
1644 use_reg(node, reg, req->width);
1647 /* remember that this node is live at the beginning of the block */
1648 ir_nodeset_insert(&live_nodes, node);
1651 /** Collects registers which must not be used for optimistic splits. */
1652 unsigned *const forbidden_regs = rbitset_alloca(n_regs);
1654 /* handle phis... */
1655 assign_phi_registers(block);
1657 /* all live-ins must have a register */
1659 foreach_ir_nodeset(&live_nodes, node, iter) {
1660 const arch_register_t *reg = arch_get_irn_register(node);
1661 assert(reg != NULL);
1665 /* assign instructions in the block */
1666 sched_foreach(block, node) {
1667 /* phis are already assigned */
1671 rewire_inputs(node);
1673 /* enforce use constraints */
1674 rbitset_clear_all(forbidden_regs, n_regs);
1675 enforce_constraints(&live_nodes, node, forbidden_regs);
1677 rewire_inputs(node);
1679 /* we may not use registers used for inputs for optimistic splits */
1680 int arity = get_irn_arity(node);
1681 for (int i = 0; i < arity; ++i) {
1682 ir_node *op = get_irn_n(node, i);
1683 if (!arch_irn_consider_in_reg_alloc(cls, op))
1686 const arch_register_t *reg = arch_get_irn_register(op);
1687 rbitset_set(forbidden_regs, reg->index);
1690 /* free registers of values last used at this instruction */
1691 free_last_uses(&live_nodes, node);
1693 /* assign output registers */
1694 be_foreach_definition_(node, cls, value,
1695 assign_reg(block, value, forbidden_regs);
1699 ir_nodeset_destroy(&live_nodes);
1702 block_info->processed = true;
1704 /* permute values at end of predecessor blocks in case of phi-nodes */
1706 for (int p = 0; p < n_preds; ++p) {
1707 add_phi_permutations(block, p);
1711 /* if we have exactly 1 successor then we might be able to produce phi
1713 if (get_irn_n_edges_kind(block, EDGE_KIND_BLOCK) == 1) {
1714 const ir_edge_t *edge
1715 = get_irn_out_edge_first_kind(block, EDGE_KIND_BLOCK);
1716 ir_node *succ = get_edge_src_irn(edge);
1717 int p = get_edge_src_pos(edge);
1718 block_info_t *succ_info = get_block_info(succ);
1720 if (succ_info->processed) {
1721 add_phi_permutations(succ, p);
1726 typedef struct block_costs_t block_costs_t;
1727 struct block_costs_t {
1728 float costs; /**< costs of the block */
1729 int dfs_num; /**< depth first search number (to detect backedges) */
1732 static int cmp_block_costs(const void *d1, const void *d2)
1734 const ir_node * const *block1 = (const ir_node**)d1;
1735 const ir_node * const *block2 = (const ir_node**)d2;
1736 const block_costs_t *info1 = (const block_costs_t*)get_irn_link(*block1);
1737 const block_costs_t *info2 = (const block_costs_t*)get_irn_link(*block2);
1738 return QSORT_CMP(info2->costs, info1->costs);
1741 static void determine_block_order(void)
1743 ir_node **blocklist = be_get_cfgpostorder(irg);
1744 size_t n_blocks = ARR_LEN(blocklist);
1746 pdeq *worklist = new_pdeq();
1747 ir_node **order = XMALLOCN(ir_node*, n_blocks);
1750 /* clear block links... */
1751 for (size_t p = 0; p < n_blocks; ++p) {
1752 ir_node *block = blocklist[p];
1753 set_irn_link(block, NULL);
1756 /* walk blocks in reverse postorder, the costs for each block are the
1757 * sum of the costs of its predecessors (excluding the costs on backedges
1758 * which we can't determine) */
1759 for (size_t p = n_blocks; p > 0;) {
1760 block_costs_t *cost_info;
1761 ir_node *block = blocklist[--p];
1763 float execfreq = (float)get_block_execfreq(block);
1764 float costs = execfreq;
1765 int n_cfgpreds = get_Block_n_cfgpreds(block);
1766 for (int p2 = 0; p2 < n_cfgpreds; ++p2) {
1767 ir_node *pred_block = get_Block_cfgpred_block(block, p2);
1768 block_costs_t *pred_costs = (block_costs_t*)get_irn_link(pred_block);
1769 /* we don't have any info for backedges */
1770 if (pred_costs == NULL)
1772 costs += pred_costs->costs;
1775 cost_info = OALLOCZ(&obst, block_costs_t);
1776 cost_info->costs = costs;
1777 cost_info->dfs_num = dfs_num++;
1778 set_irn_link(block, cost_info);
1781 /* sort array by block costs */
1782 qsort(blocklist, n_blocks, sizeof(blocklist[0]), cmp_block_costs);
1784 ir_reserve_resources(irg, IR_RESOURCE_BLOCK_VISITED);
1785 inc_irg_block_visited(irg);
1787 for (size_t p = 0; p < n_blocks; ++p) {
1788 ir_node *block = blocklist[p];
1789 if (Block_block_visited(block))
1792 /* continually add predecessors with highest costs to worklist
1793 * (without using backedges) */
1795 block_costs_t *info = (block_costs_t*)get_irn_link(block);
1796 ir_node *best_pred = NULL;
1797 float best_costs = -1;
1798 int n_cfgpred = get_Block_n_cfgpreds(block);
1800 pdeq_putr(worklist, block);
1801 mark_Block_block_visited(block);
1802 for (int i = 0; i < n_cfgpred; ++i) {
1803 ir_node *pred_block = get_Block_cfgpred_block(block, i);
1804 block_costs_t *pred_info = (block_costs_t*)get_irn_link(pred_block);
1806 /* ignore backedges */
1807 if (pred_info->dfs_num > info->dfs_num)
1810 if (info->costs > best_costs) {
1811 best_costs = info->costs;
1812 best_pred = pred_block;
1816 } while (block != NULL && !Block_block_visited(block));
1818 /* now put all nodes in the worklist in our final order */
1819 while (!pdeq_empty(worklist)) {
1820 ir_node *pblock = (ir_node*)pdeq_getr(worklist);
1821 assert(order_p < n_blocks);
1822 order[order_p++] = pblock;
1825 assert(order_p == n_blocks);
1828 ir_free_resources(irg, IR_RESOURCE_BLOCK_VISITED);
1830 DEL_ARR_F(blocklist);
1832 obstack_free(&obst, NULL);
1833 obstack_init(&obst);
1835 block_order = order;
1836 n_block_order = n_blocks;
1839 static void free_block_order(void)
1845 * Run the register allocator for the current register class.
1847 static void be_pref_alloc_cls(void)
1849 be_assure_live_sets(irg);
1850 lv = be_get_irg_liveness(irg);
1852 ir_reserve_resources(irg, IR_RESOURCE_IRN_LINK);
1854 DB((dbg, LEVEL_2, "=== Allocating registers of %s ===\n", cls->name));
1856 be_clear_links(irg);
1858 irg_block_walk_graph(irg, NULL, analyze_block, NULL);
1859 combine_congruence_classes();
1861 for (size_t i = 0; i < n_block_order; ++i) {
1862 ir_node *block = block_order[i];
1863 allocate_coalesce_block(block, NULL);
1866 ir_free_resources(irg, IR_RESOURCE_IRN_LINK);
1869 static void dump(int mask, ir_graph *irg, const char *suffix)
1871 if (be_options.dump_flags & mask)
1872 dump_ir_graph(irg, suffix);
1876 * Run the spiller on the current graph.
1878 static void spill(void)
1880 /* make sure all nodes show their real register pressure */
1881 be_timer_push(T_RA_CONSTR);
1882 be_pre_spill_prepare_constr(irg, cls);
1883 be_timer_pop(T_RA_CONSTR);
1885 dump(DUMP_RA, irg, "spillprepare");
1888 be_timer_push(T_RA_SPILL);
1889 be_do_spill(irg, cls);
1890 be_timer_pop(T_RA_SPILL);
1892 be_timer_push(T_RA_SPILL_APPLY);
1893 check_for_memory_operands(irg);
1894 be_timer_pop(T_RA_SPILL_APPLY);
1896 dump(DUMP_RA, irg, "spill");
1900 * The pref register allocator for a whole procedure.
1902 static void be_pref_alloc(ir_graph *new_irg)
1904 obstack_init(&obst);
1908 /* determine a good coloring order */
1909 determine_block_order();
1911 const arch_env_t *arch_env = be_get_irg_arch_env(new_irg);
1912 int n_cls = arch_env->n_register_classes;
1913 for (int c = 0; c < n_cls; ++c) {
1914 cls = &arch_env->register_classes[c];
1915 if (arch_register_class_flags(cls) & arch_register_class_flag_manual_ra)
1918 stat_ev_ctx_push_str("regcls", cls->name);
1920 n_regs = arch_register_class_n_regs(cls);
1921 normal_regs = rbitset_malloc(n_regs);
1922 be_set_allocatable_regs(irg, cls, normal_regs);
1926 /* verify schedule and register pressure */
1927 be_timer_push(T_VERIFY);
1928 if (be_options.verify_option == BE_VERIFY_WARN) {
1929 be_verify_schedule(irg);
1930 be_verify_register_pressure(irg, cls);
1931 } else if (be_options.verify_option == BE_VERIFY_ASSERT) {
1932 assert(be_verify_schedule(irg) && "Schedule verification failed");
1933 assert(be_verify_register_pressure(irg, cls)
1934 && "Register pressure verification failed");
1936 be_timer_pop(T_VERIFY);
1938 be_timer_push(T_RA_COLOR);
1939 be_pref_alloc_cls();
1940 be_timer_pop(T_RA_COLOR);
1942 /* we most probably constructed new Phis so liveness info is invalid
1944 be_invalidate_live_sets(irg);
1947 stat_ev_ctx_pop("regcls");
1952 be_timer_push(T_RA_SPILL_APPLY);
1953 be_abi_fix_stack_nodes(irg);
1954 be_timer_pop(T_RA_SPILL_APPLY);
1956 be_timer_push(T_VERIFY);
1957 if (be_options.verify_option == BE_VERIFY_WARN) {
1958 be_verify_register_allocation(irg);
1959 } else if (be_options.verify_option == BE_VERIFY_ASSERT) {
1960 assert(be_verify_register_allocation(irg)
1961 && "Register allocation invalid");
1963 be_timer_pop(T_VERIFY);
1965 obstack_free(&obst, NULL);
1968 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_pref_alloc)
1969 void be_init_pref_alloc(void)
1971 static be_ra_t be_ra_pref = { be_pref_alloc };
1972 be_register_allocator("pref", &be_ra_pref);
1973 FIRM_DBG_REGISTER(dbg, "firm.be.prefalloc");