2 * This file is part of libFirm.
3 * Copyright (C) 2012 University of Karlsruhe.
8 * @brief Preference Guided Register Assignment
9 * @author Matthias Braun
12 * The idea is to allocate registers in 2 passes:
13 * 1. A first pass to determine "preferred" registers for live-ranges. This
14 * calculates for each register and each live-range a value indicating
15 * the usefulness. (You can roughly think of the value as the negative
16 * costs needed for copies when the value is in the specific registers...)
18 * 2. Walk blocks and assigns registers in a greedy fashion. Preferring
19 * registers with high preferences. When register constraints are not met,
20 * add copies and split live-ranges.
23 * - make use of free registers in the permute_values code
36 #include "iredges_t.h"
37 #include "irgraph_t.h"
45 #include "raw_bitset.h"
46 #include "unionfind.h"
48 #include "hungarian.h"
51 #include "bechordal_t.h"
60 #include "bespillutil.h"
65 #define USE_FACTOR 1.0f
66 #define DEF_FACTOR 1.0f
67 #define NEIGHBOR_FACTOR 0.2f
68 #define AFF_SHOULD_BE_SAME 0.5f
70 #define SPLIT_DELTA 1.0f
71 #define MAX_OPTIMISTIC_SPLIT_RECURSION 0
73 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
75 static struct obstack obst;
77 static const arch_register_class_t *cls;
79 static unsigned n_regs;
80 static unsigned *normal_regs;
81 static int *congruence_classes;
82 static ir_node **block_order;
83 static size_t n_block_order;
85 /** currently active assignments (while processing a basic block)
86 * maps registers to values(their current copies) */
87 static ir_node **assignments;
90 * allocation information: last_uses, register preferences
91 * the information is per firm-node.
93 struct allocation_info_t {
94 unsigned last_uses[2]; /**< bitset indicating last uses (input pos) */
95 ir_node *current_value; /**< copy of the value that should be used */
96 ir_node *original_value; /**< for copies point to original value */
97 float prefs[]; /**< register preferences */
99 typedef struct allocation_info_t allocation_info_t;
101 /** helper datastructure used when sorting register preferences */
106 typedef struct reg_pref_t reg_pref_t;
108 /** per basic-block information */
109 struct block_info_t {
110 bool processed; /**< indicate whether block is processed */
111 ir_node *assignments[]; /**< register assignments at end of block */
113 typedef struct block_info_t block_info_t;
116 * Get the allocation info for a node.
117 * The info is allocated on the first visit of a node.
119 static allocation_info_t *get_allocation_info(ir_node *node)
121 allocation_info_t *info = (allocation_info_t*)get_irn_link(node);
123 info = OALLOCFZ(&obst, allocation_info_t, prefs, n_regs);
124 info->current_value = node;
125 info->original_value = node;
126 set_irn_link(node, info);
132 static allocation_info_t *try_get_allocation_info(const ir_node *node)
134 return (allocation_info_t*) get_irn_link(node);
138 * Get allocation information for a basic block
140 static block_info_t *get_block_info(ir_node *block)
142 block_info_t *info = (block_info_t*)get_irn_link(block);
144 assert(is_Block(block));
146 info = OALLOCFZ(&obst, block_info_t, assignments, n_regs);
147 set_irn_link(block, info);
154 * Link the allocation info of a node to a copy.
155 * Afterwards, both nodes uses the same allocation info.
156 * Copy must not have an allocation info assigned yet.
158 * @param copy the node that gets the allocation info assigned
159 * @param value the original node
161 static void mark_as_copy_of(ir_node *copy, ir_node *value)
163 allocation_info_t *info = get_allocation_info(value);
164 allocation_info_t *copy_info = get_allocation_info(copy);
166 /* find original value */
167 ir_node *original = info->original_value;
168 if (original != value) {
169 info = get_allocation_info(original);
172 assert(info->original_value == original);
173 info->current_value = copy;
175 /* the copy should not be linked to something else yet */
176 assert(copy_info->original_value == copy);
177 copy_info->original_value = original;
179 /* copy over allocation preferences */
180 memcpy(copy_info->prefs, info->prefs, n_regs * sizeof(copy_info->prefs[0]));
184 * Calculate the penalties for every register on a node and its live neighbors.
186 * @param live_nodes the set of live nodes at the current position, may be NULL
187 * @param penalty the penalty to subtract from
188 * @param limited a raw bitset containing the limited set for the node
189 * @param node the node
191 static void give_penalties_for_limits(const ir_nodeset_t *live_nodes,
192 float penalty, const unsigned* limited,
195 allocation_info_t *info = get_allocation_info(node);
197 /* give penalty for all forbidden regs */
198 for (unsigned r = 0; r < n_regs; ++r) {
199 if (rbitset_is_set(limited, r))
202 info->prefs[r] -= penalty;
205 /* all other live values should get a penalty for allowed regs */
206 if (live_nodes == NULL)
209 penalty *= NEIGHBOR_FACTOR;
210 size_t n_allowed = rbitset_popcount(limited, n_regs);
212 /* only create a very weak penalty if multiple regs are allowed */
213 penalty = (penalty * 0.8f) / n_allowed;
215 foreach_ir_nodeset(live_nodes, neighbor, iter) {
216 allocation_info_t *neighbor_info;
218 /* TODO: if op is used on multiple inputs we might not do a
220 if (neighbor == node)
223 neighbor_info = get_allocation_info(neighbor);
224 for (unsigned r = 0; r < n_regs; ++r) {
225 if (!rbitset_is_set(limited, r))
228 neighbor_info->prefs[r] -= penalty;
234 * Calculate the preferences of a definition for the current register class.
235 * If the definition uses a limited set of registers, reduce the preferences
236 * for the limited register on the node and its neighbors.
238 * @param live_nodes the set of live nodes at the current node
239 * @param weight the weight
240 * @param node the current node
242 static void check_defs(ir_nodeset_t const *const live_nodes, float const weight, ir_node *const node, arch_register_req_t const *const req)
244 if (arch_register_req_is(req, limited)) {
245 const unsigned *limited = req->limited;
246 float penalty = weight * DEF_FACTOR;
247 give_penalties_for_limits(live_nodes, penalty, limited, node);
250 if (arch_register_req_is(req, should_be_same)) {
251 ir_node *insn = skip_Proj(node);
252 allocation_info_t *info = get_allocation_info(node);
253 int arity = get_irn_arity(insn);
255 float factor = 1.0f / rbitset_popcount(&req->other_same, arity);
256 for (int i = 0; i < arity; ++i) {
257 if (!rbitset_is_set(&req->other_same, i))
260 ir_node *op = get_irn_n(insn, i);
262 /* if we the value at the should_be_same input doesn't die at the
263 * node, then it is no use to propagate the constraints (since a
264 * copy will emerge anyway) */
265 if (ir_nodeset_contains(live_nodes, op))
268 allocation_info_t *op_info = get_allocation_info(op);
269 for (unsigned r = 0; r < n_regs; ++r) {
270 op_info->prefs[r] += info->prefs[r] * factor;
277 * Walker: Runs an a block calculates the preferences for any
278 * node and every register from the considered register class.
280 static void analyze_block(ir_node *block, void *data)
282 float weight = (float)get_block_execfreq(block);
283 ir_nodeset_t live_nodes;
286 ir_nodeset_init(&live_nodes);
287 be_liveness_end_of_block(lv, cls, block, &live_nodes);
289 sched_foreach_reverse(block, node) {
293 be_foreach_definition(node, cls, value, req,
294 check_defs(&live_nodes, weight, value, req);
298 int arity = get_irn_arity(node);
300 /* the allocation info node currently only uses 1 unsigned value
301 to mark last used inputs. So we will fail for a node with more than
303 allocation_info_t *info = get_allocation_info(node);
304 if (arity >= (int) sizeof(info->last_uses) * 8) {
305 panic("Node with more than %d inputs not supported yet",
306 (int) sizeof(info->last_uses) * 8);
309 for (int i = 0; i < arity; ++i) {
310 ir_node *op = get_irn_n(node, i);
311 const arch_register_req_t *req = arch_get_irn_register_req(op);
315 /* last usage of a value? */
316 if (!ir_nodeset_contains(&live_nodes, op)) {
317 rbitset_set(info->last_uses, i);
321 be_liveness_transfer(cls, node, &live_nodes);
323 /* update weights based on usage constraints */
324 be_foreach_use(node, cls, req, op, op_req,
325 if (!arch_register_req_is(req, limited))
328 give_penalties_for_limits(&live_nodes, weight * USE_FACTOR, req->limited, op);
332 ir_nodeset_destroy(&live_nodes);
335 static void congruence_def(ir_nodeset_t *const live_nodes, ir_node const *const node, arch_register_req_t const *const req)
337 /* should be same constraint? */
338 if (arch_register_req_is(req, should_be_same)) {
339 const ir_node *insn = skip_Proj_const(node);
340 int arity = get_irn_arity(insn);
341 unsigned node_idx = get_irn_idx(node);
342 node_idx = uf_find(congruence_classes, node_idx);
344 for (int i = 0; i < arity; ++i) {
345 if (!rbitset_is_set(&req->other_same, i))
348 ir_node *op = get_irn_n(insn, i);
349 int op_idx = get_irn_idx(op);
350 op_idx = uf_find(congruence_classes, op_idx);
352 /* do we interfere with the value */
353 bool interferes = false;
354 foreach_ir_nodeset(live_nodes, live, iter) {
355 int lv_idx = get_irn_idx(live);
356 lv_idx = uf_find(congruence_classes, lv_idx);
357 if (lv_idx == op_idx) {
362 /* don't put in same affinity class if we interfere */
366 uf_union(congruence_classes, node_idx, op_idx);
367 DB((dbg, LEVEL_3, "Merge %+F and %+F congruence classes\n",
369 /* one should_be_same is enough... */
375 static void create_congruence_class(ir_node *block, void *data)
377 ir_nodeset_t live_nodes;
380 ir_nodeset_init(&live_nodes);
381 be_liveness_end_of_block(lv, cls, block, &live_nodes);
383 /* check should be same constraints */
384 sched_foreach_reverse(block, node) {
388 be_foreach_definition(node, cls, value, req,
389 congruence_def(&live_nodes, value, req);
391 be_liveness_transfer(cls, node, &live_nodes);
394 /* check phi congruence classes */
395 sched_foreach(block, phi) {
399 if (!arch_irn_consider_in_reg_alloc(cls, phi))
402 int node_idx = get_irn_idx(phi);
403 node_idx = uf_find(congruence_classes, node_idx);
405 int arity = get_irn_arity(phi);
406 for (int i = 0; i < arity; ++i) {
407 ir_node *op = get_Phi_pred(phi, i);
408 int op_idx = get_irn_idx(op);
409 op_idx = uf_find(congruence_classes, op_idx);
411 /* do we interfere with the value */
412 bool interferes = false;
413 foreach_ir_nodeset(&live_nodes, live, iter) {
414 int lv_idx = get_irn_idx(live);
415 lv_idx = uf_find(congruence_classes, lv_idx);
416 if (lv_idx == op_idx) {
421 /* don't put in same affinity class if we interfere */
424 /* any other phi has the same input? */
425 sched_foreach(block, phi) {
430 if (!arch_irn_consider_in_reg_alloc(cls, phi))
432 oop = get_Phi_pred(phi, i);
435 oop_idx = get_irn_idx(oop);
436 oop_idx = uf_find(congruence_classes, oop_idx);
437 if (oop_idx == op_idx) {
445 /* merge the 2 congruence classes and sum up their preferences */
446 int old_node_idx = node_idx;
447 node_idx = uf_union(congruence_classes, node_idx, op_idx);
448 DB((dbg, LEVEL_3, "Merge %+F and %+F congruence classes\n",
451 old_node_idx = node_idx == old_node_idx ? op_idx : old_node_idx;
452 allocation_info_t *head_info
453 = get_allocation_info(get_idx_irn(irg, node_idx));
454 allocation_info_t *other_info
455 = get_allocation_info(get_idx_irn(irg, old_node_idx));
456 for (unsigned r = 0; r < n_regs; ++r) {
457 head_info->prefs[r] += other_info->prefs[r];
461 ir_nodeset_destroy(&live_nodes);
464 static void set_congruence_prefs(ir_node *node, void *data)
467 unsigned node_idx = get_irn_idx(node);
468 unsigned node_set = uf_find(congruence_classes, node_idx);
470 /* head of congruence class or not in any class */
471 if (node_set == node_idx)
474 if (!arch_irn_consider_in_reg_alloc(cls, node))
477 ir_node *head = get_idx_irn(irg, node_set);
478 allocation_info_t *head_info = get_allocation_info(head);
479 allocation_info_t *info = get_allocation_info(node);
481 memcpy(info->prefs, head_info->prefs, n_regs * sizeof(info->prefs[0]));
484 static void combine_congruence_classes(void)
486 size_t n = get_irg_last_idx(irg);
487 congruence_classes = XMALLOCN(int, n);
488 uf_init(congruence_classes, n);
490 /* create congruence classes */
491 irg_block_walk_graph(irg, create_congruence_class, NULL, NULL);
492 /* merge preferences */
493 irg_walk_graph(irg, set_congruence_prefs, NULL, NULL);
494 free(congruence_classes);
500 * Assign register reg to the given node.
502 * @param node the node
503 * @param reg the register
505 static void use_reg(ir_node *node, const arch_register_t *reg, unsigned width)
507 unsigned r = reg->index;
508 for (unsigned r0 = r; r0 < r + width; ++r0)
509 assignments[r0] = node;
510 arch_set_irn_register(node, reg);
513 static void free_reg_of_value(ir_node *node)
515 if (!arch_irn_consider_in_reg_alloc(cls, node))
518 const arch_register_t *reg = arch_get_irn_register(node);
519 const arch_register_req_t *req = arch_get_irn_register_req(node);
520 unsigned r = reg->index;
521 /* assignment->value may be NULL if a value is used at 2 inputs
522 * so it gets freed twice. */
523 for (unsigned r0 = r; r0 < r + req->width; ++r0) {
524 assert(assignments[r0] == node || assignments[r0] == NULL);
525 assignments[r0] = NULL;
530 * Compare two register preferences in decreasing order.
532 static int compare_reg_pref(const void *e1, const void *e2)
534 const reg_pref_t *rp1 = (const reg_pref_t*) e1;
535 const reg_pref_t *rp2 = (const reg_pref_t*) e2;
536 if (rp1->pref < rp2->pref)
538 if (rp1->pref > rp2->pref)
543 static void fill_sort_candidates(reg_pref_t *regprefs,
544 const allocation_info_t *info)
546 for (unsigned r = 0; r < n_regs; ++r) {
547 float pref = info->prefs[r];
549 regprefs[r].pref = pref;
551 /* TODO: use a stable sort here to avoid unnecessary register jumping */
552 qsort(regprefs, n_regs, sizeof(regprefs[0]), compare_reg_pref);
555 static bool try_optimistic_split(ir_node *to_split, ir_node *before,
556 float pref, float pref_delta,
557 unsigned *forbidden_regs, int recursion)
561 allocation_info_t *info = get_allocation_info(to_split);
564 /* stupid hack: don't optimistically split don't spill nodes...
565 * (so we don't split away the values produced because of
566 * must_be_different constraints) */
567 ir_node *original_insn = skip_Proj(info->original_value);
568 if (arch_get_irn_flags(original_insn) & arch_irn_flags_dont_spill)
571 const arch_register_t *from_reg = arch_get_irn_register(to_split);
572 unsigned from_r = from_reg->index;
573 ir_node *block = get_nodes_block(before);
574 float split_threshold = (float)get_block_execfreq(block) * SPLIT_DELTA;
576 if (pref_delta < split_threshold*0.5)
579 /* find the best free position where we could move to */
580 reg_pref_t *prefs = ALLOCAN(reg_pref_t, n_regs);
581 fill_sort_candidates(prefs, info);
583 for (i = 0; i < n_regs; ++i) {
584 /* we need a normal register which is not an output register
585 an different from the current register of to_split */
587 if (!rbitset_is_set(normal_regs, r))
589 if (rbitset_is_set(forbidden_regs, r))
594 /* is the split worth it? */
595 delta = pref_delta + prefs[i].pref;
596 if (delta < split_threshold) {
597 DB((dbg, LEVEL_3, "Not doing optimistical split of %+F (depth %d), win %f too low\n",
598 to_split, recursion, delta));
602 /* if the register is free then we can do the split */
603 if (assignments[r] == NULL)
606 /* otherwise we might try recursively calling optimistic_split */
607 if (recursion+1 > MAX_OPTIMISTIC_SPLIT_RECURSION)
610 float apref = prefs[i].pref;
611 float apref_delta = i+1 < n_regs ? apref - prefs[i+1].pref : 0;
612 apref_delta += pref_delta - split_threshold;
614 /* our source register isn't a useful destination for recursive
616 bool old_source_state = rbitset_is_set(forbidden_regs, from_r);
617 rbitset_set(forbidden_regs, from_r);
618 /* try recursive split */
619 bool res = try_optimistic_split(assignments[r], before, apref,
620 apref_delta, forbidden_regs, recursion+1);
621 /* restore our destination */
622 if (old_source_state) {
623 rbitset_set(forbidden_regs, from_r);
625 rbitset_clear(forbidden_regs, from_r);
634 const arch_register_t *reg = arch_register_for_index(cls, r);
635 ir_node *copy = be_new_Copy(block, to_split);
637 mark_as_copy_of(copy, to_split);
638 /* hacky, but correct here */
639 if (assignments[from_reg->index] == to_split)
640 free_reg_of_value(to_split);
641 use_reg(copy, reg, width);
642 sched_add_before(before, copy);
645 "Optimistic live-range split %+F move %+F(%s) -> %s before %+F (win %f, depth %d)\n",
646 copy, to_split, from_reg->name, reg->name, before, delta, recursion));
651 * Determine and assign a register for node @p node
653 static void assign_reg(ir_node const *const block, ir_node *const node, arch_register_req_t const *const req, unsigned *const forbidden_regs)
655 assert(!is_Phi(node));
656 /* preassigned register? */
657 arch_register_t const *final_reg = arch_get_irn_register(node);
658 unsigned const width = req->width;
659 if (final_reg != NULL) {
660 DB((dbg, LEVEL_2, "Preassignment %+F -> %s\n", node, final_reg->name));
661 use_reg(node, final_reg, width);
665 /* ignore reqs must be preassigned */
666 assert(!arch_register_req_is(req, ignore));
668 /* give should_be_same boni */
669 allocation_info_t *info = get_allocation_info(node);
670 ir_node *in_node = skip_Proj(node);
671 if (arch_register_req_is(req, should_be_same)) {
672 float weight = (float)get_block_execfreq(block);
673 int arity = get_irn_arity(in_node);
675 assert(arity <= (int) sizeof(req->other_same) * 8);
676 for (int i = 0; i < arity; ++i) {
677 if (!rbitset_is_set(&req->other_same, i))
680 ir_node *in = get_irn_n(in_node, i);
681 const arch_register_t *reg = arch_get_irn_register(in);
682 unsigned reg_index = reg->index;
684 /* if the value didn't die here then we should not propagate the
685 * should_be_same info */
686 if (assignments[reg_index] == in)
689 info->prefs[reg_index] += weight * AFF_SHOULD_BE_SAME;
693 /* create list of register candidates and sort by their preference */
694 DB((dbg, LEVEL_2, "Candidates for %+F:", node));
695 reg_pref_t *reg_prefs = ALLOCAN(reg_pref_t, n_regs);
696 fill_sort_candidates(reg_prefs, info);
697 for (unsigned r = 0; r < n_regs; ++r) {
698 unsigned num = reg_prefs[r].num;
699 if (!rbitset_is_set(normal_regs, num))
701 const arch_register_t *reg = arch_register_for_index(cls, num);
702 DB((dbg, LEVEL_2, " %s(%f)", reg->name, reg_prefs[r].pref));
704 DB((dbg, LEVEL_2, "\n"));
706 const unsigned *allowed_regs = normal_regs;
707 if (arch_register_req_is(req, limited)) {
708 allowed_regs = req->limited;
711 unsigned final_reg_index = 0;
713 for (r = 0; r < n_regs; ++r) {
714 final_reg_index = reg_prefs[r].num;
715 if (!rbitset_is_set(allowed_regs, final_reg_index))
717 /* alignment constraint? */
719 if (arch_register_req_is(req, aligned) && (final_reg_index % width) != 0)
722 for (unsigned r0 = r+1; r0 < r+width; ++r0) {
723 if (assignments[r0] != NULL)
726 /* TODO: attempt optimistic split here */
731 if (assignments[final_reg_index] == NULL)
733 float pref = reg_prefs[r].pref;
734 float delta = r+1 < n_regs ? pref - reg_prefs[r+1].pref : 0;
735 ir_node *before = skip_Proj(node);
737 = try_optimistic_split(assignments[final_reg_index], before, pref,
738 delta, forbidden_regs, 0);
743 /* the common reason to hit this panic is when 1 of your nodes is not
744 * register pressure faithful */
745 panic("No register left for %+F\n", node);
748 final_reg = arch_register_for_index(cls, final_reg_index);
749 DB((dbg, LEVEL_2, "Assign %+F -> %s\n", node, final_reg->name));
750 use_reg(node, final_reg, width);
754 * Add an permutation in front of a node and change the assignments
755 * due to this permutation.
757 * To understand this imagine a permutation like this:
767 * First we count how many destinations a single value has. At the same time
768 * we can be sure that each destination register has at most 1 source register
769 * (it can have 0 which means we don't care what value is in it).
770 * We ignore all fulfilled permuations (like 7->7)
771 * In a first pass we create as much copy instructions as possible as they
772 * are generally cheaper than exchanges. We do this by counting into how many
773 * destinations a register has to be copied (in the example it's 2 for register
774 * 3, or 1 for the registers 1,2,4 and 7).
775 * We can then create a copy into every destination register when the usecount
776 * of that register is 0 (= noone else needs the value in the register).
778 * After this step we should only have cycles left. We implement a cyclic
779 * permutation of n registers with n-1 transpositions.
781 * @param live_nodes the set of live nodes, updated due to live range split
782 * @param before the node before we add the permutation
783 * @param permutation the permutation array indices are the destination
784 * registers, the values in the array are the source
787 static void permute_values(ir_nodeset_t *live_nodes, ir_node *before,
788 unsigned *permutation)
790 unsigned *n_used = ALLOCANZ(unsigned, n_regs);
792 /* determine how often each source register needs to be read */
793 for (unsigned r = 0; r < n_regs; ++r) {
794 unsigned old_reg = permutation[r];
797 value = assignments[old_reg];
799 /* nothing to do here, reg is not live. Mark it as fixpoint
800 * so we ignore it in the next steps */
808 ir_node *block = get_nodes_block(before);
810 /* step1: create copies where immediately possible */
811 for (unsigned r = 0; r < n_regs; /* empty */) {
812 unsigned old_r = permutation[r];
814 /* - no need to do anything for fixed points.
815 - we can't copy if the value in the dest reg is still needed */
816 if (old_r == r || n_used[r] > 0) {
822 ir_node *src = assignments[old_r];
823 ir_node *copy = be_new_Copy(block, src);
824 sched_add_before(before, copy);
825 const arch_register_t *reg = arch_register_for_index(cls, r);
826 DB((dbg, LEVEL_2, "Copy %+F (from %+F, before %+F) -> %s\n",
827 copy, src, before, reg->name));
828 mark_as_copy_of(copy, src);
829 unsigned width = 1; /* TODO */
830 use_reg(copy, reg, width);
832 if (live_nodes != NULL) {
833 ir_nodeset_insert(live_nodes, copy);
836 /* old register has 1 user less, permutation is resolved */
837 assert(arch_get_irn_register(src)->index == old_r);
840 assert(n_used[old_r] > 0);
842 if (n_used[old_r] == 0) {
843 if (live_nodes != NULL) {
844 ir_nodeset_remove(live_nodes, src);
846 free_reg_of_value(src);
849 /* advance or jump back (if this copy enabled another copy) */
850 if (old_r < r && n_used[old_r] == 0) {
857 /* at this point we only have "cycles" left which we have to resolve with
859 * TODO: if we have free registers left, then we should really use copy
860 * instructions for any cycle longer than 2 registers...
861 * (this is probably architecture dependent, there might be archs where
862 * copies are preferable even for 2-cycles) */
864 /* create perms with the rest */
865 for (unsigned r = 0; r < n_regs; /* empty */) {
866 unsigned old_r = permutation[r];
873 /* we shouldn't have copies from 1 value to multiple destinations left*/
874 assert(n_used[old_r] == 1);
876 /* exchange old_r and r2; after that old_r is a fixed point */
877 unsigned r2 = permutation[old_r];
879 ir_node *in[2] = { assignments[r2], assignments[old_r] };
880 ir_node *perm = be_new_Perm(cls, block, 2, in);
881 sched_add_before(before, perm);
882 DB((dbg, LEVEL_2, "Perm %+F (perm %+F,%+F, before %+F)\n",
883 perm, in[0], in[1], before));
885 unsigned width = 1; /* TODO */
887 ir_node *proj0 = new_r_Proj(perm, get_irn_mode(in[0]), 0);
888 mark_as_copy_of(proj0, in[0]);
889 const arch_register_t *reg0 = arch_register_for_index(cls, old_r);
890 use_reg(proj0, reg0, width);
892 ir_node *proj1 = new_r_Proj(perm, get_irn_mode(in[1]), 1);
893 mark_as_copy_of(proj1, in[1]);
894 const arch_register_t *reg1 = arch_register_for_index(cls, r2);
895 use_reg(proj1, reg1, width);
897 /* 1 value is now in the correct register */
898 permutation[old_r] = old_r;
899 /* the source of r changed to r2 */
902 /* if we have reached a fixpoint update data structures */
903 if (live_nodes != NULL) {
904 ir_nodeset_remove(live_nodes, in[0]);
905 ir_nodeset_remove(live_nodes, in[1]);
906 ir_nodeset_remove(live_nodes, proj0);
907 ir_nodeset_insert(live_nodes, proj1);
912 /* now we should only have fixpoints left */
913 for (unsigned r = 0; r < n_regs; ++r) {
914 assert(permutation[r] == r);
920 * Free regs for values last used.
922 * @param live_nodes set of live nodes, will be updated
923 * @param node the node to consider
925 static void free_last_uses(ir_nodeset_t *live_nodes, ir_node *node)
927 allocation_info_t *info = get_allocation_info(node);
928 const unsigned *last_uses = info->last_uses;
929 int arity = get_irn_arity(node);
931 for (int i = 0; i < arity; ++i) {
932 /* check if one operand is the last use */
933 if (!rbitset_is_set(last_uses, i))
936 ir_node *op = get_irn_n(node, i);
937 free_reg_of_value(op);
938 ir_nodeset_remove(live_nodes, op);
943 * change inputs of a node to the current value (copies/perms)
945 static void rewire_inputs(ir_node *node)
947 int arity = get_irn_arity(node);
948 for (int i = 0; i < arity; ++i) {
949 ir_node *op = get_irn_n(node, i);
950 allocation_info_t *info = try_get_allocation_info(op);
955 info = get_allocation_info(info->original_value);
956 if (info->current_value != op) {
957 set_irn_n(node, i, info->current_value);
963 * Create a bitset of registers occupied with value living through an
966 static void determine_live_through_regs(unsigned *bitset, ir_node *node)
968 const allocation_info_t *info = get_allocation_info(node);
970 /* mark all used registers as potentially live-through */
971 for (unsigned r = 0; r < n_regs; ++r) {
972 if (assignments[r] == NULL)
974 if (!rbitset_is_set(normal_regs, r))
977 rbitset_set(bitset, r);
980 /* remove registers of value dying at the instruction */
981 int arity = get_irn_arity(node);
982 for (int i = 0; i < arity; ++i) {
983 if (!rbitset_is_set(info->last_uses, i))
986 ir_node *op = get_irn_n(node, i);
987 const arch_register_t *reg = arch_get_irn_register(op);
988 rbitset_clear(bitset, reg->index);
992 static void solve_lpp(ir_nodeset_t *live_nodes, ir_node *node,
993 unsigned *forbidden_regs, unsigned *live_through_regs)
995 unsigned *forbidden_edges = rbitset_malloc(n_regs * n_regs);
996 int *lpp_vars = XMALLOCNZ(int, n_regs*n_regs);
998 lpp_t *lpp = lpp_new("prefalloc", lpp_minimize);
999 //lpp_set_time_limit(lpp, 20);
1000 lpp_set_log(lpp, stdout);
1002 /** mark some edges as forbidden */
1003 be_foreach_use(node, cls, req, op, op_req,
1004 if (!arch_register_req_is(req, limited))
1007 const unsigned *limited = req->limited;
1008 const arch_register_t *reg = arch_get_irn_register(op);
1009 unsigned current_reg = reg->index;
1010 for (unsigned r = 0; r < n_regs; ++r) {
1011 if (rbitset_is_set(limited, r))
1014 rbitset_set(forbidden_edges, current_reg*n_regs + r);
1018 /* add all combinations, except for not allowed ones */
1019 for (unsigned l = 0; l < n_regs; ++l) {
1020 if (!rbitset_is_set(normal_regs, l)) {
1022 snprintf(name, sizeof(name), "%u_to_%u", l, l);
1023 lpp_vars[l*n_regs+l] = lpp_add_var(lpp, name, lpp_binary, 1);
1027 for (unsigned r = 0; r < n_regs; ++r) {
1028 if (!rbitset_is_set(normal_regs, r))
1030 if (rbitset_is_set(forbidden_edges, l*n_regs + r))
1032 /* livethrough values may not use constrained output registers */
1033 if (rbitset_is_set(live_through_regs, l)
1034 && rbitset_is_set(forbidden_regs, r))
1038 snprintf(name, sizeof(name), "%u_to_%u", l, r);
1040 double costs = l==r ? 9 : 8;
1041 lpp_vars[l*n_regs+r]
1042 = lpp_add_var(lpp, name, lpp_binary, costs);
1043 assert(lpp_vars[l*n_regs+r] > 0);
1046 /* add constraints */
1047 for (unsigned l = 0; l < n_regs; ++l) {
1048 /* only 1 destination per register */
1049 int constraint = -1;
1050 for (unsigned r = 0; r < n_regs; ++r) {
1051 int var = lpp_vars[l*n_regs+r];
1054 if (constraint < 0) {
1056 snprintf(name, sizeof(name), "%u_to_dest", l);
1057 constraint = lpp_add_cst(lpp, name, lpp_equal, 1);
1059 lpp_set_factor_fast(lpp, constraint, var, 1);
1061 /* each destination used by at most 1 value */
1063 for (unsigned r = 0; r < n_regs; ++r) {
1064 int var = lpp_vars[r*n_regs+l];
1067 if (constraint < 0) {
1069 snprintf(name, sizeof(name), "one_to_%u", l);
1070 constraint = lpp_add_cst(lpp, name, lpp_less_equal, 1);
1072 lpp_set_factor_fast(lpp, constraint, var, 1);
1076 lpp_dump_plain(lpp, fopen("lppdump.txt", "w"));
1079 lpp_solve(lpp, be_options.ilp_server, be_options.ilp_solver);
1080 if (!lpp_is_sol_valid(lpp))
1081 panic("ilp solution not valid!");
1083 unsigned *assignment = ALLOCAN(unsigned, n_regs);
1084 for (unsigned l = 0; l < n_regs; ++l) {
1085 unsigned dest_reg = (unsigned)-1;
1086 for (unsigned r = 0; r < n_regs; ++r) {
1087 int var = lpp_vars[l*n_regs+r];
1090 double val = lpp_get_var_sol(lpp, var);
1092 assert(dest_reg == (unsigned)-1);
1096 assert(dest_reg != (unsigned)-1);
1097 assignment[dest_reg] = l;
1100 fprintf(stderr, "Assignment: ");
1101 for (unsigned l = 0; l < n_regs; ++l) {
1102 fprintf(stderr, "%u ", assignment[l]);
1104 fprintf(stderr, "\n");
1106 permute_values(live_nodes, node, assignment);
1110 static bool is_aligned(unsigned num, unsigned alignment)
1112 unsigned mask = alignment-1;
1113 assert(is_po2(alignment));
1114 return (num&mask) == 0;
1118 * Enforce constraints at a node by live range splits.
1120 * @param live_nodes the set of live nodes, might be changed
1121 * @param node the current node
1123 static void enforce_constraints(ir_nodeset_t *live_nodes, ir_node *node,
1124 unsigned *forbidden_regs)
1126 /* see if any use constraints are not met and whether double-width
1127 * values are involved */
1128 bool double_width = false;
1130 be_foreach_use(node, cls, req, op, op_req,
1131 /* are there any limitations for the i'th operand? */
1133 double_width = true;
1134 const arch_register_t *reg = arch_get_irn_register(op);
1135 unsigned reg_index = reg->index;
1136 if (arch_register_req_is(req, aligned)) {
1137 if (!is_aligned(reg_index, req->width)) {
1142 if (!arch_register_req_is(req, limited))
1145 const unsigned *limited = req->limited;
1146 if (!rbitset_is_set(limited, reg_index)) {
1147 /* found an assignment outside the limited set */
1153 /* is any of the live-throughs using a constrained output register? */
1154 unsigned *live_through_regs = NULL;
1155 be_foreach_definition(node, cls, value, req,
1158 double_width = true;
1159 if (!arch_register_req_is(req, limited))
1161 if (live_through_regs == NULL) {
1162 live_through_regs = rbitset_alloca(n_regs);
1163 determine_live_through_regs(live_through_regs, node);
1165 rbitset_or(forbidden_regs, req->limited, n_regs);
1166 if (rbitsets_have_common(req->limited, live_through_regs, n_regs))
1173 /* create these arrays if we haven't yet */
1174 if (live_through_regs == NULL) {
1175 live_through_regs = rbitset_alloca(n_regs);
1179 /* only the ILP variant can solve this yet */
1180 solve_lpp(live_nodes, node, forbidden_regs, live_through_regs);
1184 /* at this point we have to construct a bipartite matching problem to see
1185 * which values should go to which registers
1186 * Note: We're building the matrix in "reverse" - source registers are
1187 * right, destinations left because this will produce the solution
1188 * in the format required for permute_values.
1190 hungarian_problem_t *bp
1191 = hungarian_new(n_regs, n_regs, HUNGARIAN_MATCH_PERFECT);
1193 /* add all combinations, then remove not allowed ones */
1194 for (unsigned l = 0; l < n_regs; ++l) {
1195 if (!rbitset_is_set(normal_regs, l)) {
1196 hungarian_add(bp, l, l, 1);
1200 for (unsigned r = 0; r < n_regs; ++r) {
1201 if (!rbitset_is_set(normal_regs, r))
1203 /* livethrough values may not use constrainted output registers */
1204 if (rbitset_is_set(live_through_regs, l)
1205 && rbitset_is_set(forbidden_regs, r))
1208 hungarian_add(bp, r, l, l == r ? 9 : 8);
1212 be_foreach_use(node, cls, req, op, op_req,
1213 if (!arch_register_req_is(req, limited))
1216 const unsigned *limited = req->limited;
1217 const arch_register_t *reg = arch_get_irn_register(op);
1218 unsigned current_reg = reg->index;
1219 for (unsigned r = 0; r < n_regs; ++r) {
1220 if (rbitset_is_set(limited, r))
1222 hungarian_remove(bp, r, current_reg);
1226 //hungarian_print_cost_matrix(bp, 1);
1227 hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
1229 unsigned *assignment = ALLOCAN(unsigned, n_regs);
1230 int res = hungarian_solve(bp, assignment, NULL, 0);
1235 permute_values(live_nodes, node, assignment);
1238 /** test whether a node @p n is a copy of the value of node @p of */
1239 static bool is_copy_of(ir_node *value, ir_node *test_value)
1241 if (value == test_value)
1244 allocation_info_t *info = get_allocation_info(value);
1245 allocation_info_t *test_info = get_allocation_info(test_value);
1246 return test_info->original_value == info->original_value;
1250 * find a value in the end-assignment of a basic block
1251 * @returns the index into the assignment array if found
1254 static int find_value_in_block_info(block_info_t *info, ir_node *value)
1256 ir_node **end_assignments = info->assignments;
1257 for (unsigned r = 0; r < n_regs; ++r) {
1258 ir_node *a_value = end_assignments[r];
1260 if (a_value == NULL)
1262 if (is_copy_of(a_value, value))
1270 * Create the necessary permutations at the end of a basic block to fullfill
1271 * the register assignment for phi-nodes in the next block
1273 static void add_phi_permutations(ir_node *block, int p)
1275 ir_node *pred = get_Block_cfgpred_block(block, p);
1276 block_info_t *pred_info = get_block_info(pred);
1278 /* predecessor not processed yet? nothing to do */
1279 if (!pred_info->processed)
1282 unsigned *permutation = ALLOCAN(unsigned, n_regs);
1283 for (unsigned r = 0; r < n_regs; ++r) {
1287 /* check phi nodes */
1288 bool need_permutation = false;
1289 ir_node *phi = sched_first(block);
1290 for ( ; is_Phi(phi); phi = sched_next(phi)) {
1291 if (!arch_irn_consider_in_reg_alloc(cls, phi))
1294 ir_node *phi_pred = get_Phi_pred(phi, p);
1295 int a = find_value_in_block_info(pred_info, phi_pred);
1298 const arch_register_t *reg = arch_get_irn_register(phi);
1299 int regn = reg->index;
1300 /* same register? nothing to do */
1304 ir_node *op = pred_info->assignments[a];
1305 const arch_register_t *op_reg = arch_get_irn_register(op);
1306 /* Virtual registers are ok, too. */
1307 if (op_reg->type & arch_register_type_virtual)
1310 permutation[regn] = a;
1311 need_permutation = true;
1314 if (need_permutation) {
1315 /* permute values at end of predecessor */
1316 ir_node **old_assignments = assignments;
1317 assignments = pred_info->assignments;
1318 permute_values(NULL, be_get_end_of_block_insertion_point(pred),
1320 assignments = old_assignments;
1323 /* change phi nodes to use the copied values */
1324 phi = sched_first(block);
1325 for ( ; is_Phi(phi); phi = sched_next(phi)) {
1326 if (!arch_irn_consider_in_reg_alloc(cls, phi))
1329 /* we have permuted all values into the correct registers so we can
1330 simply query which value occupies the phis register in the
1332 int a = arch_get_irn_register(phi)->index;
1333 ir_node *op = pred_info->assignments[a];
1334 set_Phi_pred(phi, p, op);
1339 * Set preferences for a phis register based on the registers used on the
1342 static void adapt_phi_prefs(ir_node *phi)
1344 ir_node *block = get_nodes_block(phi);
1345 allocation_info_t *info = get_allocation_info(phi);
1347 int arity = get_irn_arity(phi);
1348 for (int i = 0; i < arity; ++i) {
1349 ir_node *op = get_irn_n(phi, i);
1350 const arch_register_t *reg = arch_get_irn_register(op);
1354 /* we only give the bonus if the predecessor already has registers
1355 * assigned, otherwise we only see a dummy value
1356 * and any conclusions about its register are useless */
1357 ir_node *pred_block = get_Block_cfgpred_block(block, i);
1358 block_info_t *pred_block_info = get_block_info(pred_block);
1359 if (!pred_block_info->processed)
1362 /* give bonus for already assigned register */
1363 float weight = (float)get_block_execfreq(pred_block);
1364 info->prefs[reg->index] += weight * AFF_PHI;
1369 * After a phi has been assigned a register propagate preference inputs
1370 * to the phi inputs.
1372 static void propagate_phi_register(ir_node *phi, unsigned assigned_r)
1374 ir_node *block = get_nodes_block(phi);
1376 int arity = get_irn_arity(phi);
1377 for (int i = 0; i < arity; ++i) {
1378 ir_node *op = get_Phi_pred(phi, i);
1379 allocation_info_t *info = get_allocation_info(op);
1380 ir_node *pred_block = get_Block_cfgpred_block(block, i);
1382 = (float)get_block_execfreq(pred_block) * AFF_PHI;
1384 if (info->prefs[assigned_r] >= weight)
1387 /* promote the prefered register */
1388 for (unsigned r = 0; r < n_regs; ++r) {
1389 if (info->prefs[r] > -weight) {
1390 info->prefs[r] = -weight;
1393 info->prefs[assigned_r] = weight;
1396 propagate_phi_register(op, assigned_r);
1400 static void assign_phi_registers(ir_node *block)
1402 /* count phi nodes */
1404 sched_foreach(block, node) {
1407 if (!arch_irn_consider_in_reg_alloc(cls, node))
1415 /* build a bipartite matching problem for all phi nodes */
1416 hungarian_problem_t *bp
1417 = hungarian_new(n_phis, n_regs, HUNGARIAN_MATCH_PERFECT);
1419 sched_foreach(block, node) {
1422 if (!arch_irn_consider_in_reg_alloc(cls, node))
1425 /* give boni for predecessor colorings */
1426 adapt_phi_prefs(node);
1427 /* add stuff to bipartite problem */
1428 allocation_info_t *info = get_allocation_info(node);
1429 DB((dbg, LEVEL_3, "Prefs for %+F: ", node));
1430 for (unsigned r = 0; r < n_regs; ++r) {
1431 if (!rbitset_is_set(normal_regs, r))
1434 float costs = info->prefs[r];
1435 costs = costs < 0 ? -logf(-costs+1) : logf(costs+1);
1438 hungarian_add(bp, n, r, (int)costs);
1439 DB((dbg, LEVEL_3, " %s(%f)", arch_register_for_index(cls, r)->name,
1442 DB((dbg, LEVEL_3, "\n"));
1446 //hungarian_print_cost_matrix(bp, 7);
1447 hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
1449 unsigned *assignment = ALLOCAN(unsigned, n_regs);
1450 int res = hungarian_solve(bp, assignment, NULL, 0);
1455 sched_foreach(block, node) {
1458 if (!arch_irn_consider_in_reg_alloc(cls, node))
1460 const arch_register_req_t *req
1461 = arch_get_irn_register_req(node);
1463 unsigned r = assignment[n++];
1464 assert(rbitset_is_set(normal_regs, r));
1465 const arch_register_t *reg = arch_register_for_index(cls, r);
1466 DB((dbg, LEVEL_2, "Assign %+F -> %s\n", node, reg->name));
1467 use_reg(node, reg, req->width);
1469 /* adapt preferences for phi inputs */
1470 propagate_phi_register(node, r);
1474 static arch_register_req_t *allocate_reg_req(ir_graph *irg)
1476 struct obstack *obst = be_get_be_obst(irg);
1477 arch_register_req_t *req = OALLOCZ(obst, arch_register_req_t);
1482 * Walker: assign registers to all nodes of a block that
1483 * need registers from the currently considered register class.
1485 static void allocate_coalesce_block(ir_node *block, void *data)
1488 DB((dbg, LEVEL_2, "* Block %+F\n", block));
1490 /* clear assignments */
1491 block_info_t *block_info = get_block_info(block);
1492 assignments = block_info->assignments;
1494 ir_nodeset_t live_nodes;
1495 ir_nodeset_init(&live_nodes);
1497 /* gather regalloc infos of predecessor blocks */
1498 int n_preds = get_Block_n_cfgpreds(block);
1499 block_info_t **pred_block_infos = ALLOCAN(block_info_t*, n_preds);
1500 for (int i = 0; i < n_preds; ++i) {
1501 ir_node *pred = get_Block_cfgpred_block(block, i);
1502 block_info_t *pred_info = get_block_info(pred);
1503 pred_block_infos[i] = pred_info;
1506 ir_node **phi_ins = ALLOCAN(ir_node*, n_preds);
1508 /* collect live-in nodes and preassigned values */
1509 be_lv_foreach(lv, block, be_lv_state_in, node) {
1510 const arch_register_req_t *req = arch_get_irn_register_req(node);
1511 if (req->cls != cls)
1514 if (arch_register_req_is(req, ignore)) {
1515 allocation_info_t *info = get_allocation_info(node);
1516 info->current_value = node;
1518 const arch_register_t *reg = arch_get_irn_register(node);
1519 assert(reg != NULL); /* ignore values must be preassigned */
1520 use_reg(node, reg, req->width);
1524 /* check all predecessors for this value, if it is not everywhere the
1525 same or unknown then we have to construct a phi
1526 (we collect the potential phi inputs here) */
1527 bool need_phi = false;
1528 for (int p = 0; p < n_preds; ++p) {
1529 block_info_t *pred_info = pred_block_infos[p];
1531 if (!pred_info->processed) {
1532 /* use node for now, it will get fixed later */
1536 int a = find_value_in_block_info(pred_info, node);
1538 /* must live out of predecessor */
1540 phi_ins[p] = pred_info->assignments[a];
1541 /* different value from last time? then we need a phi */
1542 if (p > 0 && phi_ins[p-1] != phi_ins[p]) {
1549 ir_mode *mode = get_irn_mode(node);
1550 const arch_register_req_t *phi_req = cls->class_req;
1551 if (req->width > 1) {
1552 arch_register_req_t *new_req = allocate_reg_req(irg);
1554 new_req->type = req->type & arch_register_req_type_aligned;
1555 new_req->width = req->width;
1558 ir_node *phi = be_new_Phi(block, n_preds, phi_ins, mode,
1561 DB((dbg, LEVEL_3, "Create Phi %+F (for %+F) -", phi, node));
1562 #ifdef DEBUG_libfirm
1563 for (int pi = 0; pi < n_preds; ++pi) {
1564 DB((dbg, LEVEL_3, " %+F", phi_ins[pi]));
1566 DB((dbg, LEVEL_3, "\n"));
1568 mark_as_copy_of(phi, node);
1569 sched_add_after(block, phi);
1573 allocation_info_t *info = get_allocation_info(node);
1574 info->current_value = phi_ins[0];
1576 /* Grab 1 of the inputs we constructed (might not be the same as
1577 * "node" as we could see the same copy of the value in all
1582 /* if the node already has a register assigned use it */
1583 const arch_register_t *reg = arch_get_irn_register(node);
1585 use_reg(node, reg, req->width);
1588 /* remember that this node is live at the beginning of the block */
1589 ir_nodeset_insert(&live_nodes, node);
1592 /** Collects registers which must not be used for optimistic splits. */
1593 unsigned *const forbidden_regs = rbitset_alloca(n_regs);
1595 /* handle phis... */
1596 assign_phi_registers(block);
1598 /* all live-ins must have a register */
1600 foreach_ir_nodeset(&live_nodes, node, iter) {
1601 const arch_register_t *reg = arch_get_irn_register(node);
1602 assert(reg != NULL);
1606 /* assign instructions in the block */
1607 sched_foreach(block, node) {
1608 /* phis are already assigned */
1612 rewire_inputs(node);
1614 /* enforce use constraints */
1615 rbitset_clear_all(forbidden_regs, n_regs);
1616 enforce_constraints(&live_nodes, node, forbidden_regs);
1618 rewire_inputs(node);
1620 /* we may not use registers used for inputs for optimistic splits */
1621 be_foreach_use(node, cls, in_req, op, op_req,
1622 const arch_register_t *reg = arch_get_irn_register(op);
1623 rbitset_set(forbidden_regs, reg->index);
1626 /* free registers of values last used at this instruction */
1627 free_last_uses(&live_nodes, node);
1629 /* assign output registers */
1630 be_foreach_definition_(node, cls, value, req,
1631 assign_reg(block, value, req, forbidden_regs);
1635 ir_nodeset_destroy(&live_nodes);
1638 block_info->processed = true;
1640 /* permute values at end of predecessor blocks in case of phi-nodes */
1642 for (int p = 0; p < n_preds; ++p) {
1643 add_phi_permutations(block, p);
1647 /* if we have exactly 1 successor then we might be able to produce phi
1649 if (get_irn_n_edges_kind(block, EDGE_KIND_BLOCK) == 1) {
1650 const ir_edge_t *edge
1651 = get_irn_out_edge_first_kind(block, EDGE_KIND_BLOCK);
1652 ir_node *succ = get_edge_src_irn(edge);
1653 int p = get_edge_src_pos(edge);
1654 block_info_t *succ_info = get_block_info(succ);
1656 if (succ_info->processed) {
1657 add_phi_permutations(succ, p);
1662 typedef struct block_costs_t block_costs_t;
1663 struct block_costs_t {
1664 float costs; /**< costs of the block */
1665 int dfs_num; /**< depth first search number (to detect backedges) */
1668 static int cmp_block_costs(const void *d1, const void *d2)
1670 const ir_node * const *block1 = (const ir_node**)d1;
1671 const ir_node * const *block2 = (const ir_node**)d2;
1672 const block_costs_t *info1 = (const block_costs_t*)get_irn_link(*block1);
1673 const block_costs_t *info2 = (const block_costs_t*)get_irn_link(*block2);
1674 return QSORT_CMP(info2->costs, info1->costs);
1677 static void determine_block_order(void)
1679 ir_node **blocklist = be_get_cfgpostorder(irg);
1680 size_t n_blocks = ARR_LEN(blocklist);
1682 pdeq *worklist = new_pdeq();
1683 ir_node **order = XMALLOCN(ir_node*, n_blocks);
1686 /* clear block links... */
1687 for (size_t p = 0; p < n_blocks; ++p) {
1688 ir_node *block = blocklist[p];
1689 set_irn_link(block, NULL);
1692 /* walk blocks in reverse postorder, the costs for each block are the
1693 * sum of the costs of its predecessors (excluding the costs on backedges
1694 * which we can't determine) */
1695 for (size_t p = n_blocks; p > 0;) {
1696 block_costs_t *cost_info;
1697 ir_node *block = blocklist[--p];
1699 float execfreq = (float)get_block_execfreq(block);
1700 float costs = execfreq;
1701 int n_cfgpreds = get_Block_n_cfgpreds(block);
1702 for (int p2 = 0; p2 < n_cfgpreds; ++p2) {
1703 ir_node *pred_block = get_Block_cfgpred_block(block, p2);
1704 block_costs_t *pred_costs = (block_costs_t*)get_irn_link(pred_block);
1705 /* we don't have any info for backedges */
1706 if (pred_costs == NULL)
1708 costs += pred_costs->costs;
1711 cost_info = OALLOCZ(&obst, block_costs_t);
1712 cost_info->costs = costs;
1713 cost_info->dfs_num = dfs_num++;
1714 set_irn_link(block, cost_info);
1717 /* sort array by block costs */
1718 qsort(blocklist, n_blocks, sizeof(blocklist[0]), cmp_block_costs);
1720 ir_reserve_resources(irg, IR_RESOURCE_BLOCK_VISITED);
1721 inc_irg_block_visited(irg);
1723 for (size_t p = 0; p < n_blocks; ++p) {
1724 ir_node *block = blocklist[p];
1725 if (Block_block_visited(block))
1728 /* continually add predecessors with highest costs to worklist
1729 * (without using backedges) */
1731 block_costs_t *info = (block_costs_t*)get_irn_link(block);
1732 ir_node *best_pred = NULL;
1733 float best_costs = -1;
1734 int n_cfgpred = get_Block_n_cfgpreds(block);
1736 pdeq_putr(worklist, block);
1737 mark_Block_block_visited(block);
1738 for (int i = 0; i < n_cfgpred; ++i) {
1739 ir_node *pred_block = get_Block_cfgpred_block(block, i);
1740 block_costs_t *pred_info = (block_costs_t*)get_irn_link(pred_block);
1742 /* ignore backedges */
1743 if (pred_info->dfs_num > info->dfs_num)
1746 if (info->costs > best_costs) {
1747 best_costs = info->costs;
1748 best_pred = pred_block;
1752 } while (block != NULL && !Block_block_visited(block));
1754 /* now put all nodes in the worklist in our final order */
1755 while (!pdeq_empty(worklist)) {
1756 ir_node *pblock = (ir_node*)pdeq_getr(worklist);
1757 assert(order_p < n_blocks);
1758 order[order_p++] = pblock;
1761 assert(order_p == n_blocks);
1764 ir_free_resources(irg, IR_RESOURCE_BLOCK_VISITED);
1766 DEL_ARR_F(blocklist);
1768 obstack_free(&obst, NULL);
1769 obstack_init(&obst);
1771 block_order = order;
1772 n_block_order = n_blocks;
1775 static void free_block_order(void)
1781 * Run the register allocator for the current register class.
1783 static void be_pref_alloc_cls(void)
1785 be_assure_live_sets(irg);
1786 lv = be_get_irg_liveness(irg);
1788 ir_reserve_resources(irg, IR_RESOURCE_IRN_LINK);
1790 DB((dbg, LEVEL_2, "=== Allocating registers of %s ===\n", cls->name));
1792 be_clear_links(irg);
1794 irg_block_walk_graph(irg, NULL, analyze_block, NULL);
1795 combine_congruence_classes();
1797 for (size_t i = 0; i < n_block_order; ++i) {
1798 ir_node *block = block_order[i];
1799 allocate_coalesce_block(block, NULL);
1802 ir_free_resources(irg, IR_RESOURCE_IRN_LINK);
1805 static void dump(int mask, ir_graph *irg, const char *suffix)
1807 if (be_options.dump_flags & mask)
1808 dump_ir_graph(irg, suffix);
1812 * Run the spiller on the current graph.
1814 static void spill(void)
1816 /* make sure all nodes show their real register pressure */
1817 be_timer_push(T_RA_CONSTR);
1818 be_pre_spill_prepare_constr(irg, cls);
1819 be_timer_pop(T_RA_CONSTR);
1821 dump(DUMP_RA, irg, "spillprepare");
1824 be_timer_push(T_RA_SPILL);
1825 be_do_spill(irg, cls);
1826 be_timer_pop(T_RA_SPILL);
1828 be_timer_push(T_RA_SPILL_APPLY);
1829 check_for_memory_operands(irg);
1830 be_timer_pop(T_RA_SPILL_APPLY);
1832 dump(DUMP_RA, irg, "spill");
1836 * The pref register allocator for a whole procedure.
1838 static void be_pref_alloc(ir_graph *new_irg)
1840 obstack_init(&obst);
1844 /* determine a good coloring order */
1845 determine_block_order();
1847 const arch_env_t *arch_env = be_get_irg_arch_env(new_irg);
1848 int n_cls = arch_env->n_register_classes;
1849 for (int c = 0; c < n_cls; ++c) {
1850 cls = &arch_env->register_classes[c];
1851 if (arch_register_class_flags(cls) & arch_register_class_flag_manual_ra)
1854 stat_ev_ctx_push_str("regcls", cls->name);
1856 n_regs = arch_register_class_n_regs(cls);
1857 normal_regs = rbitset_malloc(n_regs);
1858 be_set_allocatable_regs(irg, cls, normal_regs);
1862 /* verify schedule and register pressure */
1863 be_timer_push(T_VERIFY);
1864 if (be_options.verify_option == BE_VERIFY_WARN) {
1865 be_verify_schedule(irg);
1866 be_verify_register_pressure(irg, cls);
1867 } else if (be_options.verify_option == BE_VERIFY_ASSERT) {
1868 assert(be_verify_schedule(irg) && "Schedule verification failed");
1869 assert(be_verify_register_pressure(irg, cls)
1870 && "Register pressure verification failed");
1872 be_timer_pop(T_VERIFY);
1874 be_timer_push(T_RA_COLOR);
1875 be_pref_alloc_cls();
1876 be_timer_pop(T_RA_COLOR);
1878 /* we most probably constructed new Phis so liveness info is invalid
1880 be_invalidate_live_sets(irg);
1883 stat_ev_ctx_pop("regcls");
1888 be_timer_push(T_RA_SPILL_APPLY);
1889 be_abi_fix_stack_nodes(irg);
1890 be_timer_pop(T_RA_SPILL_APPLY);
1892 be_timer_push(T_VERIFY);
1893 if (be_options.verify_option == BE_VERIFY_WARN) {
1894 be_verify_register_allocation(irg);
1895 } else if (be_options.verify_option == BE_VERIFY_ASSERT) {
1896 assert(be_verify_register_allocation(irg)
1897 && "Register allocation invalid");
1899 be_timer_pop(T_VERIFY);
1901 obstack_free(&obst, NULL);
1904 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_pref_alloc)
1905 void be_init_pref_alloc(void)
1907 static be_ra_t be_ra_pref = { be_pref_alloc };
1908 be_register_allocator("pref", &be_ra_pref);
1909 FIRM_DBG_REGISTER(dbg, "firm.be.prefalloc");