4 * @author Sebastian Hack
6 * Backend node support.
8 * This file provdies Perm, Copy, Spill and Reload nodes.
10 * Copyright (C) 2005 Universitaet Karlsruhe
11 * Released under the GPL
26 #include "bitfiddle.h"
36 #include "besched_t.h"
41 #define OUT_POS(x) (-((x) + 1))
43 /* Sometimes we want to put const nodes into get_irn_generic_attr ... */
44 #define get_irn_attr(irn) get_irn_generic_attr((ir_node *) (irn))
46 static unsigned be_node_tag = FOURCC('B', 'E', 'N', 'O');
49 typedef enum _node_kind_t {
60 be_req_kind_old_limited,
61 be_req_kind_negate_old_limited,
62 be_req_kind_single_reg
66 arch_register_req_t req;
68 arch_irn_flags_t flags;
71 void (*old_limited)(void *ptr, bitset_t *bs);
72 void *old_limited_env;
75 const arch_register_t *single_reg;
80 const arch_register_t *reg;
87 be_reg_data_t *reg_data;
91 be_node_attr_t node_attr;
92 int offset; /**< The offset by which the stack shall be increased/decreased. */
93 be_stack_dir_t dir; /**< The direction in which the stack shall be modified (along or in the other direction). */
97 be_node_attr_t node_attr;
103 be_node_attr_t node_attr;
108 be_frame_attr_t frame_attr;
109 ir_node *spill_ctx; /**< The node in whose context this spill was introduced. */
122 ir_op *op_be_RegParams;
123 ir_op *op_be_StackParam;
124 ir_op *op_be_FrameAddr;
125 ir_op *op_be_FrameLoad;
126 ir_op *op_be_FrameStore;
128 static int beo_base = -1;
130 static const ir_op_ops be_node_op_ops;
132 #define N irop_flag_none
133 #define L irop_flag_labeled
134 #define C irop_flag_commutative
135 #define X irop_flag_cfopcode
136 #define I irop_flag_ip_cfopcode
137 #define F irop_flag_fragile
138 #define Y irop_flag_forking
139 #define H irop_flag_highlevel
140 #define c irop_flag_constlike
141 #define K irop_flag_keep
143 void be_node_init(void) {
144 static int inited = 0;
151 /* Acquire all needed opcodes. */
152 beo_base = get_next_ir_opcodes(beo_Last - 1);
154 op_be_Spill = new_ir_op(beo_base + beo_Spill, "Spill", op_pin_state_mem_pinned, N, oparity_unary, 0, sizeof(be_spill_attr_t), &be_node_op_ops);
155 op_be_Reload = new_ir_op(beo_base + beo_Reload, "Reload", op_pin_state_mem_pinned, N, oparity_zero, 0, sizeof(be_frame_attr_t), &be_node_op_ops);
156 op_be_Perm = new_ir_op(beo_base + beo_Perm, "Perm", op_pin_state_pinned, N, oparity_variable, 0, sizeof(be_node_attr_t), &be_node_op_ops);
157 op_be_Copy = new_ir_op(beo_base + beo_Copy, "Copy", op_pin_state_floats, N, oparity_unary, 0, sizeof(be_node_attr_t), &be_node_op_ops);
158 op_be_Keep = new_ir_op(beo_base + beo_Keep, "Keep", op_pin_state_pinned, K, oparity_variable, 0, sizeof(be_node_attr_t), &be_node_op_ops);
159 op_be_Call = new_ir_op(beo_base + beo_Call, "Call", op_pin_state_pinned, N, oparity_variable, 0, sizeof(be_node_attr_t), &be_node_op_ops);
160 op_be_Return = new_ir_op(beo_base + beo_Return, "Return", op_pin_state_pinned, X, oparity_variable, 0, sizeof(be_node_attr_t), &be_node_op_ops);
161 op_be_Alloca = new_ir_op(beo_base + beo_Alloca, "Alloca", op_pin_state_pinned, N, oparity_unary, 0, sizeof(be_node_attr_t), &be_node_op_ops);
162 op_be_SetSP = new_ir_op(beo_base + beo_SetSP, "SetSP", op_pin_state_pinned, N, oparity_binary, 0, sizeof(be_stack_attr_t), &be_node_op_ops);
163 op_be_IncSP = new_ir_op(beo_base + beo_IncSP, "IncSP", op_pin_state_pinned, N, oparity_binary, 0, sizeof(be_stack_attr_t), &be_node_op_ops);
164 op_be_RegParams = new_ir_op(beo_base + beo_RegParams, "RegParams", op_pin_state_pinned, N, oparity_zero, 0, sizeof(be_node_attr_t), &be_node_op_ops);
165 op_be_StackParam = new_ir_op(beo_base + beo_StackParam, "StackParam", op_pin_state_pinned, N, oparity_unary, 0, sizeof(be_frame_attr_t), &be_node_op_ops);
166 op_be_FrameAddr = new_ir_op(beo_base + beo_FrameAddr, "FrameAddr", op_pin_state_pinned, N, oparity_binary, 0, sizeof(be_frame_attr_t), &be_node_op_ops);
167 op_be_FrameLoad = new_ir_op(beo_base + beo_FrameLoad, "FrameLoad", op_pin_state_pinned, N, oparity_any, 0, sizeof(be_frame_attr_t), &be_node_op_ops);
168 op_be_FrameStore = new_ir_op(beo_base + beo_FrameStore, "FrameStore", op_pin_state_pinned, N, oparity_any, 0, sizeof(be_frame_attr_t), &be_node_op_ops);
170 set_op_tag(op_be_Spill, &be_node_tag);
171 set_op_tag(op_be_Reload, &be_node_tag);
172 set_op_tag(op_be_Perm, &be_node_tag);
173 set_op_tag(op_be_Copy, &be_node_tag);
174 set_op_tag(op_be_Keep, &be_node_tag);
175 set_op_tag(op_be_Call, &be_node_tag);
176 set_op_tag(op_be_Return, &be_node_tag);
177 set_op_tag(op_be_Alloca, &be_node_tag);
178 set_op_tag(op_be_SetSP, &be_node_tag);
179 set_op_tag(op_be_IncSP, &be_node_tag);
180 set_op_tag(op_be_RegParams, &be_node_tag);
181 set_op_tag(op_be_StackParam, &be_node_tag);
182 set_op_tag(op_be_FrameLoad, &be_node_tag);
183 set_op_tag(op_be_FrameStore, &be_node_tag);
184 set_op_tag(op_be_FrameAddr, &be_node_tag);
187 static void *init_node_attr(ir_node* irn, int max_reg_data)
189 ir_graph *irg = get_irn_irg(irn);
190 be_node_attr_t *a = get_irn_attr(irn);
192 memset(a, 0, sizeof(get_op_attr_size(get_irn_op(irn))));
193 a->max_reg_data = max_reg_data;
196 if(max_reg_data > 0) {
199 a->reg_data = NEW_ARR_D(be_reg_data_t, get_irg_obstack(irg), max_reg_data);
200 memset(a->reg_data, 0, max_reg_data * sizeof(a->reg_data[0]));
201 for(i = 0; i < max_reg_data; ++i) {
202 a->reg_data[i].req.req.cls = NULL;
203 a->reg_data[i].req.req.type = arch_register_req_type_none;
210 static INLINE int is_be_node(const ir_node *irn)
212 return get_op_tag(get_irn_op(irn)) == &be_node_tag;
215 be_opcode_t be_get_irn_opcode(const ir_node *irn)
217 return is_be_node(irn) ? get_irn_opcode(irn) - beo_base : beo_NoBeOp;
220 static int redir_proj(const ir_node **node, int pos)
222 const ir_node *n = *node;
227 assert(pos == -1 && "Illegal pos for a Proj");
228 *node = irn = get_Proj_pred(n);
230 assert(get_irn_mode(irn) == mode_T);
231 *node = get_Proj_pred(irn);
233 return get_Proj_proj(n);
240 be_node_set_irn_reg(const void *_self, ir_node *irn, const arch_register_t *reg)
245 out_pos = redir_proj((const ir_node **) &irn, -1);
246 a = get_irn_attr(irn);
248 assert(is_be_node(irn));
249 assert(out_pos < a->max_reg_data && "position too high");
250 a->reg_data[out_pos].reg = reg;
254 ir_node *be_new_Spill(const arch_register_class_t *cls, const arch_register_class_t *cls_frame, ir_graph *irg, ir_node *bl, ir_node *frame, ir_node *to_spill, ir_node *ctx)
262 res = new_ir_node(NULL, irg, bl, op_be_Spill, mode_M, 2, in);
263 a = init_node_attr(res, 2);
264 a->frame_attr.ent = NULL;
265 a->frame_attr.offset = 0;
268 be_node_set_reg_class(res, 0, cls_frame);
269 be_node_set_reg_class(res, 1, cls);
273 ir_node *be_new_Reload(const arch_register_class_t *cls, const arch_register_class_t *cls_frame, ir_graph *irg, ir_node *bl, ir_node *frame, ir_node *mem, ir_mode *mode)
280 res = new_ir_node(NULL, irg, bl, op_be_Reload, mode, 2, in);
281 init_node_attr(res, 2);
282 be_node_set_reg_class(res, 0, cls_frame);
283 be_node_set_reg_class(res, -1, cls);
287 ir_node *(be_get_Reload_mem)(const ir_node *irn)
289 assert(be_is_Reload(irn));
290 return get_irn_n(irn, 1);
293 ir_node *be_new_Perm(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, int n, ir_node *in[])
296 ir_node *irn = new_ir_node(NULL, irg, bl, op_be_Perm, mode_T, n, in);
297 init_node_attr(irn, n);
298 for(i = 0; i < n; ++i) {
299 be_node_set_reg_class(irn, i, cls);
300 be_node_set_reg_class(irn, OUT_POS(i), cls);
306 ir_node *be_new_Copy(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, ir_node *op)
312 res = new_ir_node(NULL, irg, bl, op_be_Copy, get_irn_mode(op), 1, in);
313 init_node_attr(res, 1);
314 be_node_set_reg_class(res, 0, cls);
315 be_node_set_reg_class(res, OUT_POS(0), cls);
319 ir_node *be_new_Keep(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, int n, ir_node *in[])
324 irn = new_ir_node(NULL, irg, bl, op_be_Keep, mode_ANY, n, in);
325 init_node_attr(irn, n);
326 for(i = 0; i < n; ++i) {
327 be_node_set_reg_class(irn, i, cls);
333 ir_node *be_new_Call(ir_graph *irg, ir_node *bl, ir_node *mem, ir_node *sp, ir_node *ptr, int n_outs, int n, ir_node *in[])
339 real_in = malloc(sizeof(real_in[0]) * (real_n));
344 memcpy(&real_in[3], in, n * sizeof(in[0]));
346 irn = new_ir_node(NULL, irg, bl, op_be_Call, mode_T, real_n, real_in);
347 init_node_attr(irn, (n_outs > real_n ? n_outs : real_n));
351 entity *be_Call_get_entity(const ir_node *call)
353 be_call_attr_t *a = get_irn_attr(call);
354 assert(be_is_Call(call));
358 void be_Call_set_entity(ir_node *call, entity *ent)
360 be_call_attr_t *a = get_irn_attr(call);
361 assert(be_is_Call(call));
365 ir_node *be_new_Return(ir_graph *irg, ir_node *bl, int n, ir_node *in[])
367 ir_node *irn = new_ir_node(NULL, irg, bl, op_be_Return, mode_X, n, in);
368 init_node_attr(irn, n);
373 ir_node *be_new_IncSP(const arch_register_t *sp, ir_graph *irg, ir_node *bl, ir_node *old_sp, ir_node *mem, unsigned offset, be_stack_dir_t dir)
381 irn = new_ir_node(NULL, irg, bl, op_be_IncSP, sp->reg_class->mode, 2, in);
382 a = init_node_attr(irn, 1);
386 be_node_set_flags(irn, -1, arch_irn_flags_ignore);
388 /* Set output constraint to stack register. */
389 be_node_set_reg_class(irn, 0, sp->reg_class);
390 be_set_constr_single_reg(irn, -1, sp);
391 be_node_set_irn_reg(NULL, irn, sp);
396 ir_node *be_new_Alloca(const arch_register_t *sp, ir_graph *irg, ir_node *bl, ir_node *mem, ir_node *old_sp, ir_node *sz)
405 irn = new_ir_node(NULL, irg, bl, op_be_Alloca, mode_T, 3, in);
406 a = init_node_attr(irn, 3);
408 be_node_set_flags(irn, OUT_POS(pn_Alloc_res), arch_irn_flags_ignore);
410 /* Set output constraint to stack register. */
411 be_set_constr_single_reg(irn, OUT_POS(pn_Alloc_res), sp);
416 ir_node *be_new_SetSP(const arch_register_t *sp, ir_graph *irg, ir_node *bl, ir_node *old_sp, ir_node *op, ir_node *mem)
425 irn = new_ir_node(NULL, irg, bl, op_be_SetSP, get_irn_mode(old_sp), 3, in);
426 a = init_node_attr(irn, 3);
428 be_node_set_flags(irn, OUT_POS(0), arch_irn_flags_ignore);
430 /* Set output constraint to stack register. */
431 be_set_constr_single_reg(irn, OUT_POS(0), sp);
432 be_node_set_reg_class(irn, 1, sp->reg_class);
433 be_node_set_reg_class(irn, 2, sp->reg_class);
434 be_node_set_irn_reg(NULL, irn, sp);
439 ir_node *be_new_StackParam(const arch_register_class_t *cls, const arch_register_class_t *cls_frame, ir_graph *irg, ir_node *bl, ir_mode *mode, ir_node *frame_pointer, entity *ent)
445 in[0] = frame_pointer;
446 irn = new_ir_node(NULL, irg, bl, op_be_StackParam, mode, 1, in);
447 a = init_node_attr(irn, 1);
450 be_node_set_reg_class(irn, 0, cls_frame);
451 be_node_set_reg_class(irn, OUT_POS(0), cls);
455 ir_node *be_new_RegParams(ir_graph *irg, ir_node *bl, int n_outs)
460 irn = new_ir_node(NULL, irg, bl, op_be_RegParams, mode_T, 0, in);
461 init_node_attr(irn, n_outs);
465 ir_node *be_new_FrameLoad(const arch_register_class_t *cls_frame, const arch_register_class_t *cls_data,
466 ir_graph *irg, ir_node *bl, ir_node *mem, ir_node *frame, entity *ent)
474 irn = new_ir_node(NULL, irg, bl, op_be_FrameLoad, mode_T, 2, in);
475 a = init_node_attr(irn, 3);
478 be_node_set_reg_class(irn, 1, cls_frame);
479 be_node_set_reg_class(irn, OUT_POS(pn_Load_res), cls_data);
483 ir_node *be_new_FrameStore(const arch_register_class_t *cls_frame, const arch_register_class_t *cls_data,
484 ir_graph *irg, ir_node *bl, ir_node *mem, ir_node *frame, ir_node *data, entity *ent)
493 irn = new_ir_node(NULL, irg, bl, op_be_FrameStore, mode_T, 3, in);
494 a = init_node_attr(irn, 3);
497 be_node_set_reg_class(irn, 1, cls_frame);
498 be_node_set_reg_class(irn, 2, cls_data);
502 ir_node *be_new_FrameAddr(const arch_register_class_t *cls_frame, ir_graph *irg, ir_node *bl, ir_node *frame, entity *ent)
509 irn = new_ir_node(NULL, irg, bl, op_be_FrameAddr, get_irn_mode(frame), 1, in);
510 a = init_node_attr(irn, 1);
513 be_node_set_reg_class(irn, 0, cls_frame);
514 be_node_set_reg_class(irn, OUT_POS(0), cls_frame);
518 int be_is_Spill (const ir_node *irn) { return be_get_irn_opcode(irn) == beo_Spill ; }
519 int be_is_Reload (const ir_node *irn) { return be_get_irn_opcode(irn) == beo_Reload ; }
520 int be_is_Copy (const ir_node *irn) { return be_get_irn_opcode(irn) == beo_Copy ; }
521 int be_is_Perm (const ir_node *irn) { return be_get_irn_opcode(irn) == beo_Perm ; }
522 int be_is_Keep (const ir_node *irn) { return be_get_irn_opcode(irn) == beo_Keep ; }
523 int be_is_Call (const ir_node *irn) { return be_get_irn_opcode(irn) == beo_Call ; }
524 int be_is_Return (const ir_node *irn) { return be_get_irn_opcode(irn) == beo_Return ; }
525 int be_is_IncSP (const ir_node *irn) { return be_get_irn_opcode(irn) == beo_IncSP ; }
526 int be_is_SetSP (const ir_node *irn) { return be_get_irn_opcode(irn) == beo_SetSP ; }
527 int be_is_Alloca (const ir_node *irn) { return be_get_irn_opcode(irn) == beo_Alloca ; }
528 int be_is_RegParams (const ir_node *irn) { return be_get_irn_opcode(irn) == beo_RegParams ; }
529 int be_is_StackParam (const ir_node *irn) { return be_get_irn_opcode(irn) == beo_StackParam ; }
530 int be_is_FrameAddr (const ir_node *irn) { return be_get_irn_opcode(irn) == beo_FrameAddr ; }
531 int be_is_FrameLoad (const ir_node *irn) { return be_get_irn_opcode(irn) == beo_FrameLoad ; }
532 int be_is_FrameStore (const ir_node *irn) { return be_get_irn_opcode(irn) == beo_FrameStore ; }
534 int be_has_frame_entity(const ir_node *irn)
536 switch(be_get_irn_opcode(irn)) {
549 entity *be_get_frame_entity(const ir_node *irn)
551 if(be_has_frame_entity(irn)) {
552 be_frame_attr_t *a = get_irn_attr(irn);
558 static void be_limited(void *data, bitset_t *bs)
560 be_req_t *req = data;
563 case be_req_kind_negate_old_limited:
564 case be_req_kind_old_limited:
565 req->x.old_limited.old_limited(req->x.old_limited.old_limited_env, bs);
566 if(req->kind == be_req_kind_negate_old_limited)
569 case be_req_kind_single_reg:
570 bitset_clear_all(bs);
571 bitset_set(bs, req->x.single_reg->index);
576 static INLINE be_req_t *get_req(ir_node *irn, int pos)
578 int idx = pos < 0 ? -(pos + 1) : pos;
579 be_node_attr_t *a = get_irn_attr(irn);
580 be_reg_data_t *rd = &a->reg_data[idx];
581 be_req_t *r = pos < 0 ? &rd->req : &rd->in_req;
583 assert(is_be_node(irn));
584 assert(!(pos >= 0) || pos < get_irn_arity(irn));
585 assert(!(pos < 0) || -(pos + 1) <= a->max_reg_data);
590 void be_set_constr_single_reg(ir_node *irn, int pos, const arch_register_t *reg)
592 be_req_t *r = get_req(irn, pos);
594 r->kind = be_req_kind_single_reg;
595 r->x.single_reg = reg;
596 r->req.limited = be_limited;
597 r->req.limited_env = r;
598 r->req.type = arch_register_req_type_limited;
599 r->req.cls = reg->reg_class;
602 void be_set_constr_limited(ir_node *irn, int pos, const arch_register_req_t *req)
604 be_req_t *r = get_req(irn, pos);
606 assert(arch_register_req_is(req, limited));
608 r->kind = be_req_kind_old_limited;
609 r->req.limited = be_limited;
610 r->req.limited_env = r;
611 r->req.type = arch_register_req_type_limited;
612 r->req.cls = req->cls;
614 r->x.old_limited.old_limited = req->limited;
615 r->x.old_limited.old_limited_env = req->limited_env;
618 void be_node_set_flags(ir_node *irn, int pos, arch_irn_flags_t flags)
620 be_req_t *r = get_req(irn, pos);
624 void be_node_set_reg_class(ir_node *irn, int pos, const arch_register_class_t *cls)
626 be_req_t *r = get_req(irn, pos);
628 if(r->req.type == arch_register_req_type_none)
629 r->req.type = arch_register_req_type_normal;
632 void be_set_IncSP_offset(ir_node *irn, unsigned offset)
634 be_stack_attr_t *a = get_irn_attr(irn);
635 assert(be_is_IncSP(irn));
639 unsigned be_get_IncSP_offset(const ir_node *irn)
641 be_stack_attr_t *a = get_irn_attr(irn);
642 assert(be_is_IncSP(irn));
646 void be_set_IncSP_direction(ir_node *irn, be_stack_dir_t dir)
648 be_stack_attr_t *a = get_irn_attr(irn);
649 assert(be_is_IncSP(irn));
653 be_stack_dir_t be_get_IncSP_direction(const ir_node *irn)
655 be_stack_attr_t *a = get_irn_attr(irn);
656 assert(be_is_IncSP(irn));
660 void be_set_Spill_entity(ir_node *irn, entity *ent)
662 be_spill_attr_t *a = get_irn_attr(irn);
663 assert(be_is_Spill(irn));
664 a->frame_attr.ent = ent;
667 static ir_node *find_a_spill_walker(ir_node *irn, unsigned visited_nr)
669 unsigned nr = get_irn_visited(irn);
671 set_irn_visited(irn, visited_nr);
675 if(nr < visited_nr) {
676 for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
677 ir_node *n = find_a_spill_walker(get_irn_n(irn, i), visited_nr);
684 else if(be_get_irn_opcode(irn) == beo_Spill)
690 ir_node *be_get_Spill_context(const ir_node *irn) {
691 const be_spill_attr_t *a = get_irn_attr(irn);
692 assert(be_is_Spill(irn));
697 * Finds a spill for a reload.
698 * If the reload is directly using the spill, this is simple,
699 * else we perform DFS from the reload (over all PhiMs) and return
700 * the first spill node we find.
702 static INLINE ir_node *find_a_spill(const ir_node *irn)
704 ir_graph *irg = get_irn_irg(irn);
705 unsigned visited_nr = get_irg_visited(irg) + 1;
707 assert(be_is_Reload(irn));
708 set_irg_visited(irg, visited_nr);
709 return find_a_spill_walker(be_get_Reload_mem(irn), visited_nr);
712 entity *be_get_spill_entity(const ir_node *irn)
714 int opc = get_irn_opcode(irn);
716 switch(be_get_irn_opcode(irn)) {
719 ir_node *spill = find_a_spill(irn);
720 return be_get_spill_entity(spill);
724 be_spill_attr_t *a = get_irn_attr(irn);
725 return a->frame_attr.ent;
728 assert(0 && "Must give spill/reload node");
735 static void entity_copy_walker(ir_node *irn, void *data)
737 if(be_is_Reload(irn)) {
738 be_frame_attr_t *a = get_irn_attr(irn);
739 entity *ent = be_get_spill_entity(irn);
745 void be_copy_entities_to_reloads(ir_graph *irg)
747 irg_walk_graph(irg, entity_copy_walker, NULL, NULL);
750 ir_node *be_spill(const arch_env_t *arch_env, ir_node *irn, ir_node *ctx)
752 ir_node *bl = get_nodes_block(irn);
753 ir_graph *irg = get_irn_irg(bl);
754 ir_node *frame = get_irg_frame(irg);
758 const arch_register_class_t *cls = arch_get_irn_reg_class(arch_env, irn, -1);
759 const arch_register_class_t *cls_frame = arch_get_irn_reg_class(arch_env, frame, -1);
761 spill = be_new_Spill(cls, cls_frame, irg, bl, frame, irn, ctx);
764 * search the right insertion point. a spill of a phi cannot be put
765 * directly after the phi, if there are some phis behind the one which
766 * is spilled. Also, a spill of a Proj must be after all Projs of the
769 insert = sched_next(irn);
770 while((is_Phi(insert) || is_Proj(insert)) && !sched_is_end(insert))
771 insert = sched_next(insert);
774 * Here's one special case:
775 * If the spill is in the start block, the spill must be after the frame
776 * pointer is set up. This is checked here and fixed.
778 if(bl == get_irg_start_block(irg))
779 insert = sched_next(frame);
781 sched_add_before(insert, spill);
785 ir_node *be_reload(const arch_env_t *arch_env, const arch_register_class_t *cls, ir_node *reloader, ir_mode *mode, ir_node *spill)
789 ir_node *bl = is_Block(reloader) ? reloader : get_nodes_block(reloader);
790 ir_graph *irg = get_irn_irg(bl);
791 ir_node *frame = get_irg_frame(irg);
792 const arch_register_class_t *cls_frame = arch_get_irn_reg_class(arch_env, frame, -1);
794 assert(be_is_Spill(spill) || (is_Phi(spill) && get_irn_mode(spill) == mode_M));
796 reload = be_new_Reload(cls, cls_frame, irg, bl, frame, spill, mode);
798 sched_add_before(reloader, reload);
802 static void *put_out_reg_req(arch_register_req_t *req, const ir_node *irn, int out_pos)
804 const be_node_attr_t *a = get_irn_attr(irn);
806 if(out_pos < a->max_reg_data)
807 memcpy(req, &a->reg_data[out_pos].req, sizeof(req[0]));
809 req->type = arch_register_req_type_none;
816 static void *put_in_reg_req(arch_register_req_t *req, const ir_node *irn, int pos)
818 const be_node_attr_t *a = get_irn_attr(irn);
819 int n = get_irn_arity(irn);
821 if(pos < get_irn_arity(irn) && pos < a->max_reg_data)
822 memcpy(req, &a->reg_data[pos].in_req, sizeof(req[0]));
824 req->type = arch_register_req_type_none;
831 static const arch_register_req_t *
832 be_node_get_irn_reg_req(const void *self, arch_register_req_t *req, const ir_node *irn, int pos)
837 if(get_irn_mode(irn) == mode_T)
840 out_pos = redir_proj((const ir_node **) &irn, pos);
841 assert(is_be_node(irn));
842 return put_out_reg_req(req, irn, out_pos);
846 return is_be_node(irn) ? put_in_reg_req(req, irn, pos) : NULL;
852 const arch_register_t *
853 be_node_get_irn_reg(const void *_self, const ir_node *irn)
858 out_pos = redir_proj((const ir_node **) &irn, -1);
859 a = get_irn_attr(irn);
861 assert(is_be_node(irn));
862 assert(out_pos < a->max_reg_data && "position too high");
864 return a->reg_data[out_pos].reg;
867 static arch_irn_class_t be_node_classify(const void *_self, const ir_node *irn)
869 redir_proj((const ir_node **) &irn, -1);
871 switch(be_get_irn_opcode(irn)) {
872 #define XXX(a,b) case beo_ ## a: return arch_irn_class_ ## b;
885 static arch_irn_flags_t be_node_get_flags(const void *_self, const ir_node *irn)
890 out_pos = redir_proj((const ir_node **) &irn, -1);
891 a = get_irn_attr(irn);
893 assert(is_be_node(irn));
894 assert(out_pos < a->max_reg_data && "position too high");
896 return a->reg_data[out_pos].req.flags;
899 static entity *be_node_get_frame_entity(const void *self, const ir_node *irn)
901 return be_get_frame_entity(irn);
904 static void be_node_set_frame_offset(const void *self, ir_node *irn, int offset)
906 if(be_has_frame_entity(irn)) {
907 be_frame_attr_t *a = get_irn_attr(irn);
913 static const arch_irn_ops_if_t be_node_irn_ops_if = {
914 be_node_get_irn_reg_req,
919 be_node_get_frame_entity,
920 be_node_set_frame_offset
923 static const arch_irn_ops_t be_node_irn_ops = {
927 const void *be_node_get_arch_ops(const arch_irn_handler_t *self, const ir_node *irn)
929 redir_proj((const ir_node **) &irn, -1);
930 return is_be_node(irn) ? &be_node_irn_ops : NULL;
933 const arch_irn_handler_t be_node_irn_handler = {
938 static void dump_node_req(FILE *f, be_req_t *req)
941 int did_something = 0;
942 const char *suffix = "";
944 if(req->flags != arch_irn_flags_none) {
945 fprintf(f, "flags: ");
946 for(i = arch_irn_flags_none; i <= log2_ceil(arch_irn_flags_last); ++i) {
947 if(req->flags & (1 << i)) {
948 fprintf(f, "%s%s", suffix, arch_irn_flag_str(1 << i));
956 if(req->req.cls != 0) {
959 arch_register_req_format(tmp, sizeof(tmp), &req->req);
960 fprintf(f, "%s", tmp);
968 static void dump_node_reqs(FILE *f, ir_node *irn)
971 be_node_attr_t *a = get_irn_attr(irn);
973 fprintf(f, "registers: \n");
974 for(i = 0; i < a->max_reg_data; ++i) {
975 be_reg_data_t *rd = &a->reg_data[i];
977 fprintf(f, "#%d: %s\n", i, rd->reg->name);
980 fprintf(f, "in requirements\n");
981 for(i = 0; i < a->max_reg_data; ++i) {
982 dump_node_req(f, &a->reg_data[i].in_req);
985 fprintf(f, "\nout requirements\n");
986 for(i = 0; i < a->max_reg_data; ++i) {
987 dump_node_req(f, &a->reg_data[i].req);
991 static int dump_node(ir_node *irn, FILE *f, dump_reason_t reason)
993 be_node_attr_t *at = get_irn_attr(irn);
995 assert(is_be_node(irn));
998 case dump_node_opcode_txt:
999 fprintf(f, get_op_name(get_irn_op(irn)));
1001 case dump_node_mode_txt:
1002 fprintf(f, get_mode_name(get_irn_mode(irn)));
1004 case dump_node_nodeattr_txt:
1006 case dump_node_info_txt:
1007 dump_node_reqs(f, irn);
1009 if(be_has_frame_entity(irn)) {
1010 be_frame_attr_t *a = (be_frame_attr_t *) at;
1012 ir_fprintf(f, "frame entity: %+F offset %x (%d)\n", a->ent, a->offset, a->offset);
1016 switch(be_get_irn_opcode(irn)) {
1019 be_spill_attr_t *a = (be_spill_attr_t *) at;
1020 ir_fprintf(f, "spill context: %+F\n", a->spill_ctx);
1026 be_stack_attr_t *a = (be_stack_attr_t *) at;
1027 fprintf(f, "offset: %u\n", a->offset);
1028 fprintf(f, "direction: %s\n", a->dir == be_stack_dir_along ? "along" : "against");
1039 * Copies the backend specific attributes from old node to new node.
1041 static void copy_attr(const ir_node *old_node, ir_node *new_node)
1043 be_node_attr_t *old_attr = get_irn_attr(old_node);
1044 be_node_attr_t *new_attr = get_irn_attr(new_node);
1047 assert(is_be_node(old_node));
1048 assert(is_be_node(new_node));
1050 memcpy(new_attr, old_attr, get_op_attr_size(get_irn_op(old_node)));
1051 new_attr->reg_data = NULL;
1053 if(new_attr->max_reg_data > 0) {
1054 new_attr->reg_data = NEW_ARR_D(be_reg_data_t, get_irg_obstack(get_irn_irg(new_node)), new_attr->max_reg_data);
1055 memcpy(new_attr->reg_data, old_attr->reg_data, new_attr->max_reg_data * sizeof(be_reg_data_t));
1057 for(i = 0; i < old_attr->max_reg_data; ++i) {
1060 r = &new_attr->reg_data[i].req;
1061 r->req.limited_env = r;
1063 r = &new_attr->reg_data[i].in_req;
1064 r->req.limited_env = r;
1069 static const ir_op_ops be_node_op_ops = {
1085 pset *nodes_live_at(const arch_env_t *arch_env, const arch_register_class_t *cls, const ir_node *pos, pset *live)
1087 firm_dbg_module_t *dbg = firm_dbg_register("firm.be.node");
1088 const ir_node *bl = is_Block(pos) ? pos : get_nodes_block(pos);
1092 live_foreach(bl, li) {
1093 ir_node *irn = (ir_node *) li->irn;
1094 if(live_is_end(li) && arch_irn_consider_in_reg_alloc(arch_env, cls, irn))
1095 pset_insert_ptr(live, irn);
1098 sched_foreach_reverse(bl, irn) {
1103 * If we encounter the node we want to insert the Perm after,
1104 * exit immediately, so that this node is still live
1109 DBG((dbg, LEVEL_1, "%+F\n", irn));
1110 for(x = pset_first(live); x; x = pset_next(live))
1111 DBG((dbg, LEVEL_1, "\tlive: %+F\n", x));
1113 if(arch_irn_consider_in_reg_alloc(arch_env, cls, irn))
1114 pset_remove_ptr(live, irn);
1116 for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
1117 ir_node *op = get_irn_n(irn, i);
1119 if(arch_irn_consider_in_reg_alloc(arch_env, cls, op))
1120 pset_insert_ptr(live, op);
1127 ir_node *insert_Perm_after(const arch_env_t *arch_env,
1128 const arch_register_class_t *cls,
1129 dom_front_info_t *dom_front,
1132 ir_node *bl = is_Block(pos) ? pos : get_nodes_block(pos);
1133 ir_graph *irg = get_irn_irg(bl);
1134 pset *live = pset_new_ptr_default();
1135 firm_dbg_module_t *dbg = firm_dbg_register("be.node");
1137 ir_node *curr, *irn, *perm, **nodes;
1140 DBG((dbg, LEVEL_1, "Insert Perm after: %+F\n", pos));
1142 if(!nodes_live_at(arch_env, cls, pos, live));
1144 n = pset_count(live);
1149 nodes = malloc(n * sizeof(nodes[0]));
1151 DBG((dbg, LEVEL_1, "live:\n"));
1152 for(irn = pset_first(live), i = 0; irn; irn = pset_next(live), i++) {
1153 DBG((dbg, LEVEL_1, "\t%+F\n", irn));
1157 perm = be_new_Perm(cls, irg, bl, n, nodes);
1158 sched_add_after(pos, perm);
1162 for(i = 0; i < n; ++i) {
1164 ir_node *perm_op = get_irn_n(perm, i);
1165 const arch_register_t *reg = arch_get_irn_register(arch_env, perm_op);
1167 ir_mode *mode = get_irn_mode(perm_op);
1168 ir_node *proj = new_r_Proj(irg, bl, perm, mode, i);
1169 arch_set_irn_register(arch_env, proj, reg);
1171 sched_add_after(curr, proj);
1174 copies[0] = perm_op;
1176 be_ssa_constr(dom_front, 2, copies);