4 * @author Sebastian Hack
6 * Backend node support.
8 * This file provdies Perm, Copy, Spill and Reload nodes.
10 * Copyright (C) 2005 Universitaet Karlsruhe
11 * Released under the GPL
35 #include "besched_t.h"
40 /* Sometimes we want to put const nodes into get_irn_generic_attr ... */
41 #define get_irn_attr(irn) get_irn_generic_attr((ir_node *) (irn))
43 static unsigned be_node_tag = FOURCC('B', 'E', 'N', 'O');
45 typedef enum _node_kind_t {
56 const arch_register_class_t *cls;
63 be_req_kind_old_limited,
64 be_req_kind_negate_old_limited,
65 be_req_kind_single_reg
69 arch_register_req_t req;
73 void (*old_limited)(void *ptr, bitset_t *bs);
74 void *old_limited_env;
77 const arch_register_t *single_reg;
82 const arch_register_t *reg;
89 arch_irn_flags_t flags;
90 const arch_register_class_t *cls;
91 be_reg_data_t *reg_data;
95 be_node_attr_t node_attr;
96 ir_node *spill_ctx; /**< The node in whose context this spill was introduced. */
97 entity *ent; /**< The entity in the stack frame the spill writes to. */
101 be_node_attr_t node_attr;
102 int offset; /**< The offset by which the stack shall be increased/decreased. */
103 be_stack_dir_t dir; /**< The direction in which the stack shall be modified (along or in the other direction). */
106 static ir_op *op_Spill;
107 static ir_op *op_Reload;
108 static ir_op *op_Perm;
109 static ir_op *op_Copy;
110 static ir_op *op_Keep;
111 static ir_op *op_Call;
112 static ir_op *op_IncSP;
113 static ir_op *op_AddSP;
114 static ir_op *op_RegParams;
115 static ir_op *op_StackParam;
116 static ir_op *op_NoReg;
118 static int beo_base = -1;
120 static const ir_op_ops be_node_op_ops;
122 #define N irop_flag_none
123 #define L irop_flag_labeled
124 #define C irop_flag_commutative
125 #define X irop_flag_cfopcode
126 #define I irop_flag_ip_cfopcode
127 #define F irop_flag_fragile
128 #define Y irop_flag_forking
129 #define H irop_flag_highlevel
130 #define c irop_flag_constlike
131 #define K irop_flag_keep
133 void be_node_init(void) {
134 static int inited = 0;
141 /* Acquire all needed opcodes. */
142 beo_base = get_next_ir_opcodes(beo_Last - 1);
144 op_Spill = new_ir_op(beo_base + beo_Spill, "Spill", op_pin_state_mem_pinned, N, oparity_unary, 0, sizeof(be_spill_attr_t), &be_node_op_ops);
145 op_Reload = new_ir_op(beo_base + beo_Reload, "Reload", op_pin_state_mem_pinned, N, oparity_zero, 0, sizeof(be_node_attr_t), &be_node_op_ops);
146 op_Perm = new_ir_op(beo_base + beo_Perm, "Perm", op_pin_state_pinned, N, oparity_variable, 0, sizeof(be_node_attr_t), &be_node_op_ops);
147 op_Copy = new_ir_op(beo_base + beo_Copy, "Copy", op_pin_state_floats, N, oparity_unary, 0, sizeof(be_node_attr_t), &be_node_op_ops);
148 op_Keep = new_ir_op(beo_base + beo_Keep, "Keep", op_pin_state_pinned, K, oparity_variable, 0, sizeof(be_node_attr_t), &be_node_op_ops);
149 op_NoReg = new_ir_op(beo_base + beo_NoReg, "NoReg", op_pin_state_floats, N, oparity_zero, 0, sizeof(be_node_attr_t), &be_node_op_ops);
150 op_Call = new_ir_op(beo_base + beo_Call, "Call", op_pin_state_pinned, N, oparity_variable, 0, sizeof(be_node_attr_t), &be_node_op_ops);
151 op_AddSP = new_ir_op(beo_base + beo_AddSP, "AddSP", op_pin_state_pinned, N, oparity_unary, 0, sizeof(be_stack_attr_t), &be_node_op_ops);
152 op_IncSP = new_ir_op(beo_base + beo_IncSP, "IncSP", op_pin_state_pinned, N, oparity_binary, 0, sizeof(be_stack_attr_t), &be_node_op_ops);
153 op_RegParams = new_ir_op(beo_base + beo_RegParams, "RegParams", op_pin_state_pinned, N, oparity_zero, 0, sizeof(be_node_attr_t), &be_node_op_ops);
154 op_StackParam = new_ir_op(beo_base + beo_StackParam, "StackParam", op_pin_state_pinned, N, oparity_unary, 0, sizeof(be_stack_attr_t), &be_node_op_ops);
156 set_op_tag(op_Spill, &be_node_tag);
157 set_op_tag(op_Reload, &be_node_tag);
158 set_op_tag(op_Perm, &be_node_tag);
159 set_op_tag(op_Copy, &be_node_tag);
160 set_op_tag(op_Keep, &be_node_tag);
161 set_op_tag(op_NoReg, &be_node_tag);
162 set_op_tag(op_Call, &be_node_tag);
163 set_op_tag(op_AddSP, &be_node_tag);
164 set_op_tag(op_IncSP, &be_node_tag);
165 set_op_tag(op_RegParams, &be_node_tag);
166 set_op_tag(op_StackParam, &be_node_tag);
169 static void *init_node_attr(ir_node* irn, const arch_register_class_t *cls, ir_graph *irg, int max_reg_data)
171 be_node_attr_t *a = get_irn_attr(irn);
173 a->max_reg_data = max_reg_data;
174 a->flags = arch_irn_flags_none;
178 if(max_reg_data > 0) {
181 a->reg_data = NEW_ARR_D(be_reg_data_t, get_irg_obstack(irg), max_reg_data);
182 memset(a->reg_data, 0, max_reg_data * sizeof(a->reg_data[0]));
183 for(i = 0; i < max_reg_data; ++i) {
184 a->reg_data[i].req.req.cls = cls;
185 a->reg_data[i].req.req.type = arch_register_req_type_normal;
192 static INLINE int is_be_node(const ir_node *irn)
194 return get_op_tag(get_irn_op(irn)) == &be_node_tag;
197 be_opcode_t get_irn_be_opcode(const ir_node *irn)
199 return is_be_node(irn) ? get_irn_opcode(irn) - beo_base : beo_NoBeOp;
202 static int redir_proj(const ir_node **node, int pos)
204 const ir_node *n = *node;
207 assert(pos == -1 && "Illegal pos for a Proj");
208 *node = get_Proj_pred(n);
209 return get_Proj_proj(n);
216 be_node_set_irn_reg(const void *_self, ir_node *irn, const arch_register_t *reg)
221 out_pos = redir_proj((const ir_node **) &irn, -1);
222 a = get_irn_attr(irn);
224 assert(is_be_node(irn));
225 assert(out_pos < a->max_reg_data && "position too high");
226 a->reg_data[out_pos].reg = reg;
230 ir_node *be_new_Spill(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, ir_node *to_spill, ir_node *ctx)
237 res = new_ir_node(NULL, irg, bl, op_Spill, mode_M, 1, in);
238 a = init_node_attr(res, cls, irg, 0);
244 ir_node *be_new_Reload(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, ir_mode *mode, ir_node *mem)
250 res = new_ir_node(NULL, irg, bl, op_Reload, mode, 1, in);
251 init_node_attr(res, cls, irg, 1);
255 ir_node *be_new_Perm(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, int n, ir_node *in[])
257 ir_node *irn = new_ir_node(NULL, irg, bl, op_Perm, mode_T, n, in);
258 init_node_attr(irn, cls, irg, n);
262 ir_node *be_new_Copy(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, ir_node *op)
268 res = new_ir_node(NULL, irg, bl, op_Copy, get_irn_mode(op), 1, in);
269 init_node_attr(res, cls, irg, 1);
273 ir_node *be_new_Keep(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, int n, ir_node *in[])
277 irn = new_ir_node(NULL, irg, bl, op_Keep, mode_ANY, n, in);
278 init_node_attr(irn, cls, irg, 0);
283 ir_node *be_new_Call(ir_graph *irg, ir_node *bl, ir_node *mem, ir_node *sp, ir_node *ptr, int n_outs, int n, ir_node *in[])
289 real_in = malloc(sizeof(real_in[0]) * (real_n));
294 memcpy(&real_in[3], in, n * sizeof(in[0]));
296 irn = new_ir_node(NULL, irg, bl, op_Call, mode_T, real_n, real_in);
297 init_node_attr(irn, NULL, irg, (n_outs > real_n ? n_outs : real_n));
301 ir_node *be_new_IncSP(const arch_register_t *sp, ir_graph *irg, ir_node *bl, ir_node *old_sp, unsigned offset, be_stack_dir_t dir)
308 irn = new_ir_node(NULL, irg, bl, op_IncSP, sp->reg_class->mode, 1, in);
309 a = init_node_attr(irn, sp->reg_class, irg, 1);
313 a->node_attr.flags |= arch_irn_flags_ignore;
315 /* Set output constraint to stack register. */
316 be_set_constr_single_reg(irn, -1, sp);
317 be_node_set_irn_reg(NULL, irn, sp);
322 ir_node *be_new_AddSP(const arch_register_t *sp, ir_graph *irg, ir_node *bl, ir_node *old_sp, ir_node *op)
330 irn = new_ir_node(NULL, irg, bl, op_AddSP, sp->reg_class->mode, 2, in);
331 a = init_node_attr(irn, sp->reg_class, irg, 1);
332 a->flags |= arch_irn_flags_ignore;
334 /* Set output constraint to stack register. */
335 be_set_constr_single_reg(irn, -1, sp);
336 be_node_set_irn_reg(NULL, irn, sp);
341 ir_node *be_new_NoReg(const arch_register_t *reg, ir_graph *irg, ir_node *bl)
347 irn = new_ir_node(NULL, irg, bl, op_NoReg, reg->reg_class->mode, 0, in);
348 a = init_node_attr(irn, reg->reg_class, irg, 1);
349 a->flags |= arch_irn_flags_ignore;
350 be_set_constr_single_reg(irn, -1, reg);
351 be_node_set_irn_reg(NULL, irn, reg);
355 ir_node *be_new_StackParam(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, ir_mode *mode, ir_node *frame_pointer, unsigned offset)
361 in[0] = frame_pointer;
362 irn = new_ir_node(NULL, irg, bl, op_StackParam, mode, 1, in);
363 a = init_node_attr(irn, cls, irg, 1);
368 ir_node *be_new_RegParams(ir_graph *irg, ir_node *bl, int n_outs)
373 irn = new_ir_node(NULL, irg, bl, op_RegParams, mode_T, 0, in);
374 init_node_attr(irn, NULL, irg, n_outs);
378 int be_is_Spill (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_Spill ; }
379 int be_is_Reload (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_Reload ; }
380 int be_is_Copy (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_Copy ; }
381 int be_is_Perm (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_Perm ; }
382 int be_is_Keep (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_Keep ; }
383 int be_is_Call (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_Call ; }
384 int be_is_IncSP (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_IncSP ; }
385 int be_is_AddSP (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_AddSP ; }
386 int be_is_RegParams (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_RegParams ; }
387 int be_is_StackParam (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_StackParam ; }
388 int be_is_NoReg (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_NoReg ; }
390 static void be_limited(void *data, bitset_t *bs)
392 be_req_t *req = data;
395 case be_req_kind_negate_old_limited:
396 case be_req_kind_old_limited:
397 req->x.old_limited.old_limited(req->x.old_limited.old_limited_env, bs);
398 if(req->kind == be_req_kind_negate_old_limited)
401 case be_req_kind_single_reg:
402 bitset_clear_all(bs);
403 bitset_set(bs, req->x.single_reg->index);
408 void be_set_constr_single_reg(ir_node *irn, int pos, const arch_register_t *reg)
410 int idx = pos < 0 ? -(pos - 1) : pos;
411 be_node_attr_t *a = get_irn_attr(irn);
412 be_reg_data_t *rd = &a->reg_data[idx];
413 be_req_t *r = pos < 0 ? &rd->req : &rd->in_req;
415 assert(is_be_node(irn));
416 assert(!(pos >= 0) || pos < get_irn_arity(irn));
417 assert(!(pos < 0) || -(pos + 1) <= a->max_reg_data);
419 r->kind = be_req_kind_single_reg;
420 r->x.single_reg = reg;
421 r->req.limited = be_limited;
422 r->req.limited_env = r;
423 r->req.type = arch_register_req_type_limited;
424 r->req.cls = reg->reg_class;
427 void be_set_constr_limited(ir_node *irn, int pos, const arch_register_req_t *req)
429 int idx = pos < 0 ? -(pos - 1) : pos;
430 be_node_attr_t *a = get_irn_attr(irn);
431 be_reg_data_t *rd = &a->reg_data[idx];
432 be_req_t *r = pos < 0 ? &rd->req : &rd->in_req;
434 assert(is_be_node(irn));
435 assert(!(pos >= 0) || pos < get_irn_arity(irn));
436 assert(!(pos < 0) || -(pos + 1) <= a->max_reg_data);
437 assert(arch_register_req_is(req, limited));
439 r->kind = be_req_kind_old_limited;
440 r->req.limited = be_limited;
441 r->req.limited_env = r;
442 r->req.type = arch_register_req_type_limited;
443 r->req.cls = req->cls;
445 r->x.old_limited.old_limited = req->limited;
446 r->x.old_limited.old_limited_env = req->limited_env;
449 void be_set_IncSP_offset(ir_node *irn, unsigned offset)
451 be_stack_attr_t *a = get_irn_attr(irn);
452 assert(be_is_IncSP(irn));
456 unsigned be_get_IncSP_offset(ir_node *irn)
458 be_stack_attr_t *a = get_irn_attr(irn);
459 assert(be_is_IncSP(irn));
463 void be_set_IncSP_direction(ir_node *irn, be_stack_dir_t dir)
465 be_stack_attr_t *a = get_irn_attr(irn);
466 assert(be_is_IncSP(irn));
470 be_stack_dir_t be_get_IncSP_direction(ir_node *irn)
472 be_stack_attr_t *a = get_irn_attr(irn);
473 assert(be_is_IncSP(irn));
477 void be_set_Spill_entity(ir_node *irn, entity *ent)
479 be_spill_attr_t *a = get_irn_attr(irn);
480 assert(be_is_Spill(irn));
484 static ir_node *find_a_spill_walker(ir_node *irn, unsigned visited_nr)
486 if(get_irn_visited(irn) < visited_nr) {
487 set_irn_visited(irn, visited_nr);
491 for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
492 ir_node *n = find_a_spill_walker(get_irn_n(irn, i), visited_nr);
498 else if(get_irn_be_opcode(irn) == beo_Spill)
505 ir_node *be_get_Spill_context(const ir_node *irn) {
506 const be_spill_attr_t *a = get_irn_attr(irn);
507 assert(be_is_Spill(irn));
512 * Finds a spill for a reload.
513 * If the reload is directly using the spill, this is simple,
514 * else we perform DFS from the reload (over all PhiMs) and return
515 * the first spill node we find.
517 static INLINE ir_node *find_a_spill(ir_node *irn)
519 ir_graph *irg = get_irn_irg(irn);
520 unsigned visited_nr = get_irg_visited(irg) + 1;
522 assert(be_is_Reload(irn));
523 set_irg_visited(irg, visited_nr);
524 return find_a_spill_walker(irn, visited_nr);
527 entity *be_get_spill_entity(ir_node *irn)
529 int opc = get_irn_opcode(irn);
531 switch(get_irn_be_opcode(irn)) {
533 return be_get_spill_entity(find_a_spill(irn));
536 be_spill_attr_t *a = get_irn_attr(irn);
540 assert(0 && "Must give spill/reload node");
546 ir_node *be_spill(const arch_env_t *arch_env, ir_node *irn, ir_node *ctx)
548 const arch_register_class_t *cls = arch_get_irn_reg_class(arch_env, irn, -1);
550 ir_node *bl = get_nodes_block(irn);
551 ir_graph *irg = get_irn_irg(bl);
552 ir_node *spill = be_new_Spill(cls, irg, bl, irn, ctx);
556 * search the right insertion point. a spill of a phi cannot be put
557 * directly after the phi, if there are some phis behind the one which
560 insert = sched_next(irn);
561 while(is_Phi(insert) && !sched_is_end(insert))
562 insert = sched_next(insert);
564 sched_add_before(insert, spill);
568 ir_node *be_reload(const arch_env_t *arch_env,
569 const arch_register_class_t *cls,
570 ir_node *irn, int pos, ir_mode *mode, ir_node *spill)
574 ir_node *bl = get_nodes_block(irn);
575 ir_graph *irg = get_irn_irg(bl);
577 assert(be_is_Spill(spill) || (is_Phi(spill) && get_irn_mode(spill) == mode_M));
579 reload = be_new_Reload(cls, irg, bl, mode, spill);
581 set_irn_n(irn, pos, reload);
582 sched_add_before(irn, reload);
586 static void *put_out_reg_req(arch_register_req_t *req, const ir_node *irn, int out_pos)
588 const be_node_attr_t *a = get_irn_attr(irn);
590 if(out_pos < a->max_reg_data)
591 memcpy(req, &a->reg_data[out_pos].req, sizeof(req[0]));
593 req->type = arch_register_req_type_none;
600 static void *put_in_reg_req(arch_register_req_t *req, const ir_node *irn, int pos)
602 const be_node_attr_t *a = get_irn_attr(irn);
603 int n = get_irn_arity(irn);
605 if(pos < get_irn_arity(irn))
606 memcpy(req, &a->reg_data[pos].in_req, sizeof(req[0]));
608 req->type = arch_register_req_type_none;
615 static const arch_register_req_t *
616 be_node_get_irn_reg_req(const void *self, arch_register_req_t *req, const ir_node *irn, int pos)
621 if(get_irn_mode(irn) == mode_T)
624 out_pos = redir_proj((const ir_node **) &irn, pos);
625 assert(is_be_node(irn));
626 return put_out_reg_req(req, irn, out_pos);
630 return is_be_node(irn) ? put_in_reg_req(req, irn, pos) : NULL;
636 const arch_register_t *
637 be_node_get_irn_reg(const void *_self, const ir_node *irn)
642 out_pos = redir_proj((const ir_node **) &irn, -1);
643 a = get_irn_attr(irn);
645 assert(is_be_node(irn));
646 assert(out_pos < a->max_reg_data && "position too high");
648 return a->reg_data[out_pos].reg;
651 arch_irn_class_t be_node_classify(const void *_self, const ir_node *irn)
653 redir_proj((const ir_node **) &irn, -1);
655 switch(get_irn_be_opcode(irn)) {
656 #define XXX(a,b) case beo_ ## a: return arch_irn_class_ ## b;
669 arch_irn_flags_t be_node_get_flags(const void *_self, const ir_node *irn)
671 be_node_attr_t *a = get_irn_attr(irn);
675 static const arch_irn_ops_if_t be_node_irn_ops_if = {
676 be_node_get_irn_reg_req,
683 static const arch_irn_ops_t be_node_irn_ops = {
687 const void *be_node_get_arch_ops(const arch_irn_handler_t *self, const ir_node *irn)
689 redir_proj((const ir_node **) &irn, -1);
690 return is_be_node(irn) ? &be_node_irn_ops : NULL;
693 const arch_irn_handler_t be_node_irn_handler = {
697 static int dump_node(ir_node *irn, FILE *f, dump_reason_t reason)
699 be_node_attr_t *at = get_irn_attr(irn);
702 assert(is_be_node(irn));
705 case dump_node_opcode_txt:
706 fprintf(f, get_op_name(get_irn_op(irn)));
708 case dump_node_mode_txt:
709 fprintf(f, get_mode_name(get_irn_mode(irn)));
711 case dump_node_nodeattr_txt:
713 case dump_node_info_txt:
714 fprintf(f, "reg class: %s\n", at->cls ? at->cls->name : "n/a");
715 for(i = 0; i < at->max_reg_data; ++i) {
716 const arch_register_t *reg = at->reg_data[i].reg;
717 fprintf(f, "reg #%d: %s\n", i, reg ? reg->name : "n/a");
720 switch(get_irn_be_opcode(irn)) {
723 be_spill_attr_t *a = (be_spill_attr_t *) at;
725 ir_fprintf(f, "spill context: %+F\n", a->spill_ctx);
727 unsigned ofs = get_entity_offset_bytes(a->ent);
728 ir_fprintf(f, "spill entity: %+F offset %x (%d)\n", a->ent, ofs, ofs);
731 ir_fprintf(f, "spill entity: n/a\n");
738 be_stack_attr_t *a = (be_stack_attr_t *) at;
739 fprintf(f, "offset: %u\n", a->offset);
740 fprintf(f, "direction: %s\n", a->dir == be_stack_dir_along ? "along" : "against");
750 void copy_attr(const ir_node *old_node, ir_node *new_node)
752 be_node_attr_t *old_attr = get_irn_attr(old_node);
753 be_node_attr_t *new_attr = get_irn_attr(new_node);
755 assert(is_be_node(old_node));
756 assert(is_be_node(new_node));
758 memcpy(new_attr, old_attr, get_op_attr_size(get_irn_op(old_node)));
759 new_attr->reg_data = NULL;
761 if(new_attr->max_reg_data > 0) {
762 new_attr->reg_data = NEW_ARR_D(be_reg_data_t, get_irg_obstack(get_irn_irg(new_node)), new_attr->max_reg_data);
763 memcpy(new_attr->reg_data, old_attr->reg_data, new_attr->max_reg_data * sizeof(be_reg_data_t));
767 static const ir_op_ops be_node_op_ops = {
783 pset *nodes_live_at(const arch_env_t *arch_env, const arch_register_class_t *cls, const ir_node *pos, pset *live)
785 firm_dbg_module_t *dbg = firm_dbg_register("firm.be.node");
786 const ir_node *bl = is_Block(pos) ? pos : get_nodes_block(pos);
790 live_foreach(bl, li) {
791 ir_node *irn = (ir_node *) li->irn;
792 if(live_is_end(li) && arch_irn_consider_in_reg_alloc(arch_env, cls, irn))
793 pset_insert_ptr(live, irn);
796 sched_foreach_reverse(bl, irn) {
801 * If we encounter the node we want to insert the Perm after,
802 * exit immediately, so that this node is still live
807 DBG((dbg, LEVEL_1, "%+F\n", irn));
808 for(x = pset_first(live); x; x = pset_next(live))
809 DBG((dbg, LEVEL_1, "\tlive: %+F\n", x));
811 if(arch_irn_consider_in_reg_alloc(arch_env, cls, irn))
812 pset_remove_ptr(live, irn);
814 for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
815 ir_node *op = get_irn_n(irn, i);
817 if(arch_irn_consider_in_reg_alloc(arch_env, cls, op))
818 pset_insert_ptr(live, op);
825 ir_node *insert_Perm_after(const arch_env_t *arch_env,
826 const arch_register_class_t *cls,
827 dom_front_info_t *dom_front,
830 ir_node *bl = is_Block(pos) ? pos : get_nodes_block(pos);
831 ir_graph *irg = get_irn_irg(bl);
832 pset *live = pset_new_ptr_default();
833 firm_dbg_module_t *dbg = firm_dbg_register("be.node");
835 ir_node *curr, *irn, *perm, **nodes;
838 DBG((dbg, LEVEL_1, "Insert Perm after: %+F\n", pos));
840 if(!nodes_live_at(arch_env, cls, pos, live));
842 n = pset_count(live);
847 nodes = malloc(n * sizeof(nodes[0]));
849 DBG((dbg, LEVEL_1, "live:\n"));
850 for(irn = pset_first(live), i = 0; irn; irn = pset_next(live), i++) {
851 DBG((dbg, LEVEL_1, "\t%+F\n", irn));
855 perm = be_new_Perm(cls, irg, bl, n, nodes);
856 sched_add_after(pos, perm);
860 for(i = 0; i < n; ++i) {
862 ir_node *perm_op = get_irn_n(perm, i);
863 const arch_register_t *reg = arch_get_irn_register(arch_env, perm_op);
865 ir_mode *mode = get_irn_mode(perm_op);
866 ir_node *proj = new_r_Proj(irg, bl, perm, mode, i);
867 arch_set_irn_register(arch_env, proj, reg);
869 sched_add_after(curr, proj);
873 be_ssa_constr_single(dom_front, perm_op, 1, copies);