4 * @author Sebastian Hack
6 * Backend node support.
8 * This file provdies Perm, Copy, Spill and Reload nodes.
10 * Copyright (C) 2005 Universitaet Karlsruhe
11 * Released under the GPL
35 #include "besched_t.h"
40 /* Sometimes we want to put const nodes into get_irn_generic_attr ... */
41 #define get_irn_attr(irn) get_irn_generic_attr((ir_node *) (irn))
43 static unsigned be_node_tag = FOURCC('B', 'E', 'N', 'O');
45 typedef enum _node_kind_t {
56 const arch_register_class_t *cls;
63 const arch_register_t *reg;
64 arch_register_req_t req;
69 const arch_register_class_t *cls;
70 be_reg_data_t *reg_data;
74 be_node_attr_t node_attr;
75 ir_node *spill_ctx; /**< The node in whose context this spill was introduced. */
76 unsigned offset; /**< The offset of the memory location the spill writes to
80 static ir_op *op_Spill;
81 static ir_op *op_Reload;
82 static ir_op *op_Perm;
83 static ir_op *op_Copy;
84 static ir_op *op_Keep;
86 static int beo_base = -1;
88 static const ir_op_ops be_node_op_ops;
90 void be_node_init(void) {
91 static int inited = 0;
99 beo_base = get_next_ir_opcode();
101 /* Acquire all needed opcodes. We assume that they are consecutive! */
102 for(i = beo_Spill; i < beo_Last; ++i)
103 get_next_ir_opcode();
105 op_Spill = new_ir_op(beo_base + beo_Spill, "Spill", op_pin_state_mem_pinned, 0, oparity_unary, 0, sizeof(be_spill_attr_t), &be_node_op_ops);
106 op_Reload = new_ir_op(beo_base + beo_Reload, "Reload", op_pin_state_mem_pinned, 0, oparity_zero, 0, sizeof(be_node_attr_t), &be_node_op_ops);
107 op_Perm = new_ir_op(beo_base + beo_Perm, "Perm", op_pin_state_pinned, 0, oparity_variable, 0, sizeof(be_node_attr_t), &be_node_op_ops);
108 op_Copy = new_ir_op(beo_base + beo_Copy, "Copy", op_pin_state_pinned, 0, oparity_unary, 0, sizeof(be_node_attr_t), &be_node_op_ops);
109 op_Keep = new_ir_op(beo_base + beo_Keep, "Keep", op_pin_state_pinned, 0, oparity_variable, 0, sizeof(be_node_attr_t), &be_node_op_ops);
111 set_op_tag(op_Spill, &be_node_tag);
112 set_op_tag(op_Reload, &be_node_tag);
113 set_op_tag(op_Perm, &be_node_tag);
114 set_op_tag(op_Copy, &be_node_tag);
115 set_op_tag(op_Keep, &be_node_tag);
118 static void *init_node_attr(ir_node* irn, const arch_register_class_t *cls, ir_graph *irg, int n_outs)
120 be_node_attr_t *a = get_irn_attr(irn);
129 a->reg_data = NEW_ARR_D(be_reg_data_t, get_irg_obstack(irg), n_outs);
130 memset(a->reg_data, 0, n_outs * sizeof(a->reg_data[0]));
131 for(i = 0; i < n_outs; ++i) {
132 a->reg_data[i].req.cls = cls;
133 a->reg_data[i].req.type = arch_register_req_type_normal;
140 static INLINE int is_be_node(const ir_node *irn)
142 return get_op_tag(get_irn_op(irn)) == &be_node_tag;
145 be_opcode_t get_irn_be_opcode(const ir_node *irn)
147 return is_be_node(irn) ? get_irn_opcode(irn) - beo_base : beo_NoBeOp;
150 ir_node *be_new_Spill(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, ir_node *to_spill, ir_node *ctx)
157 res = new_ir_node(NULL, irg, bl, op_Spill, mode_M, 1, in);
158 a = init_node_attr(res, cls, irg, 0);
159 a->offset = BE_SPILL_NO_OFFSET;
164 ir_node *be_new_Reload(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, ir_mode *mode, ir_node *mem)
170 res = new_ir_node(NULL, irg, bl, op_Reload, mode, 1, in);
171 init_node_attr(res, cls, irg, 1);
175 ir_node *be_new_Perm(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, int n, ir_node *in[])
177 ir_node *irn = new_ir_node(NULL, irg, bl, op_Perm, mode_T, n, in);
178 init_node_attr(irn, cls, irg, n);
182 ir_node *be_new_Copy(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, ir_node *op)
188 res = new_ir_node(NULL, irg, bl, op_Copy, get_irn_mode(op), 1, in);
189 init_node_attr(res, cls, irg, 1);
193 ir_node *be_new_Keep(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, int n, ir_node *in[])
197 irn = new_ir_node(NULL, irg, bl, op_Keep, mode_ANY, n, in);
198 init_node_attr(irn, cls, irg, 0);
203 int be_is_Spill(const ir_node *irn)
205 return get_irn_be_opcode(irn) == beo_Spill;
208 int be_is_Reload(const ir_node *irn)
210 return get_irn_be_opcode(irn) == beo_Reload;
213 int be_is_Copy(const ir_node *irn)
215 return get_irn_be_opcode(irn) == beo_Copy;
218 int be_is_Perm(const ir_node *irn)
220 return get_irn_be_opcode(irn) == beo_Perm;
223 int be_is_Keep(const ir_node *irn)
225 return get_irn_be_opcode(irn) == beo_Keep;
228 void be_set_Perm_out_req(ir_node *irn, int pos, const arch_register_req_t *req)
230 be_node_attr_t *a = get_irn_attr(irn);
232 assert(be_is_Perm(irn));
233 assert(pos >= 0 && pos < get_irn_arity(irn));
234 memcpy(&a->reg_data[pos].req, req, sizeof(req[0]));
237 void be_set_Spill_offset(ir_node *irn, unsigned offset)
239 be_spill_attr_t *a = get_irn_attr(irn);
240 assert(be_is_Spill(irn));
244 static ir_node *find_a_spill_walker(ir_node *irn, unsigned visited_nr)
246 if(get_irn_visited(irn) < visited_nr) {
247 set_irn_visited(irn, visited_nr);
251 for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
252 ir_node *n = find_a_spill_walker(get_irn_n(irn, i), visited_nr);
258 else if(get_irn_be_opcode(irn) == beo_Spill)
265 ir_node *be_get_Spill_context(const ir_node *irn) {
266 const be_spill_attr_t *a = get_irn_attr(irn);
267 assert(be_is_Spill(irn));
272 * Finds a spill for a reload.
273 * If the reload is directly using the spill, this is simple,
274 * else we perform DFS from the reload (over all PhiMs) and return
275 * the first spill node we find.
277 static INLINE ir_node *find_a_spill(ir_node *irn)
279 ir_graph *irg = get_irn_irg(irn);
280 unsigned visited_nr = get_irg_visited(irg) + 1;
282 assert(be_is_Reload(irn));
283 set_irg_visited(irg, visited_nr);
284 return find_a_spill_walker(irn, visited_nr);
288 unsigned be_get_spill_offset(ir_node *irn)
290 int opc = get_irn_opcode(irn);
292 switch(get_irn_be_opcode(irn)) {
294 return be_get_spill_offset(find_a_spill(irn));
297 be_spill_attr_t *a = get_irn_attr(irn);
301 assert(0 && "Must give spill/reload node");
304 return (unsigned) -1;
307 ir_node *be_spill(const arch_env_t *arch_env, ir_node *irn, ir_node *ctx)
309 const arch_register_class_t *cls = arch_get_irn_reg_class(arch_env, irn, -1);
311 ir_node *bl = get_nodes_block(irn);
312 ir_graph *irg = get_irn_irg(bl);
313 ir_node *spill = be_new_Spill(cls, irg, bl, irn, ctx);
317 * search the right insertion point. a spill of a phi cannot be put
318 * directly after the phi, if there are some phis behind the one which
321 insert = sched_next(irn);
322 while(is_Phi(insert) && !sched_is_end(insert))
323 insert = sched_next(insert);
325 sched_add_before(insert, spill);
329 ir_node *be_reload(const arch_env_t *arch_env,
330 const arch_register_class_t *cls,
331 ir_node *irn, int pos, ir_mode *mode, ir_node *spill)
335 ir_node *bl = get_nodes_block(irn);
336 ir_graph *irg = get_irn_irg(bl);
338 assert(be_is_Spill(spill) || (is_Phi(spill) && get_irn_mode(spill) == mode_M));
340 reload = be_new_Reload(cls, irg, bl, mode, spill);
342 set_irn_n(irn, pos, reload);
343 sched_add_before(irn, reload);
347 static int redir_proj(const ir_node **node, int pos)
349 const ir_node *n = *node;
352 assert(pos == -1 && "Illegal pos for a Proj");
353 *node = get_Proj_pred(n);
354 return get_Proj_proj(n);
360 static void *put_out_reg_req(arch_register_req_t *req, const ir_node *irn, int out_pos)
362 const be_node_attr_t *a = get_irn_attr(irn);
365 if(out_pos < a->n_outs)
366 memcpy(req, &a->reg_data[out_pos].req, sizeof(req[0]));
368 req->type = arch_register_req_type_none;
375 static void *put_in_reg_req(arch_register_req_t *req, const ir_node *irn, int pos)
377 const be_node_attr_t *a = get_irn_attr(irn);
378 int n = get_irn_arity(irn);
380 req->type = arch_register_req_type_none;
383 switch(get_irn_be_opcode(irn)) {
389 req->type = arch_register_req_type_normal;
401 static const arch_register_req_t *
402 be_node_get_irn_reg_req(const void *self, arch_register_req_t *req, const ir_node *irn, int pos)
407 if(get_irn_mode(irn) == mode_T)
410 out_pos = redir_proj((const ir_node **) &irn, pos);
411 assert(is_be_node(irn));
412 return put_out_reg_req(req, irn, out_pos);
416 return is_be_node(irn) ? put_in_reg_req(req, irn, pos) : NULL;
423 be_node_set_irn_reg(const void *_self, ir_node *irn, const arch_register_t *reg)
428 out_pos = redir_proj(&irn, -1);
429 a = get_irn_attr(irn);
431 assert(is_be_node(irn));
432 assert(out_pos < a->n_outs && "position too high");
433 a->reg_data[out_pos].reg = reg;
436 const arch_register_t *
437 be_node_get_irn_reg(const void *_self, const ir_node *irn)
442 out_pos = redir_proj(&irn, -1);
443 a = get_irn_attr(irn);
445 assert(is_be_node(irn));
446 assert(out_pos < a->n_outs && "position too high");
448 return a->reg_data[out_pos].reg;
451 arch_irn_class_t be_node_classify(const void *_self, const ir_node *irn)
453 redir_proj(&irn, -1);
455 switch(get_irn_be_opcode(irn)) {
456 #define XXX(a,b) case beo_ ## a: return arch_irn_class_ ## b;
469 arch_irn_class_t be_node_get_flags(const void *_self, const ir_node *irn)
474 static const arch_irn_ops_if_t be_node_irn_ops_if = {
475 be_node_get_irn_reg_req,
482 static const arch_irn_ops_t be_node_irn_ops = {
486 const void *be_node_get_arch_ops(const arch_irn_handler_t *self, const ir_node *irn)
488 redir_proj((const ir_node **) &irn, -1);
489 return is_be_node(irn) ? &be_node_irn_ops : NULL;
492 const arch_irn_handler_t be_node_irn_handler = {
496 static int dump_node(ir_node *irn, FILE *f, dump_reason_t reason)
498 be_node_attr_t *at = get_irn_attr(irn);
501 assert(is_be_node(irn));
504 case dump_node_opcode_txt:
505 fprintf(f, get_op_name(get_irn_op(irn)));
507 case dump_node_mode_txt:
508 fprintf(f, get_mode_name(get_irn_mode(irn)));
510 case dump_node_nodeattr_txt:
512 case dump_node_info_txt:
513 fprintf(f, "reg class: %s\n", at->cls->name);
514 for(i = 0; i < at->n_outs; ++i) {
515 const arch_register_t *reg = at->reg_data[i].reg;
516 fprintf(f, "reg #%d: %s\n", i, reg ? reg->name : "n/a");
519 if(get_irn_be_opcode(irn) == beo_Spill) {
520 be_spill_attr_t *a = (be_spill_attr_t *) at;
521 ir_fprintf(f, "spill context: %+F\n", a->spill_ctx);
522 ir_fprintf(f, "spill offset: %04x (%u)\n", a->offset, a->offset);
530 static const ir_op_ops be_node_op_ops = {
546 ir_node *insert_Perm_after(const arch_env_t *arch_env,
547 const arch_register_class_t *cls,
548 dom_front_info_t *dom_front,
551 ir_node *bl = is_Block(pos) ? pos : get_nodes_block(pos);
552 ir_graph *irg = get_irn_irg(bl);
553 pset *live = pset_new_ptr_default();
554 firm_dbg_module_t *dbg = firm_dbg_register("be.node");
557 ir_node *curr, *irn, *perm, **nodes;
560 DBG((dbg, LEVEL_1, "Insert Perm after: %+F\n", pos));
563 live_foreach(bl, li) {
564 ir_node *irn = (ir_node *) li->irn;
565 if(live_is_end(li) && arch_irn_has_reg_class(arch_env, irn, -1, cls))
566 pset_insert_ptr(live, irn);
569 sched_foreach_reverse(bl, irn) {
573 * If we encounter the node we want to insert the Perm after,
574 * exit immediately, so that this node is still live
579 DBG((dbg, LEVEL_1, "%+F\n", irn));
580 for(x = pset_first(live); x; x = pset_next(live))
581 DBG((dbg, LEVEL_1, "\tlive: %+F\n", x));
583 if(arch_irn_has_reg_class(arch_env, irn, -1, cls))
584 pset_remove_ptr(live, irn);
586 for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
587 ir_node *op = get_irn_n(irn, i);
589 if(arch_irn_has_reg_class(arch_env, op, -1, cls))
590 pset_insert_ptr(live, op);
594 n = pset_count(live);
599 nodes = malloc(n * sizeof(nodes[0]));
601 DBG((dbg, LEVEL_1, "live:\n"));
602 for(irn = pset_first(live), i = 0; irn; irn = pset_next(live), i++) {
603 DBG((dbg, LEVEL_1, "\t%+F\n", irn));
607 perm = be_new_Perm(cls, irg, bl, n, nodes);
608 sched_add_after(pos, perm);
612 for(i = 0; i < n; ++i) {
614 ir_node *perm_op = get_irn_n(perm, i);
615 const arch_register_t *reg = arch_get_irn_register(arch_env, perm_op);
617 ir_mode *mode = get_irn_mode(perm_op);
618 ir_node *proj = new_r_Proj(irg, bl, perm, mode, i);
619 arch_set_irn_register(arch_env, proj, reg);
621 sched_add_after(curr, proj);
625 be_introduce_copies(dom_front, perm_op, 1, copies);