3 * @author Sebastian Hack
13 #include <libcore/lc_opts.h>
14 #include <libcore/lc_opts_enum.h>
15 #endif /* WITH_LIBCORE */
26 #include "iredges_t.h"
31 #include "firm/bearch_firm.h"
32 #include "ia32/bearch_ia32.h"
39 #include "besched_t.h"
40 #include "belistsched.h"
42 #include "bespillilp.h"
43 #include "bespillbelady.h"
45 #include "beraextern.h"
46 #include "bechordal_t.h"
48 #include "beifg_impl.h"
49 #include "becopyopt.h"
50 #include "becopystat.h"
51 #include "bessadestr.h"
55 #define DUMP_INITIAL (1 << 0)
56 #define DUMP_ABI (1 << 1)
57 #define DUMP_SCHED (1 << 2)
58 #define DUMP_PREPARED (1 << 3)
59 #define DUMP_RA (1 << 4)
60 #define DUMP_FINAL (1 << 5)
62 /* options visible for anyone */
63 be_options_t be_options = {
65 "i44pc52.info.uni-karlsruhe.de",
72 static unsigned dump_flags = 2 * DUMP_FINAL - 1;
74 /* register allocator to use. */
75 static const be_ra_t *ra = &be_ra_external_allocator;
77 /* back end instruction set architecture to use */
78 static const arch_isa_if_t *isa_if = &ia32_isa_if;
81 static lc_opt_entry_t *be_grp_root = NULL;
83 /* possible dumping options */
84 static const lc_opt_enum_mask_items_t dump_items[] = {
86 { "initial", DUMP_INITIAL },
88 { "sched", DUMP_SCHED },
89 { "prepared", DUMP_PREPARED },
90 { "regalloc", DUMP_RA },
91 { "final", DUMP_FINAL },
92 { "all", 2 * DUMP_FINAL - 1 },
96 /* register allocators */
97 static const lc_opt_enum_const_ptr_items_t ra_items[] = {
98 { "chordal", &be_ra_chordal_allocator },
99 { "external", &be_ra_external_allocator },
103 /* instruction set architectures. */
104 static const lc_opt_enum_const_ptr_items_t isa_items[] = {
105 { "firm", &firm_isa },
106 { "ia32", &ia32_isa_if },
110 static lc_opt_enum_mask_var_t dump_var = {
111 &dump_flags, dump_items
114 static lc_opt_enum_const_ptr_var_t ra_var = {
115 (const void **) &ra, ra_items
118 static lc_opt_enum_const_ptr_var_t isa_var = {
119 (const void **) &isa_if, isa_items
122 static const lc_opt_table_entry_t be_main_options[] = {
123 LC_OPT_ENT_ENUM_MASK("dump", "dump irg on several occasions", &dump_var),
124 LC_OPT_ENT_ENUM_PTR("ra", "register allocator", &ra_var),
125 LC_OPT_ENT_ENUM_PTR("isa", "the instruction set architecture", &isa_var),
127 LC_OPT_ENT_STR ("ilp.server", "the ilp server name", be_options.ilp_server, sizeof(be_options.ilp_server)),
128 LC_OPT_ENT_STR ("ilp.solver", "the ilp solver name", be_options.ilp_solver, sizeof(be_options.ilp_solver)),
132 #endif /* WITH_LIBCORE */
134 void be_opt_register(void)
138 lc_opt_entry_t *be_grp_ra;
140 be_grp_root = lc_opt_get_grp(firm_opt_get_root(), "be");
141 be_grp_ra = lc_opt_get_grp(be_grp_root, "ra");
143 lc_opt_add_table(be_grp_root, be_main_options);
145 /* register allocator options */
146 for(i = 0; ra_items[i].name != NULL; ++i) {
147 const be_ra_t *ra = ra_items[i].value;
148 ra->register_options(be_grp_ra);
151 /* register isa options */
152 for(i = 0; isa_items[i].name != NULL; ++i) {
153 const arch_isa_if_t *isa = isa_items[i].value;
154 isa->register_options(be_grp_root);
156 #endif /* WITH_LIBCORE */
172 static be_main_env_t *be_init_env(be_main_env_t *env)
176 memset(env, 0, sizeof(*env));
177 obstack_init(&env->obst);
178 env->dbg = firm_dbg_register("be.main");
180 env->arch_env = obstack_alloc(&env->obst, sizeof(env->arch_env[0]));
181 arch_env_init(env->arch_env, isa_if);
183 /* Register the irn handler of the architecture */
184 if (arch_isa_get_irn_handler(env->arch_env->isa))
185 arch_env_add_irn_handler(env->arch_env, arch_isa_get_irn_handler(env->arch_env->isa));
188 * Register the node handler of the back end infrastructure.
189 * This irn handler takes care of the platform independent
190 * spill, reload and perm nodes.
192 arch_env_add_irn_handler(env->arch_env, &be_node_irn_handler);
195 * Create the list of caller save registers.
197 for(i = 0, n = arch_isa_get_n_reg_class(env->arch_env->isa); i < n; ++i) {
198 const arch_register_class_t *cls = arch_isa_get_reg_class(env->arch_env->isa, i);
199 for(j = 0; j < cls->n_regs; ++j) {
200 const arch_register_t *reg = arch_register_for_index(cls, j);
201 if(arch_register_type_is(reg, caller_save))
202 obstack_ptr_grow(&env->obst, reg);
205 obstack_ptr_grow(&env->obst, NULL);
206 env->caller_save = obstack_finish(&env->obst);
209 * Create the list of callee save registers.
211 for(i = 0, n = arch_isa_get_n_reg_class(env->arch_env->isa); i < n; ++i) {
212 const arch_register_class_t *cls = arch_isa_get_reg_class(env->arch_env->isa, i);
213 for(j = 0; j < cls->n_regs; ++j) {
214 const arch_register_t *reg = arch_register_for_index(cls, j);
215 if(arch_register_type_is(reg, callee_save))
216 obstack_ptr_grow(&env->obst, reg);
219 obstack_ptr_grow(&env->obst, NULL);
220 env->callee_save = obstack_finish(&env->obst);
225 static void be_done_env(be_main_env_t *env)
227 env->arch_env->isa->impl->done(env->arch_env->isa);
228 obstack_free(&env->obst, NULL);
231 static void dump(int mask, ir_graph *irg, const char *suffix,
232 void (*dumper)(ir_graph *, const char *))
234 if(dump_flags & mask)
238 static void prepare_graph(be_irg_t *birg)
240 ir_graph *irg = birg->irg;
242 /* Normalize proj nodes. */
243 normalize_proj_nodes(irg);
245 /* Remove critical edges */
246 remove_critical_cf_edges(irg);
248 /* Compute the dominance information. */
252 /* Ensure, that the ir_edges are computed. */
255 /* Compute loop nesting information (for weighting copies) */
256 if (get_irg_loopinfo_state(irg) != (loopinfo_valid & loopinfo_cf_consistent))
257 construct_cf_backedges(irg);
259 /* check, if the dominance property is fulfilled. */
260 be_check_dominance(irg);
264 static void be_main_loop(FILE *file_handle)
272 isa = arch_env_get_isa(env.arch_env);
275 for(i = 0, n = get_irp_n_irgs(); i < n; ++i) {
276 ir_graph *irg = get_irp_irg(i);
277 const arch_code_generator_if_t *cg_if;
281 birg.main_env = &env;
283 DBG((env.dbg, LEVEL_2, "====> IRG: %F\n", irg));
284 dump(DUMP_INITIAL, irg, "-begin", dump_ir_block_graph);
286 /* set the current graph (this is important for several firm functions) */
287 current_ir_graph = birg.irg;
289 /* Get the code generator interface. */
290 cg_if = isa->impl->get_code_generator_if(isa);
292 /* get a code generator for this graph. */
293 birg.cg = cg_if->init(file_handle, birg.irg, env.arch_env);
295 /* create the code generator and generate code. */
296 prepare_graph(&birg);
298 /* implement the ABI conventions. */
299 birg.abi = be_abi_introduce(&birg);
300 dump(DUMP_ABI, irg, "-abi", dump_ir_block_graph);
303 arch_code_generator_prepare_graph(birg.cg);
306 * Since the code generator made a lot of new nodes and skipped
307 * a lot of old ones, we should do dead node elim here.
308 * Note that this requires disabling the edges here.
310 edges_deactivate(irg);
311 dead_node_elimination(irg);
314 dump(DUMP_PREPARED, irg, "-prepared", dump_ir_block_graph);
316 /* Schedule the graphs. */
317 arch_code_generator_before_sched(birg.cg);
318 list_sched(isa, irg);
320 dump(DUMP_SCHED, irg, "-sched", dump_ir_block_graph_sched);
322 /* connect all stack modifying nodes together (see beabi.c) */
323 // be_abi_fix_stack(birg.abi);
325 /* Verify the schedule */
326 sched_verify_irg(irg);
328 /* Do register allocation */
329 arch_code_generator_before_ra(birg.cg);
332 dump(DUMP_RA, irg, "-ra", dump_ir_block_graph_sched);
334 arch_code_generator_done(birg.cg);
335 dump(DUMP_FINAL, irg, "-end", dump_ir_block_graph_sched);
341 void be_main(FILE *file_handle)
343 /* never build code for pseudo irgs */
344 set_visit_pseudo_irgs(0);
347 be_main_loop(file_handle);