3 * @author Sebastian Hack
13 #include <libcore/lc_opts.h>
14 #include <libcore/lc_opts_enum.h>
15 #endif /* WITH_LIBCORE */
26 #include "iredges_t.h"
31 #include "firm/bearch_firm.h"
32 #include "ia32/bearch_ia32.h"
39 #include "besched_t.h"
40 #include "belistsched.h"
42 #include "bespillilp.h"
43 #include "bespillbelady.h"
45 #include "beraextern.h"
46 #include "bechordal_t.h"
48 #include "beifg_impl.h"
49 #include "becopyoptmain.h"
50 #include "becopystat.h"
51 #include "bessadestr.h"
54 #define DUMP_INITIAL (1 << 0)
55 #define DUMP_SCHED (1 << 1)
56 #define DUMP_PREPARED (1 << 2)
57 #define DUMP_RA (1 << 3)
58 #define DUMP_FINAL (1 << 4)
60 /* options visible for anyone */
61 be_options_t be_options = {
63 "i44pc52.info.uni-karlsruhe.de",
70 static unsigned dump_flags = DUMP_INITIAL | DUMP_SCHED | DUMP_PREPARED | DUMP_RA | DUMP_FINAL;
72 /* register allocator to use. */
73 static const be_ra_t *ra = &be_ra_chordal_allocator;
75 /* back end instruction set architecture to use */
76 static const arch_isa_if_t *isa_if = &ia32_isa_if;
80 static lc_opt_entry_t *be_grp_root = NULL;
82 /* possible dumping options */
83 static const lc_opt_enum_mask_items_t dump_items[] = {
85 { "initial", DUMP_INITIAL },
86 { "sched", DUMP_SCHED },
87 { "prepared", DUMP_PREPARED },
88 { "regalloc", DUMP_RA },
89 { "final", DUMP_FINAL },
90 { "all", 2 * DUMP_FINAL - 1 },
94 /* register allocators */
95 static const lc_opt_enum_const_ptr_items_t ra_items[] = {
96 { "chordal", &be_ra_chordal_allocator },
100 /* instruction set architectures. */
101 static const lc_opt_enum_const_ptr_items_t isa_items[] = {
102 { "firm", &firm_isa },
103 { "ia32", &ia32_isa_if },
107 static lc_opt_enum_mask_var_t dump_var = {
108 &dump_flags, dump_items
111 static lc_opt_enum_const_ptr_var_t ra_var = {
112 (const void **) &ra, ra_items
115 static lc_opt_enum_const_ptr_var_t isa_var = {
116 (const void **) &isa_if, isa_items
119 static const lc_opt_table_entry_t be_main_options[] = {
120 LC_OPT_ENT_ENUM_MASK("dump", "dump irg on several occasions", &dump_var),
121 LC_OPT_ENT_ENUM_PTR("ra", "register allocator", &ra_var),
122 LC_OPT_ENT_ENUM_PTR("isa", "the instruction set architecture", &isa_var),
124 LC_OPT_ENT_STR ("ilp.server", "the ilp server name", be_options.ilp_server, sizeof(be_options.ilp_server)),
125 LC_OPT_ENT_STR ("ilp.solver", "the ilp solver name", be_options.ilp_solver, sizeof(be_options.ilp_solver)),
129 #endif /* WITH_LIBCORE */
131 void be_opt_register(void)
136 be_grp_root = lc_opt_get_grp(firm_opt_get_root(), "be");
138 lc_opt_add_table(be_grp_root, be_main_options);
140 /* register register allocator options */
141 for(i = 0; ra_items[i].name != NULL; ++i) {
142 const be_ra_t *ra = ra_items[i].value;
143 ra->register_options(be_grp_root);
146 /* register isa options */
147 for(i = 0; isa_items[i].name != NULL; ++i) {
148 const arch_isa_if_t *isa = isa_items[i].value;
149 isa->register_options(be_grp_root);
151 #endif /* WITH_LIBCORE */
167 static be_main_env_t *be_init_env(be_main_env_t *env)
169 obstack_init(&env->obst);
170 env->dbg = firm_dbg_register("be.main");
172 env->arch_env = obstack_alloc(&env->obst, sizeof(env->arch_env[0]));
173 arch_env_init(env->arch_env, isa_if);
175 /* Register the irn handler of the architecture */
176 if (arch_isa_get_irn_handler(env->arch_env->isa))
177 arch_env_add_irn_handler(env->arch_env, arch_isa_get_irn_handler(env->arch_env->isa));
180 * Register the node handler of the back end infrastructure.
181 * This irn handler takes care of the platform independent
182 * spill, reload and perm nodes.
184 arch_env_add_irn_handler(env->arch_env, &be_node_irn_handler);
189 static void be_done_env(be_main_env_t *env)
191 env->arch_env->isa->impl->done(env->arch_env->isa);
192 obstack_free(&env->obst, NULL);
195 static void dump(int mask, ir_graph *irg, const char *suffix,
196 void (*dumper)(ir_graph *, const char *))
198 if(dump_flags & mask)
202 static void prepare_graph(be_main_env_t *s, ir_graph *irg)
204 /* Normalize proj nodes. */
205 normalize_proj_nodes(irg);
207 /* Remove critical edges */
208 remove_critical_cf_edges(irg);
210 /* Compute the dominance information. */
214 /* Ensure, that the ir_edges are computed. */
217 /* Compute loop nesting information (for weighting copies) */
218 if (get_irg_loopinfo_state(irg) != (loopinfo_valid & loopinfo_cf_consistent))
219 construct_cf_backedges(irg);
221 be_check_dominance(irg);
224 static void be_main_loop(FILE *file_handle)
232 isa = arch_env_get_isa(env.arch_env);
235 for(i = 0, n = get_irp_n_irgs(); i < n; ++i) {
236 ir_graph *irg = get_irp_irg(i);
238 arch_code_generator_t *cg;
239 const arch_code_generator_if_t *cg_if;
241 DBG((env.dbg, LEVEL_2, "====> IRG: %F\n", irg));
242 dump(DUMP_INITIAL, irg, "-begin", dump_ir_block_graph);
244 /* set the current graph (this is important for several firm functions) */
245 current_ir_graph = irg;
247 /* Get the code generator interface. */
248 cg_if = isa->impl->get_code_generator(isa);
250 /* get a code generator for this graph. */
251 cg = cg_if->init(file_handle, irg, env.arch_env);
253 /* create the code generator and generate code. */
254 prepare_graph(&env, irg);
255 arch_code_generator_prepare_graph(cg);
257 edges_deactivate(irg);
258 dead_node_elimination(irg);
261 dump(DUMP_PREPARED, irg, "-prepared", dump_ir_block_graph);
263 /* Schedule the graphs. */
264 arch_code_generator_before_sched(cg);
265 list_sched(isa, irg);
267 dump(DUMP_SCHED, irg, "-sched", dump_ir_block_graph_sched);
269 /* Verify the schedule */
270 sched_verify_irg(irg);
272 /* Do register allocation */
273 arch_code_generator_before_ra(cg);
274 ra->allocate(&env, irg);
276 dump(DUMP_RA, irg, "-ra", dump_ir_block_graph_sched);
278 arch_code_generator_done(cg);
279 dump(DUMP_FINAL, irg, "-end", dump_ir_block_graph_sched);
285 void be_main(FILE *file_handle)
288 be_main_loop(file_handle);