3 * @author Sebastian Hack
14 #include <libcore/lc_opts.h>
15 #include <libcore/lc_opts_enum.h>
16 #include <libcore/lc_timing.h>
17 #endif /* WITH_LIBCORE */
28 #include "iredges_t.h"
36 #include "firm/bearch_firm.h"
37 #include "ia32/bearch_ia32.h"
38 #include "arm/bearch_arm.h"
39 #include "ppc32/bearch_ppc32.h"
40 #include "mips/bearch_mips.h"
47 #include "besched_t.h"
48 #include "belistsched.h"
50 #include "bespillbelady.h"
52 #include "beraextern.h"
53 #include "bechordal_t.h"
55 #include "beifg_impl.h"
56 #include "becopyopt.h"
57 #include "becopystat.h"
58 #include "bessadestr.h"
61 #include "beschedmris.h"
65 /* options visible for anyone */
66 static be_options_t be_options = {
67 DUMP_NONE, /* dump options */
68 BE_TIME_OFF, /* no timing */
69 BE_SCHED_SELECT_HEUR, /* mueller heuristic selector */
71 "i44pc52.info.uni-karlsruhe.de", /* ilp server */
72 "cplex" /* ilp solver */
76 static unsigned dump_flags = 0;
79 static int vrfy_option = BE_VRFY_WARN;
81 /* register allocator to use. */
82 static const be_ra_t *ra = &be_ra_chordal_allocator;
84 /* back end instruction set architecture to use */
85 static const arch_isa_if_t *isa_if = &ia32_isa_if;
89 static lc_opt_entry_t *be_grp_root = NULL;
91 /* possible dumping options */
92 static const lc_opt_enum_mask_items_t dump_items[] = {
93 { "none", DUMP_NONE },
94 { "initial", DUMP_INITIAL },
96 { "sched", DUMP_SCHED },
97 { "prepared", DUMP_PREPARED },
98 { "regalloc", DUMP_RA },
99 { "final", DUMP_FINAL },
101 { "all", 2 * DUMP_BE - 1 },
105 /* register allocators */
106 static const lc_opt_enum_const_ptr_items_t ra_items[] = {
107 { "chordal", &be_ra_chordal_allocator },
108 { "external", &be_ra_external_allocator },
112 /* instruction set architectures. */
113 static const lc_opt_enum_const_ptr_items_t isa_items[] = {
114 { "ia32", &ia32_isa_if },
116 { "arm", &arm_isa_if },
117 { "ppc32", &ppc32_isa_if },
118 { "mips", &mips_isa_if },
123 /* verify options. */
124 static const lc_opt_enum_int_items_t vrfy_items[] = {
125 { "off", BE_VRFY_OFF },
126 { "warn", BE_VRFY_WARN },
127 { "assert", BE_VRFY_ASSERT },
131 /* schedule selector options. */
132 static const lc_opt_enum_int_items_t sched_select_items[] = {
133 { "trivial", BE_SCHED_SELECT_TRIVIAL },
134 { "regpress", BE_SCHED_SELECT_REGPRESS },
135 { "muchnik", BE_SCHED_SELECT_MUCHNIK },
136 { "heur", BE_SCHED_SELECT_HEUR },
137 { "hmuchnik", BE_SCHED_SELECT_HMUCHNIK },
141 static lc_opt_enum_mask_var_t dump_var = {
142 &dump_flags, dump_items
145 static lc_opt_enum_const_ptr_var_t ra_var = {
146 (const void **) &ra, ra_items
149 static lc_opt_enum_const_ptr_var_t isa_var = {
150 (const void **) &isa_if, isa_items
153 static lc_opt_enum_int_var_t vrfy_var = {
154 &vrfy_option, vrfy_items
157 static lc_opt_enum_int_var_t sched_select_var = {
158 &be_options.sched_select, sched_select_items
161 static const lc_opt_table_entry_t be_main_options[] = {
162 LC_OPT_ENT_ENUM_MASK("dump", "dump irg on several occasions", &dump_var),
163 LC_OPT_ENT_ENUM_PTR ("ra", "register allocator", &ra_var),
164 LC_OPT_ENT_ENUM_PTR ("isa", "the instruction set architecture", &isa_var),
165 LC_OPT_ENT_NEGBOOL ("noomitfp", "do not omit frame pointer", &be_omit_fp),
166 LC_OPT_ENT_ENUM_PTR ("vrfy", "verify the backend irg (off, warn, assert)", &vrfy_var),
167 LC_OPT_ENT_BOOL ("time", "get backend timing statistics", &be_options.timing),
168 LC_OPT_ENT_BOOL ("sched.mris", "enable mris schedule preparation", &be_options.mris),
169 LC_OPT_ENT_ENUM_PTR ("sched.select", "schedule node selector (trivial, regpress, muchnik, heur, hmuchnik)", &sched_select_var),
172 LC_OPT_ENT_STR ("ilp.server", "the ilp server name", be_options.ilp_server, sizeof(be_options.ilp_server)),
173 LC_OPT_ENT_STR ("ilp.solver", "the ilp solver name", be_options.ilp_solver, sizeof(be_options.ilp_solver)),
174 #endif /* WITH_ILP */
178 #endif /* WITH_LIBCORE */
180 void be_opt_register(void)
184 lc_opt_entry_t *be_grp_ra;
185 static int run_once = 0;
189 be_grp_root = lc_opt_get_grp(firm_opt_get_root(), "be");
190 be_grp_ra = lc_opt_get_grp(be_grp_root, "ra");
192 lc_opt_add_table(be_grp_root, be_main_options);
194 /* register allocator options */
195 for(i = 0; ra_items[i].name != NULL; ++i) {
196 const be_ra_t *ra = ra_items[i].value;
197 ra->register_options(be_grp_ra);
200 /* register isa options */
201 for(i = 0; isa_items[i].name != NULL; ++i) {
202 const arch_isa_if_t *isa = isa_items[i].value;
203 isa->register_options(be_grp_root);
206 #endif /* WITH_LIBCORE */
209 /* Parse one argument. */
210 int be_parse_arg(const char *arg) {
212 if (strcmp(arg, "help") == 0 || (arg[0] == '?' && arg[1] == '\0')) {
213 lc_opt_print_help(be_grp_root, stdout);
216 return lc_opt_from_single_arg(be_grp_root, NULL, arg, NULL);
219 #endif /* WITH_LIBCORE */
222 /** The be parameters returned by default, all off. */
223 const static backend_params be_params = {
230 /* Perform schedule verification if requested. */
231 static void be_sched_vrfy(ir_graph *irg, int vrfy_opt) {
232 if (vrfy_opt == BE_VRFY_WARN) {
233 be_verify_schedule(irg);
235 else if (vrfy_opt == BE_VRFY_ASSERT) {
236 assert(be_verify_schedule(irg) && "Schedule verification failed.");
240 /* Initialize the Firm backend. Must be run BEFORE init_firm()! */
241 const backend_params *be_init(void)
251 if (isa_if->get_params)
252 return isa_if->get_params();
257 * Initializes the main environment for the backend.
259 * @param env an empty environment
260 * @param file_handle the file handle where the output will be written to
262 static be_main_env_t *be_init_env(be_main_env_t *env, FILE *file_handle)
264 memset(env, 0, sizeof(*env));
265 obstack_init(&env->obst);
266 env->arch_env = obstack_alloc(&env->obst, sizeof(env->arch_env[0]));
267 env->options = &be_options;
268 env->options->dump_flags = dump_flags;
269 FIRM_DBG_REGISTER(env->dbg, "be.main");
271 arch_env_init(env->arch_env, isa_if, file_handle);
273 /* Register the irn handler of the architecture */
274 if (arch_isa_get_irn_handler(env->arch_env->isa))
275 arch_env_push_irn_handler(env->arch_env, arch_isa_get_irn_handler(env->arch_env->isa));
278 * Register the node handler of the back end infrastructure.
279 * This irn handler takes care of the platform independent
280 * spill, reload and perm nodes.
282 arch_env_push_irn_handler(env->arch_env, &be_node_irn_handler);
283 env->phi_handler = be_phi_handler_new(env->arch_env);
284 arch_env_push_irn_handler(env->arch_env, env->phi_handler);
289 static void be_done_env(be_main_env_t *env)
291 env->arch_env->isa->impl->done(env->arch_env->isa);
292 be_phi_handler_free(env->phi_handler);
293 obstack_free(&env->obst, NULL);
297 * A wrapper around a firm dumper. Dumps only, if
300 * @param mask a bitmask containing the reason what will be dumped
301 * @param irg the IR graph to dump
302 * @param suffix the suffix for the dumper
303 * @param dumper the dumper to be called
305 static void dump(int mask, ir_graph *irg, const char *suffix,
306 void (*dumper)(ir_graph *, const char *))
308 if(dump_flags & mask)
309 be_dump(irg, suffix, dumper);
313 * Prepare a backend graph for code generation.
315 static void prepare_graph(be_irg_t *birg)
317 ir_graph *irg = birg->irg;
319 /* Normalize proj nodes. */
320 normalize_proj_nodes(irg);
322 /* Make just one return node. */
323 normalize_one_return(irg);
325 /* Remove critical edges */
326 remove_critical_cf_edges(irg);
328 /* Compute the dominance information. */
332 /* Ensure, that the ir_edges are computed. */
335 /* check, if the dominance property is fulfilled. */
336 be_check_dominance(irg);
338 /* reset the phi handler. */
339 be_phi_handler_reset(birg->main_env->phi_handler);
344 #define BE_TIMER_PUSH(timer) \
345 if (be_options.timing == BE_TIME_ON) { \
346 int res = lc_timer_push(timer); \
347 if (vrfy_option == BE_VRFY_ASSERT) \
348 assert(res && "Timer already on stack, cannot be pushed twice."); \
349 else if (vrfy_option == BE_VRFY_WARN && ! res) \
350 fprintf(stderr, "Timer %s already on stack, cannot be pushed twice.\n", \
351 lc_timer_get_name(timer)); \
353 #define BE_TIMER_POP(timer) \
354 if (be_options.timing == BE_TIME_ON) { \
355 lc_timer_t *tmp = lc_timer_pop(); \
356 if (vrfy_option == BE_VRFY_ASSERT) \
357 assert(tmp == timer && "Attempt to pop wrong timer."); \
358 else if (vrfy_option == BE_VRFY_WARN && tmp != timer) \
359 fprintf(stderr, "Attempt to pop wrong timer. %s is on stack, trying to pop %s.\n", \
360 lc_timer_get_name(tmp), lc_timer_get_name(timer)); \
364 #define BE_TIMER_ONLY(code) do { if (be_options.timing == BE_TIME_ON) { code; } } while(0)
368 #define BE_TIMER_PUSH(timer)
369 #define BE_TIMER_POP(timer)
370 #define BE_TIMER_ONLY(code)
372 #endif /* WITH_LIBCORE */
376 * The Firm backend main loop.
377 * Do architecture specific lowering for all graphs
378 * and call the architecture specific code generator.
380 * @param file_handle the file handle the output will be written to
382 static void be_main_loop(FILE *file_handle)
387 unsigned num_nodes_b = 0;
388 unsigned num_nodes_a = 0;
389 unsigned num_nodes_r = 0;
392 lc_timer_t *t_prolog, *t_abi, *t_codegen, *t_sched, *t_constr, *t_regalloc, *t_finish, *t_emit, *t_other, *t_verify;
393 be_ra_timer_t *ra_timer;
395 if (be_options.timing == BE_TIME_ON) {
396 t_prolog = lc_timer_register("prolog", "prolog");
397 t_abi = lc_timer_register("beabi", "be abi introduction");
398 t_codegen = lc_timer_register("codegen", "codegeneration");
399 t_sched = lc_timer_register("sched", "scheduling");
400 t_constr = lc_timer_register("constr", "assure constraints");
401 t_regalloc = lc_timer_register("regalloc", "register allocation");
402 t_finish = lc_timer_register("finish", "graph finish");
403 t_emit = lc_timer_register("emiter", "code emiter");
404 t_verify = lc_timer_register("verify", "graph verification");
405 t_other = lc_timer_register("other", "other");
407 #endif /* WITH_LIBCORE */
409 be_init_env(&env, file_handle);
411 isa = arch_env_get_isa(env.arch_env);
413 /* for debugging, anchors helps */
414 // dump_all_anchors(1);
417 for (i = 0, n = get_irp_n_irgs(); i < n; ++i) {
418 ir_graph *irg = get_irp_irg(i);
419 const arch_code_generator_if_t *cg_if;
421 optimization_state_t state;
423 /* stop and reset timers */
425 LC_STOP_AND_RESET_TIMER(t_prolog);
426 LC_STOP_AND_RESET_TIMER(t_abi);
427 LC_STOP_AND_RESET_TIMER(t_codegen);
428 LC_STOP_AND_RESET_TIMER(t_sched);
429 LC_STOP_AND_RESET_TIMER(t_constr);
430 LC_STOP_AND_RESET_TIMER(t_regalloc);
431 LC_STOP_AND_RESET_TIMER(t_finish);
432 LC_STOP_AND_RESET_TIMER(t_emit);
433 LC_STOP_AND_RESET_TIMER(t_verify);
434 LC_STOP_AND_RESET_TIMER(t_other);
436 BE_TIMER_PUSH(t_other); /* t_other */
438 BE_TIMER_ONLY(num_nodes_b = get_num_reachable_nodes(irg));
441 birg.main_env = &env;
443 edges_deactivate_kind(irg, EDGE_KIND_DEP);
444 edges_activate_kind(irg, EDGE_KIND_DEP);
446 DBG((env.dbg, LEVEL_2, "====> IRG: %F\n", irg));
447 dump(DUMP_INITIAL, irg, "-begin", dump_ir_block_graph);
449 BE_TIMER_PUSH(t_prolog);
451 be_stat_init_irg(env.arch_env, irg);
452 be_do_stat_nodes(irg, "01 Begin");
454 /* set the current graph (this is important for several firm functions) */
455 current_ir_graph = birg.irg;
457 /* Get the code generator interface. */
458 cg_if = isa->impl->get_code_generator_if(isa);
460 /* get a code generator for this graph. */
461 birg.cg = cg_if->init(&birg);
463 /* create the code generator and generate code. */
464 prepare_graph(&birg);
466 BE_TIMER_POP(t_prolog);
468 /* some transformations need to be done before abi introduce */
469 BE_TIMER_PUSH(t_codegen);
470 arch_code_generator_before_abi(birg.cg);
471 BE_TIMER_POP(t_codegen);
473 /* implement the ABI conventions. */
474 BE_TIMER_PUSH(t_abi);
475 birg.abi = be_abi_introduce(&birg);
478 dump(DUMP_ABI, irg, "-abi", dump_ir_block_graph);
479 be_do_stat_nodes(irg, "02 Abi");
482 BE_TIMER_PUSH(t_codegen);
483 arch_code_generator_prepare_graph(birg.cg);
484 BE_TIMER_POP(t_codegen);
486 be_do_stat_nodes(irg, "03 Prepare");
489 * Since the code generator made a lot of new nodes and skipped
490 * a lot of old ones, we should do dead node elimination here.
491 * Note that this requires disabling the edges here.
493 edges_deactivate(irg);
494 //dead_node_elimination(irg);
497 /* Compute loop nesting information (for weighting copies) */
498 construct_cf_backedges(irg);
499 dump(DUMP_PREPARED, irg, "-prepared", dump_ir_block_graph);
500 BE_TIMER_ONLY(num_nodes_r = get_num_reachable_nodes(irg));
502 /* let backend prepare scheduling */
503 BE_TIMER_PUSH(t_codegen);
504 arch_code_generator_before_sched(birg.cg);
505 BE_TIMER_POP(t_codegen);
507 /* schedule the irg */
508 BE_TIMER_PUSH(t_sched);
509 list_sched(&birg, &be_options);
510 BE_TIMER_POP(t_sched);
512 dump(DUMP_SCHED, irg, "-sched", dump_ir_block_graph_sched);
515 BE_TIMER_PUSH(t_verify);
516 be_sched_vrfy(birg.irg, vrfy_option);
517 BE_TIMER_POP(t_verify);
519 be_do_stat_nodes(irg, "04 Schedule");
521 /* introduce patterns to assure constraints */
522 BE_TIMER_PUSH(t_constr);
523 /* we switch off optimizations here, because they might cause trouble */
524 save_optimization_state(&state);
526 set_opt_normalize(0);
528 /* add Keeps for should_be_different constrained nodes */
529 /* beware: needs schedule due to usage of be_ssa_constr */
530 assure_constraints(&birg);
531 BE_TIMER_POP(t_constr);
533 dump(DUMP_SCHED, irg, "-assured", dump_ir_block_graph_sched);
534 be_do_stat_nodes(irg, "05 Constraints");
536 /* connect all stack modifying nodes together (see beabi.c) */
537 BE_TIMER_PUSH(t_abi);
538 be_abi_fix_stack_nodes(birg.abi, NULL);
541 dump(DUMP_SCHED, irg, "-fix_stack", dump_ir_block_graph_sched);
544 BE_TIMER_PUSH(t_verify);
545 be_sched_vrfy(birg.irg, vrfy_option);
546 BE_TIMER_POP(t_verify);
548 /* do some statistics */
549 be_do_stat_reg_pressure(&birg);
551 /* stuff needs to be done after scheduling but before register allocation */
552 BE_TIMER_PUSH(t_codegen);
553 arch_code_generator_before_ra(birg.cg);
554 BE_TIMER_POP(t_codegen);
556 /* Do register allocation */
557 BE_TIMER_PUSH(t_regalloc);
558 ra_timer = ra->allocate(&birg);
559 BE_TIMER_PUSH(t_regalloc);
561 dump(DUMP_RA, irg, "-ra", dump_ir_block_graph_sched);
562 be_do_stat_nodes(irg, "06 Register Allocation");
564 /* let the codegenerator prepare the graph for emitter */
565 BE_TIMER_PUSH(t_finish);
566 arch_code_generator_after_ra(birg.cg);
567 BE_TIMER_POP(t_finish);
569 /* fix stack offsets */
570 BE_TIMER_PUSH(t_abi);
571 //be_abi_fix_stack_bias(birg.abi);
574 BE_TIMER_PUSH(t_finish);
575 arch_code_generator_finish(birg.cg);
576 BE_TIMER_POP(t_finish);
578 /* fix stack offsets */
579 BE_TIMER_PUSH(t_abi);
580 be_abi_fix_stack_nodes(birg.abi, NULL);
581 be_remove_dead_nodes_from_schedule(birg.irg);
582 be_abi_fix_stack_bias(birg.abi);
585 dump(DUMP_FINAL, irg, "-finish", dump_ir_block_graph_sched);
587 /* check schedule and register allocation */
588 BE_TIMER_PUSH(t_verify);
589 if (vrfy_option == BE_VRFY_WARN) {
590 //irg_verify(birg.irg, VRFY_ENFORCE_SSA);
591 be_check_dominance(birg.irg);
592 be_verify_schedule(birg.irg);
593 be_verify_register_allocation(env.arch_env, birg.irg);
595 else if (vrfy_option == BE_VRFY_ASSERT) {
596 //assert(irg_verify(birg.irg, VRFY_ENFORCE_SSA) && "irg verification failed");
597 assert(be_check_dominance(birg.irg) && "Dominance verification failed");
598 assert(be_verify_schedule(birg.irg) && "Schedule verification failed");
599 assert(be_verify_register_allocation(env.arch_env, birg.irg)
600 && "register allocation verification failed");
602 BE_TIMER_POP(t_verify);
604 /* emit assembler code */
605 BE_TIMER_PUSH(t_emit);
606 arch_code_generator_done(birg.cg);
607 BE_TIMER_POP(t_emit);
609 dump(DUMP_FINAL, irg, "-end", dump_ir_extblock_graph_sched);
611 BE_TIMER_PUSH(t_abi);
612 be_abi_free(birg.abi);
615 be_do_stat_nodes(irg, "07 Final");
616 restore_optimization_state(&state);
618 BE_TIMER_ONLY(num_nodes_a = get_num_reachable_nodes(irg));
619 BE_TIMER_POP(t_other);
621 #define LC_EMIT(timer) printf("%-20s: %.3lf msec\n", lc_timer_get_description(timer), (double)lc_timer_elapsed_usec(timer) / 1000.0)
622 #define LC_EMIT_RA(timer) printf("\t%-20s: %.3lf msec\n", lc_timer_get_description(timer), (double)lc_timer_elapsed_usec(timer) / 1000.0)
624 printf("==>> IRG %s <<==\n", get_entity_name(get_irg_entity(irg)));
625 printf("# nodes at begin: %u\n", num_nodes_b);
626 printf("# nodes before ra: %u\n", num_nodes_r);
627 printf("# nodes at end: %u\n\n", num_nodes_a);
634 LC_EMIT_RA(ra_timer->t_prolog);
635 LC_EMIT_RA(ra_timer->t_live);
636 LC_EMIT_RA(ra_timer->t_spill);
637 LC_EMIT_RA(ra_timer->t_spillslots);
638 LC_EMIT_RA(ra_timer->t_color);
639 LC_EMIT_RA(ra_timer->t_ifg);
640 LC_EMIT_RA(ra_timer->t_copymin);
641 LC_EMIT_RA(ra_timer->t_ssa);
642 LC_EMIT_RA(ra_timer->t_epilog);
643 LC_EMIT_RA(ra_timer->t_verify);
644 LC_EMIT_RA(ra_timer->t_other);
653 /* switched off due to statistics (statistic module needs all irgs) */
654 if (! stat_is_active())
665 /* Main interface to the frontend. */
666 void be_main(FILE *file_handle)
671 if (be_options.timing == BE_TIME_ON) {
672 t = lc_timer_register("bemain", "measure complete bemain loop");
674 if (lc_timer_enter_high_priority()) {
675 fprintf(stderr, "Warning: Could not enter high priority mode.\n");
678 lc_timer_reset_and_start(t);
680 #endif /* WITH_LIBCORE */
682 /* never build code for pseudo irgs */
683 set_visit_pseudo_irgs(0);
686 be_main_loop(file_handle);
689 if (be_options.timing == BE_TIME_ON) {
691 lc_timer_leave_high_priority();
692 printf("%-20s: %lu msec\n", "BEMAINLOOP", lc_timer_elapsed_msec(t));
694 #endif /* WITH_LIBCORE */
697 /** The debug info retriever function. */
698 static retrieve_dbg_func retrieve_dbg = NULL;
700 /* Sets a debug info retriever. */
701 void be_set_debug_retrieve(retrieve_dbg_func func) {
705 /* Retrieve the debug info. */
706 const char *be_retrieve_dbg_info(const dbg_info *dbg, unsigned *line) {
708 return retrieve_dbg(dbg, line);
713 int be_put_ignore_regs(const be_irg_t *birg, const arch_register_class_t *cls, bitset_t *bs)
716 bs = bitset_alloca(cls->n_regs);
718 bitset_clear_all(bs);
720 assert(bitset_size(bs) == (unsigned) cls->n_regs);
721 arch_put_non_ignore_regs(birg->main_env->arch_env, cls, bs);
723 be_abi_put_ignore_regs(birg->abi, cls, bs);
724 return bitset_popcnt(bs);