2 * @file bechordal_main.c
4 * @author Sebastian Hack
7 * Copyright (C) 2005-2006 Universitaet Karlsruhe
8 * Released under the GPL
10 * Driver for the chordal register allocator.
23 #include "firm_config.h"
26 #include <libcore/lc_opts.h>
27 #include <libcore/lc_opts_enum.h>
28 #include <libcore/lc_timing.h>
29 #endif /* WITH_LIBCORE */
33 #include "irgraph_t.h"
34 #include "irprintf_t.h"
47 #include "bechordal_t.h"
49 #include "bejavacoal.h"
52 #include "besched_t.h"
56 #include "beifg_impl.h"
58 #include "bestatevent.h"
62 #include "bespillbelady.h"
63 #include "bespillmorgan.h"
64 #include "bespillslots.h"
65 #include "bespilloptions.h"
69 #include "bespillremat.h"
72 #include "bejavacoal.h"
73 #include "becopystat.h"
74 #include "becopyopt.h"
75 #include "bessadestr.h"
79 static be_ra_chordal_opts_t options = {
81 BE_CH_LOWER_PERM_SWAP,
85 /** Enable extreme live range splitting. */
86 static int be_elr_split = 0;
88 typedef struct _post_spill_env_t {
89 be_chordal_env_t cenv;
90 double pre_spill_cost;
93 static be_ra_timer_t ra_timer = {
107 static const lc_opt_enum_int_items_t lower_perm_items[] = {
108 { "copy", BE_CH_LOWER_PERM_COPY },
109 { "swap", BE_CH_LOWER_PERM_SWAP },
113 static const lc_opt_enum_int_items_t lower_perm_stat_items[] = {
117 static const lc_opt_enum_int_items_t dump_items[] = {
118 { "spill", BE_CH_DUMP_SPILL },
119 { "live", BE_CH_DUMP_LIVE },
120 { "color", BE_CH_DUMP_COLOR },
121 { "copymin", BE_CH_DUMP_COPYMIN },
122 { "ssadestr", BE_CH_DUMP_SSADESTR },
123 { "tree", BE_CH_DUMP_TREE_INTV },
124 { "constr", BE_CH_DUMP_CONSTR },
125 { "lower", BE_CH_DUMP_LOWER },
126 { "spillslots", BE_CH_DUMP_SPILLSLOTS },
127 { "appel", BE_CH_DUMP_APPEL },
128 { "all", BE_CH_DUMP_ALL },
132 static const lc_opt_enum_int_items_t be_ch_vrfy_items[] = {
133 { "off", BE_CH_VRFY_OFF },
134 { "warn", BE_CH_VRFY_WARN },
135 { "assert", BE_CH_VRFY_ASSERT },
139 static lc_opt_enum_int_var_t lower_perm_var = {
140 &options.lower_perm_opt, lower_perm_items
143 static lc_opt_enum_int_var_t dump_var = {
144 &options.dump_flags, dump_items
147 static lc_opt_enum_int_var_t be_ch_vrfy_var = {
148 &options.vrfy_option, be_ch_vrfy_items
151 static const lc_opt_table_entry_t be_chordal_options[] = {
152 LC_OPT_ENT_ENUM_PTR ("perm", "perm lowering options", &lower_perm_var),
153 LC_OPT_ENT_ENUM_MASK("dump", "select dump phases", &dump_var),
154 LC_OPT_ENT_ENUM_PTR ("vrfy", "verify options", &be_ch_vrfy_var),
155 LC_OPT_ENT_BOOL ("elrsplit", "enable extreme live range splitting", &be_elr_split),
159 static void dump(unsigned mask, ir_graph *irg,
160 const arch_register_class_t *cls,
162 void (*dump_func)(ir_graph *, const char *))
164 if((options.dump_flags & mask) == mask) {
167 snprintf(buf, sizeof(buf), "-%s%s", cls->name, suffix);
168 be_dump(irg, buf, dump_func);
171 be_dump(irg, suffix, dump_func);
175 static void put_ignore_colors(be_chordal_env_t *chordal_env)
177 int n_colors = chordal_env->cls->n_regs;
180 bitset_clear_all(chordal_env->ignore_colors);
181 be_abi_put_ignore_regs(chordal_env->birg->abi, chordal_env->cls, chordal_env->ignore_colors);
182 for(i = 0; i < n_colors; ++i)
183 if(arch_register_type_is(&chordal_env->cls->regs[i], ignore))
184 bitset_set(chordal_env->ignore_colors, i);
188 * Checks for every reload if it's user can perform the load on itself.
190 static void memory_operand_walker(ir_node *irn, void *env) {
191 be_chordal_env_t *cenv = env;
192 const arch_env_t *aenv = cenv->birg->main_env->arch_env;
193 const ir_edge_t *edge, *ne;
197 if (! be_is_Reload(irn))
200 /* only use memory operands, if the reload is only used by 1 node */
201 if(get_irn_n_edges(irn) > 1)
204 spill = be_get_Reload_mem(irn);
205 block = get_nodes_block(irn);
207 foreach_out_edge_safe(irn, edge, ne) {
208 ir_node *src = get_edge_src_irn(edge);
209 int pos = get_edge_src_pos(edge);
211 assert(src && "outedges broken!");
213 if (get_nodes_block(src) == block && arch_possible_memory_operand(aenv, src, pos)) {
214 DBG((cenv->dbg, LEVEL_3, "performing memory operand %+F at %+F\n", irn, src));
215 arch_perform_memory_operand(aenv, src, spill, pos);
219 /* kill the Reload */
220 if (get_irn_n_edges(irn) == 0) {
222 set_irn_n(irn, be_pos_Reload_mem, new_Bad());
227 * Starts a walk for memory operands if supported by the backend.
229 static INLINE void check_for_memory_operands(be_chordal_env_t *chordal_env) {
230 irg_walk_graph(chordal_env->irg, NULL, memory_operand_walker, chordal_env);
234 * Sorry for doing stats again...
236 typedef struct _node_stat_t {
237 unsigned int n_phis; /**< Phis of the current register class. */
238 unsigned int n_mem_phis; /**< Memory Phis (Phis with spill operands). */
239 unsigned int n_copies; /**< Copies */
240 unsigned int n_perms; /**< Perms */
241 unsigned int n_spills; /**< Spill nodes */
242 unsigned int n_reloads; /**< Reloads */
245 struct node_stat_walker {
247 const be_chordal_env_t *cenv;
251 static void node_stat_walker(ir_node *irn, void *data)
253 struct node_stat_walker *env = data;
254 const arch_env_t *aenv = env->cenv->birg->main_env->arch_env;
256 if(arch_irn_consider_in_reg_alloc(aenv, env->cenv->cls, irn)) {
258 /* if the node is a normal phi */
262 else if(arch_irn_classify(aenv, irn) & arch_irn_class_spill)
263 ++env->stat->n_spills;
265 else if(arch_irn_classify(aenv, irn) & arch_irn_class_reload)
266 ++env->stat->n_reloads;
268 else if(arch_irn_classify(aenv, irn) & arch_irn_class_copy)
269 ++env->stat->n_copies;
271 else if(arch_irn_classify(aenv, irn) & arch_irn_class_perm)
272 ++env->stat->n_perms;
275 /* a mem phi is a PhiM with a mem phi operand or a Spill operand */
276 else if(is_Phi(irn) && get_irn_mode(irn) == mode_M) {
279 for(i = get_irn_arity(irn) - 1; i >= 0; --i) {
280 ir_node *op = get_irn_n(irn, i);
282 if((is_Phi(op) && bitset_contains_irn(env->mem_phis, op)) || (arch_irn_classify(aenv, op) & arch_irn_class_spill)) {
283 bitset_add_irn(env->mem_phis, irn);
284 env->stat->n_mem_phis++;
291 static void node_stats(const be_chordal_env_t *cenv, node_stat_t *stat)
293 struct node_stat_walker env;
295 memset(stat, 0, sizeof(stat[0]));
297 env.mem_phis = bitset_irg_malloc(cenv->irg);
299 irg_walk_graph(cenv->irg, NULL, node_stat_walker, &env);
300 bitset_free(env.mem_phis);
303 static void insn_count_walker(ir_node *irn, void *data)
307 switch(get_irn_opcode(irn)) {
318 static unsigned int count_insns(ir_graph *irg)
321 irg_walk_graph(irg, insn_count_walker, NULL, &cnt);
327 * Initialize all timers.
329 static void be_init_timer(be_options_t *main_opts)
331 if (main_opts->timing == BE_TIME_ON) {
332 ra_timer.t_prolog = lc_timer_register("ra_prolog", "regalloc prolog");
333 ra_timer.t_epilog = lc_timer_register("ra_epilog", "regalloc epilog");
334 ra_timer.t_live = lc_timer_register("ra_liveness", "be liveness");
335 ra_timer.t_spill = lc_timer_register("ra_spill", "spiller");
336 ra_timer.t_spillslots = lc_timer_register("ra_spillslots", "spillslots");
337 ra_timer.t_color = lc_timer_register("ra_color", "graph coloring");
338 ra_timer.t_ifg = lc_timer_register("ra_ifg", "interference graph");
339 ra_timer.t_copymin = lc_timer_register("ra_copymin", "copy minimization");
340 ra_timer.t_ssa = lc_timer_register("ra_ssadestr", "ssa destruction");
341 ra_timer.t_verify = lc_timer_register("ra_verify", "graph verification");
342 ra_timer.t_other = lc_timer_register("ra_other", "other time");
344 LC_STOP_AND_RESET_TIMER(ra_timer.t_prolog);
345 LC_STOP_AND_RESET_TIMER(ra_timer.t_epilog);
346 LC_STOP_AND_RESET_TIMER(ra_timer.t_live);
347 LC_STOP_AND_RESET_TIMER(ra_timer.t_spill);
348 LC_STOP_AND_RESET_TIMER(ra_timer.t_spillslots);
349 LC_STOP_AND_RESET_TIMER(ra_timer.t_color);
350 LC_STOP_AND_RESET_TIMER(ra_timer.t_ifg);
351 LC_STOP_AND_RESET_TIMER(ra_timer.t_copymin);
352 LC_STOP_AND_RESET_TIMER(ra_timer.t_ssa);
353 LC_STOP_AND_RESET_TIMER(ra_timer.t_verify);
354 LC_STOP_AND_RESET_TIMER(ra_timer.t_other);
358 #define BE_TIMER_INIT(main_opts) be_init_timer(main_opts)
360 #define BE_TIMER_PUSH(timer) \
361 if (main_opts->timing == BE_TIME_ON) { \
362 if (! lc_timer_push(timer)) { \
363 if (options.vrfy_option == BE_CH_VRFY_ASSERT) \
364 assert(!"Timer already on stack, cannot be pushed twice."); \
365 else if (options.vrfy_option == BE_CH_VRFY_WARN) \
366 fprintf(stderr, "Timer %s already on stack, cannot be pushed twice.\n", \
367 lc_timer_get_name(timer)); \
370 #define BE_TIMER_POP(timer) \
371 if (main_opts->timing == BE_TIME_ON) { \
372 lc_timer_t *tmp = lc_timer_pop(); \
373 if (options.vrfy_option == BE_CH_VRFY_ASSERT) \
374 assert(tmp == timer && "Attempt to pop wrong timer."); \
375 else if (options.vrfy_option == BE_CH_VRFY_WARN && tmp != timer) \
376 fprintf(stderr, "Attempt to pop wrong timer. %s is on stack, trying to pop %s.\n", \
377 lc_timer_get_name(tmp), lc_timer_get_name(timer)); \
382 #define BE_TIMER_INIT(main_opts)
383 #define BE_TIMER_PUSH(timer)
384 #define BE_TIMER_POP(timer)
386 #endif /* WITH_LIBCORE */
389 * Perform things which need to be done per register class before spilling.
391 static void pre_spill(const arch_isa_t *isa, int cls_idx, post_spill_env_t *pse) {
392 be_chordal_env_t *chordal_env = &pse->cenv;
393 node_stat_t node_stat;
395 chordal_env->cls = arch_isa_get_reg_class(isa, cls_idx);
396 chordal_env->border_heads = pmap_create();
397 chordal_env->ignore_colors = bitset_malloc(chordal_env->cls->n_regs);
399 #ifdef FIRM_STATISTICS
400 if (be_stat_ev_is_active()) {
401 be_stat_tags[STAT_TAG_CLS] = chordal_env->cls->name;
402 be_stat_ev_push(be_stat_tags, STAT_TAG_LAST, be_stat_file);
404 /* perform some node statistics. */
405 node_stats(chordal_env, &node_stat);
406 be_stat_ev("phis_before_spill", node_stat.n_phis);
408 #endif /* FIRM_STATISTICS */
410 /* put all ignore registers into the ignore register set. */
411 put_ignore_colors(chordal_env);
413 be_pre_spill_prepare_constr(chordal_env);
414 dump(BE_CH_DUMP_CONSTR, chordal_env->irg, chordal_env->cls, "-constr-pre", dump_ir_block_graph_sched);
416 #ifdef FIRM_STATISTICS
417 if (be_stat_ev_is_active()) {
418 pse->pre_spill_cost = be_estimate_irg_costs(chordal_env->irg,
419 chordal_env->birg->main_env->arch_env, chordal_env->birg->exec_freq);
421 #endif /* FIRM_STATISTICS */
425 * Perform things which need to be done per register class after spilling.
427 static void post_spill(post_spill_env_t *pse) {
428 be_chordal_env_t *chordal_env = &pse->cenv;
429 ir_graph *irg = chordal_env->irg;
430 be_irg_t *birg = chordal_env->birg;
431 const be_main_env_t *main_env = birg->main_env;
432 be_options_t *main_opts = main_env->options;
433 static int splitted = 0;
434 node_stat_t node_stat;
436 #ifdef FIRM_STATISTICS
437 if (be_stat_ev_is_active()) {
438 double spillcosts = be_estimate_irg_costs(irg, main_env->arch_env, birg->exec_freq) - pse->pre_spill_cost;
440 be_stat_ev_l("spillcosts", (long) spillcosts);
442 node_stats(chordal_env, &node_stat);
443 be_stat_ev("phis_after_spill", node_stat.n_phis);
444 be_stat_ev("mem_phis", node_stat.n_mem_phis);
445 be_stat_ev("reloads", node_stat.n_reloads);
446 be_stat_ev("spills", node_stat.n_spills);
448 #endif /* FIRM_STATISTICS */
450 check_for_memory_operands(chordal_env);
452 be_abi_fix_stack_nodes(birg->abi, birg->lv);
454 BE_TIMER_PUSH(ra_timer.t_verify);
456 /* verify schedule and register pressure */
457 if (chordal_env->opts->vrfy_option == BE_CH_VRFY_WARN) {
458 be_verify_schedule(irg);
459 be_verify_register_pressure(chordal_env->birg, chordal_env->cls, irg);
461 else if (chordal_env->opts->vrfy_option == BE_CH_VRFY_ASSERT) {
462 assert(be_verify_schedule(irg) && "Schedule verification failed");
463 assert(be_verify_register_pressure(chordal_env->birg, chordal_env->cls, irg)
464 && "Register pressure verification failed");
466 BE_TIMER_POP(ra_timer.t_verify);
468 if (be_elr_split && ! splitted) {
469 extreme_liverange_splitting(chordal_env);
473 /* Color the graph. */
474 BE_TIMER_PUSH(ra_timer.t_color);
475 be_ra_chordal_color(chordal_env);
476 BE_TIMER_POP(ra_timer.t_color);
478 dump(BE_CH_DUMP_CONSTR, irg, chordal_env->cls, "-color", dump_ir_block_graph_sched);
480 /* Create the ifg with the selected flavor */
481 BE_TIMER_PUSH(ra_timer.t_ifg);
482 chordal_env->ifg = be_create_ifg(chordal_env);
483 BE_TIMER_POP(ra_timer.t_ifg);
485 #ifdef FIRM_STATISTICS
486 if (be_stat_ev_is_active()) {
488 be_ifg_stat(chordal_env, &stat);
489 be_stat_ev("ifg_nodes", stat.n_nodes);
490 be_stat_ev("ifg_edges", stat.n_edges);
491 be_stat_ev("ifg_comps", stat.n_comps);
493 node_stats(chordal_env, &node_stat);
494 be_stat_ev("perms_before_coal", node_stat.n_perms);
495 be_stat_ev("copies_before_coal", node_stat.n_copies);
497 #endif /* FIRM_STATISTICS */
499 /* copy minimization */
500 BE_TIMER_PUSH(ra_timer.t_copymin);
501 co_driver(chordal_env);
502 BE_TIMER_POP(ra_timer.t_copymin);
504 dump(BE_CH_DUMP_COPYMIN, irg, chordal_env->cls, "-copymin", dump_ir_block_graph_sched);
506 BE_TIMER_PUSH(ra_timer.t_ssa);
508 /* ssa destruction */
509 be_ssa_destruction(chordal_env);
511 BE_TIMER_POP(ra_timer.t_ssa);
513 dump(BE_CH_DUMP_SSADESTR, irg, chordal_env->cls, "-ssadestr", dump_ir_block_graph_sched);
515 BE_TIMER_PUSH(ra_timer.t_verify);
516 if (chordal_env->opts->vrfy_option != BE_CH_VRFY_OFF) {
517 be_ssa_destruction_check(chordal_env);
519 BE_TIMER_POP(ra_timer.t_verify);
521 be_ifg_free(chordal_env->ifg);
522 pmap_destroy(chordal_env->border_heads);
523 bitset_free(chordal_env->ignore_colors);
525 #ifdef FIRM_STATISTICS
526 if (be_stat_ev_is_active()) {
527 node_stats(chordal_env, &node_stat);
528 be_stat_ev("perms_after_coal", node_stat.n_perms);
529 be_stat_ev("copies_after_coal", node_stat.n_copies);
532 #endif /* FIRM_STATISTICS */
536 * Performs chordal register allocation for each register class on given irg.
538 * @param birg Backend irg object
539 * @return Structure containing timer for the single phases or NULL if no timing requested.
541 static void be_ra_chordal_main(be_irg_t *birg)
543 const be_main_env_t *main_env = birg->main_env;
544 const arch_isa_t *isa = arch_env_get_isa(main_env->arch_env);
545 ir_graph *irg = birg->irg;
546 be_options_t *main_opts = main_env->options;
548 be_chordal_env_t chordal_env;
550 BE_TIMER_INIT(main_opts);
551 BE_TIMER_PUSH(ra_timer.t_other);
552 BE_TIMER_PUSH(ra_timer.t_prolog);
554 be_assure_dom_front(birg);
555 be_assure_liveness(birg);
557 chordal_env.opts = &options;
558 chordal_env.irg = irg;
559 chordal_env.birg = birg;
560 FIRM_DBG_REGISTER(chordal_env.dbg, "firm.be.chordal");
562 obstack_init(&chordal_env.obst);
564 BE_TIMER_POP(ra_timer.t_prolog);
566 be_stat_ev("insns_before", count_insns(irg));
568 if (! arch_code_generator_has_spiller(birg->cg)) {
569 /* use one of the generic spiller */
571 /* Perform the following for each register class. */
572 for (j = 0, m = arch_isa_get_n_reg_class(isa); j < m; ++j) {
573 post_spill_env_t pse;
575 memcpy(&pse.cenv, &chordal_env, sizeof(chordal_env));
576 pre_spill(isa, j, &pse);
578 BE_TIMER_PUSH(ra_timer.t_spill);
579 be_do_spill(&pse.cenv);
580 BE_TIMER_POP(ra_timer.t_spill);
582 dump(BE_CH_DUMP_SPILL, irg, pse.cenv.cls, "-spill", dump_ir_block_graph_sched);
588 post_spill_env_t *pse;
590 /* the backend has it's own spiller */
591 m = arch_isa_get_n_reg_class(isa);
593 pse = alloca(m * sizeof(pse[0]));
595 for (j = 0; j < m; ++j) {
596 memcpy(&pse[j].cenv, &chordal_env, sizeof(chordal_env));
597 pre_spill(isa, j, &pse[j]);
600 BE_TIMER_PUSH(ra_timer.t_spill);
601 arch_code_generator_spill(birg->cg, &chordal_env);
602 BE_TIMER_POP(ra_timer.t_spill);
603 dump(BE_CH_DUMP_SPILL, irg, NULL, "-spill", dump_ir_block_graph_sched);
605 for (j = 0; j < m; ++j) {
610 BE_TIMER_PUSH(ra_timer.t_spillslots);
612 be_coalesce_spillslots(&chordal_env);
613 dump(BE_CH_DUMP_SPILLSLOTS, irg, NULL, "-spillslots", dump_ir_block_graph_sched);
615 BE_TIMER_POP(ra_timer.t_spillslots);
617 BE_TIMER_PUSH(ra_timer.t_verify);
618 /* verify spillslots */
619 if (options.vrfy_option == BE_CH_VRFY_WARN) {
620 be_verify_spillslots(main_env->arch_env, irg);
622 else if (options.vrfy_option == BE_CH_VRFY_ASSERT) {
623 assert(be_verify_spillslots(main_env->arch_env, irg) && "Spillslot verification failed");
625 BE_TIMER_POP(ra_timer.t_verify);
627 BE_TIMER_PUSH(ra_timer.t_epilog);
628 dump(BE_CH_DUMP_LOWER, irg, NULL, "-spilloff", dump_ir_block_graph_sched);
630 lower_nodes_after_ra(&chordal_env, options.lower_perm_opt & BE_CH_LOWER_PERM_COPY ? 1 : 0);
631 dump(BE_CH_DUMP_LOWER, irg, NULL, "-belower-after-ra", dump_ir_block_graph_sched);
633 obstack_free(&chordal_env.obst, NULL);
634 BE_TIMER_POP(ra_timer.t_epilog);
636 BE_TIMER_POP(ra_timer.t_other);
638 be_stat_ev("insns_after", count_insns(irg));
643 static be_ra_t be_ra_chordal_allocator = {
647 void be_init_chordal(void)
649 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
650 lc_opt_entry_t *ra_grp = lc_opt_get_grp(be_grp, "ra");
651 lc_opt_entry_t *chordal_grp = lc_opt_get_grp(ra_grp, "chordal");
653 lc_opt_add_table(chordal_grp, be_chordal_options);
655 be_register_allocator("chordal", &be_ra_chordal_allocator);
658 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal);