2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Driver for the chordal register allocator.
23 * @author Sebastian Hack
39 #include "firm_config.h"
41 #include <libcore/lc_opts.h>
42 #include <libcore/lc_opts_enum.h>
43 #include <libcore/lc_timing.h>
47 #include "irgraph_t.h"
48 #include "irprintf_t.h"
60 #include "iredges_t.h"
62 #include "bechordal_t.h"
64 #include "bejavacoal.h"
67 #include "besched_t.h"
71 #include "beifg_impl.h"
73 #include "bestatevent.h"
80 #include "bespillslots.h"
81 #include "bespilloptions.h"
85 #include "bespillremat.h"
88 #include "bejavacoal.h"
89 #include "becopystat.h"
90 #include "becopyopt.h"
91 #include "bessadestr.h"
95 static be_ra_chordal_opts_t options = {
97 BE_CH_LOWER_PERM_SWAP,
103 typedef struct _post_spill_env_t {
104 be_chordal_env_t cenv;
106 const arch_register_class_t *cls;
107 double pre_spill_cost;
110 static be_ra_timer_t ra_timer = {
124 static const lc_opt_enum_int_items_t lower_perm_items[] = {
125 { "copy", BE_CH_LOWER_PERM_COPY },
126 { "swap", BE_CH_LOWER_PERM_SWAP },
130 static const lc_opt_enum_int_items_t lower_perm_stat_items[] = {
134 static const lc_opt_enum_int_items_t dump_items[] = {
135 { "none", BE_CH_DUMP_NONE },
136 { "spill", BE_CH_DUMP_SPILL },
137 { "live", BE_CH_DUMP_LIVE },
138 { "color", BE_CH_DUMP_COLOR },
139 { "copymin", BE_CH_DUMP_COPYMIN },
140 { "ssadestr", BE_CH_DUMP_SSADESTR },
141 { "tree", BE_CH_DUMP_TREE_INTV },
142 { "constr", BE_CH_DUMP_CONSTR },
143 { "lower", BE_CH_DUMP_LOWER },
144 { "spillslots", BE_CH_DUMP_SPILLSLOTS },
145 { "appel", BE_CH_DUMP_APPEL },
146 { "all", BE_CH_DUMP_ALL },
150 static const lc_opt_enum_int_items_t be_ch_vrfy_items[] = {
151 { "off", BE_CH_VRFY_OFF },
152 { "warn", BE_CH_VRFY_WARN },
153 { "assert", BE_CH_VRFY_ASSERT },
157 static lc_opt_enum_int_var_t lower_perm_var = {
158 &options.lower_perm_opt, lower_perm_items
161 static lc_opt_enum_int_var_t dump_var = {
162 &options.dump_flags, dump_items
165 static lc_opt_enum_int_var_t be_ch_vrfy_var = {
166 &options.vrfy_option, be_ch_vrfy_items
169 static const lc_opt_table_entry_t be_chordal_options[] = {
170 LC_OPT_ENT_ENUM_PTR ("perm", "perm lowering options", &lower_perm_var),
171 LC_OPT_ENT_ENUM_MASK("dump", "select dump phases", &dump_var),
172 LC_OPT_ENT_ENUM_PTR ("vrfy", "verify options", &be_ch_vrfy_var),
176 static void dump(unsigned mask, ir_graph *irg,
177 const arch_register_class_t *cls,
179 void (*dump_func)(ir_graph *, const char *))
181 if((options.dump_flags & mask) == mask) {
184 snprintf(buf, sizeof(buf), "-%s%s", cls->name, suffix);
185 be_dump(irg, buf, dump_func);
188 be_dump(irg, suffix, dump_func);
193 * Checks for every reload if it's user can perform the load on itself.
195 static void memory_operand_walker(ir_node *irn, void *env) {
196 be_chordal_env_t *cenv = env;
197 const arch_env_t *aenv = cenv->birg->main_env->arch_env;
198 const ir_edge_t *edge, *ne;
202 if (! be_is_Reload(irn))
205 /* only use memory operands, if the reload is only used by 1 node */
206 if(get_irn_n_edges(irn) > 1)
209 spill = be_get_Reload_mem(irn);
210 block = get_nodes_block(irn);
212 foreach_out_edge_safe(irn, edge, ne) {
213 ir_node *src = get_edge_src_irn(edge);
214 int pos = get_edge_src_pos(edge);
216 assert(src && "outedges broken!");
218 if (get_nodes_block(src) == block && arch_possible_memory_operand(aenv, src, pos)) {
219 arch_perform_memory_operand(aenv, src, spill, pos);
223 /* kill the Reload */
224 if (get_irn_n_edges(irn) == 0) {
226 set_irn_n(irn, be_pos_Reload_mem, new_Bad());
227 set_irn_n(irn, be_pos_Reload_frame, new_Bad());
232 * Starts a walk for memory operands if supported by the backend.
234 static INLINE void check_for_memory_operands(be_chordal_env_t *chordal_env) {
235 irg_walk_graph(chordal_env->irg, NULL, memory_operand_walker, chordal_env);
239 * Sorry for doing stats again...
241 typedef struct _node_stat_t {
242 unsigned int n_phis; /**< Phis of the current register class. */
243 unsigned int n_mem_phis; /**< Memory Phis (Phis with spill operands). */
244 unsigned int n_copies; /**< Copies */
245 unsigned int n_perms; /**< Perms */
246 unsigned int n_spills; /**< Spill nodes */
247 unsigned int n_reloads; /**< Reloads */
250 struct node_stat_walker {
252 const arch_env_t *arch_env;
254 const arch_register_class_t *cls;
257 static void node_stat_walker(ir_node *irn, void *data)
259 struct node_stat_walker *env = data;
260 const arch_env_t *aenv = env->arch_env;
262 if (arch_irn_consider_in_reg_alloc(aenv, env->cls, irn)) {
264 /* if the node is a normal phi */
268 else if(arch_irn_classify(aenv, irn) & arch_irn_class_spill)
269 ++env->stat->n_spills;
271 else if(arch_irn_classify(aenv, irn) & arch_irn_class_reload)
272 ++env->stat->n_reloads;
274 else if(arch_irn_classify(aenv, irn) & arch_irn_class_copy)
275 ++env->stat->n_copies;
277 else if(arch_irn_classify(aenv, irn) & arch_irn_class_perm)
278 ++env->stat->n_perms;
281 /* a mem phi is a PhiM with a mem phi operand or a Spill operand */
282 else if(is_Phi(irn) && get_irn_mode(irn) == mode_M) {
285 for(i = get_irn_arity(irn) - 1; i >= 0; --i) {
286 ir_node *op = get_irn_n(irn, i);
288 if((is_Phi(op) && bitset_contains_irn(env->mem_phis, op)) || (arch_irn_classify(aenv, op) & arch_irn_class_spill)) {
289 bitset_add_irn(env->mem_phis, irn);
290 env->stat->n_mem_phis++;
297 static void node_stats(be_irg_t *birg, const arch_register_class_t *cls, node_stat_t *stat)
299 struct node_stat_walker env;
301 memset(stat, 0, sizeof(stat[0]));
302 env.arch_env = birg->main_env->arch_env;
303 env.mem_phis = bitset_irg_malloc(birg->irg);
306 irg_walk_graph(birg->irg, NULL, node_stat_walker, &env);
307 bitset_free(env.mem_phis);
310 static void insn_count_walker(ir_node *irn, void *data)
314 switch(get_irn_opcode(irn)) {
325 static unsigned int count_insns(ir_graph *irg)
328 irg_walk_graph(irg, insn_count_walker, NULL, &cnt);
333 * Initialize all timers.
335 static void be_init_timer(be_options_t *main_opts)
337 if (main_opts->timing == BE_TIME_ON) {
338 ra_timer.t_prolog = lc_timer_register("ra_prolog", "regalloc prolog");
339 ra_timer.t_epilog = lc_timer_register("ra_epilog", "regalloc epilog");
340 ra_timer.t_live = lc_timer_register("ra_liveness", "be liveness");
341 ra_timer.t_spill = lc_timer_register("ra_spill", "spiller");
342 ra_timer.t_spillslots = lc_timer_register("ra_spillslots", "spillslots");
343 ra_timer.t_color = lc_timer_register("ra_color", "graph coloring");
344 ra_timer.t_ifg = lc_timer_register("ra_ifg", "interference graph");
345 ra_timer.t_copymin = lc_timer_register("ra_copymin", "copy minimization");
346 ra_timer.t_ssa = lc_timer_register("ra_ssadestr", "ssa destruction");
347 ra_timer.t_verify = lc_timer_register("ra_verify", "graph verification");
348 ra_timer.t_other = lc_timer_register("ra_other", "other time");
350 LC_STOP_AND_RESET_TIMER(ra_timer.t_prolog);
351 LC_STOP_AND_RESET_TIMER(ra_timer.t_epilog);
352 LC_STOP_AND_RESET_TIMER(ra_timer.t_live);
353 LC_STOP_AND_RESET_TIMER(ra_timer.t_spill);
354 LC_STOP_AND_RESET_TIMER(ra_timer.t_spillslots);
355 LC_STOP_AND_RESET_TIMER(ra_timer.t_color);
356 LC_STOP_AND_RESET_TIMER(ra_timer.t_ifg);
357 LC_STOP_AND_RESET_TIMER(ra_timer.t_copymin);
358 LC_STOP_AND_RESET_TIMER(ra_timer.t_ssa);
359 LC_STOP_AND_RESET_TIMER(ra_timer.t_verify);
360 LC_STOP_AND_RESET_TIMER(ra_timer.t_other);
362 global_ra_timer = &ra_timer;
366 #define BE_TIMER_INIT(main_opts) be_init_timer(main_opts)
368 #define BE_TIMER_PUSH(timer) \
369 if (main_opts->timing == BE_TIME_ON) { \
370 if (! lc_timer_push(timer)) { \
371 if (options.vrfy_option == BE_CH_VRFY_ASSERT) \
372 assert(!"Timer already on stack, cannot be pushed twice."); \
373 else if (options.vrfy_option == BE_CH_VRFY_WARN) \
374 fprintf(stderr, "Timer %s already on stack, cannot be pushed twice.\n", \
375 lc_timer_get_name(timer)); \
378 #define BE_TIMER_POP(timer) \
379 if (main_opts->timing == BE_TIME_ON) { \
380 lc_timer_t *tmp = lc_timer_pop(); \
381 if (options.vrfy_option == BE_CH_VRFY_ASSERT) \
382 assert(tmp == timer && "Attempt to pop wrong timer."); \
383 else if (options.vrfy_option == BE_CH_VRFY_WARN && tmp != timer) \
384 fprintf(stderr, "Attempt to pop wrong timer. %s is on stack, trying to pop %s.\n", \
385 lc_timer_get_name(tmp), lc_timer_get_name(timer)); \
390 * Perform things which need to be done per register class before spilling.
392 static void pre_spill(post_spill_env_t *pse, const arch_register_class_t *cls)
394 be_chordal_env_t *chordal_env = &pse->cenv;
395 be_irg_t *birg = pse->birg;
396 ir_graph *irg = be_get_birg_irg(birg);
397 const be_main_env_t *main_env = birg->main_env;
398 node_stat_t node_stat;
401 chordal_env->cls = cls;
402 chordal_env->border_heads = pmap_create();
403 chordal_env->ignore_colors = bitset_malloc(chordal_env->cls->n_regs);
405 be_assure_liveness(birg);
406 be_liveness_assure_chk(be_get_birg_liveness(birg));
407 stat_ev_ctx_push_str("bechordal_cls", pse->cls->name);
408 stat_ev_do(node_stats(birg, pse->cls, &node_stat));
409 stat_ev_do(pse->pre_spill_cost = be_estimate_irg_costs(irg, main_env->arch_env, birg->exec_freq));
410 stat_ev_dbl("phis_before_spill", node_stat.n_phis);
412 /* put all ignore registers into the ignore register set. */
413 be_put_ignore_regs(birg, pse->cls, chordal_env->ignore_colors);
415 be_pre_spill_prepare_constr(chordal_env);
416 dump(BE_CH_DUMP_CONSTR, birg->irg, pse->cls, "-constr-pre", dump_ir_block_graph_sched);
418 stat_ev_ctx_pop("bechordal_cls");
422 * Perform things which need to be done per register class after spilling.
424 static void post_spill(post_spill_env_t *pse, int iteration) {
425 be_chordal_env_t *chordal_env = &pse->cenv;
426 be_irg_t *birg = pse->birg;
427 ir_graph *irg = birg->irg;
428 const be_main_env_t *main_env = birg->main_env;
429 be_options_t *main_opts = main_env->options;
430 node_stat_t node_stat;
431 int colors_n = arch_register_class_n_regs(chordal_env->cls);
432 int allocatable_regs = colors_n - be_put_ignore_regs(birg, chordal_env->cls, NULL);
434 /* some special classes contain only ignore regs, no work to be done */
435 if (allocatable_regs > 0) {
437 stat_ev_ctx_push_str("bechordal_cls", pse->cls->name);
438 stat_ev_do(node_stats(birg, pse->cls, &node_stat));
439 stat_ev_dbl("phis_after_spill", node_stat.n_phis);
440 stat_ev_dbl("mem_phis", node_stat.n_mem_phis);
441 stat_ev_dbl("reloads", node_stat.n_reloads);
442 stat_ev_dbl("spills", node_stat.n_spills);
443 stat_ev_dbl("spillcosts", be_estimate_irg_costs(irg, main_env->arch_env, birg->exec_freq) - pse->pre_spill_cost);
446 If we have a backend provided spiller, post spill is
447 called in a loop after spilling for each register class.
448 But we only need to fix stack nodes once in this case.
450 if (iteration == 0) {
451 check_for_memory_operands(chordal_env);
452 be_abi_fix_stack_nodes(birg->abi);
455 BE_TIMER_PUSH(ra_timer.t_verify);
457 /* verify schedule and register pressure */
458 if (chordal_env->opts->vrfy_option == BE_CH_VRFY_WARN) {
459 be_verify_schedule(birg);
460 be_verify_register_pressure(birg, pse->cls, irg);
462 else if (chordal_env->opts->vrfy_option == BE_CH_VRFY_ASSERT) {
463 assert(be_verify_schedule(birg) && "Schedule verification failed");
464 assert(be_verify_register_pressure(birg, pse->cls, irg)
465 && "Register pressure verification failed");
467 BE_TIMER_POP(ra_timer.t_verify);
469 /* Color the graph. */
470 BE_TIMER_PUSH(ra_timer.t_color);
471 be_ra_chordal_color(chordal_env);
472 BE_TIMER_POP(ra_timer.t_color);
474 dump(BE_CH_DUMP_CONSTR, irg, pse->cls, "-color", dump_ir_block_graph_sched);
476 /* Create the ifg with the selected flavor */
477 BE_TIMER_PUSH(ra_timer.t_ifg);
478 chordal_env->ifg = be_create_ifg(chordal_env);
479 BE_TIMER_POP(ra_timer.t_ifg);
484 stat_ev_do(be_ifg_stat(birg, chordal_env->ifg, &stat));
485 stat_ev_dbl("ifg_nodes", stat.n_nodes);
486 stat_ev_dbl("ifg_edges", stat.n_edges);
487 stat_ev_dbl("ifg_comps", stat.n_comps);
489 stat_ev_do(node_stats(birg, pse->cls, &node_stat));
490 stat_ev_dbl("perms_before_coal", node_stat.n_perms);
491 stat_ev_dbl("copies_before_coal", node_stat.n_copies);
494 /* copy minimization */
495 BE_TIMER_PUSH(ra_timer.t_copymin);
496 co_driver(chordal_env);
497 BE_TIMER_POP(ra_timer.t_copymin);
499 dump(BE_CH_DUMP_COPYMIN, irg, pse->cls, "-copymin", dump_ir_block_graph_sched);
501 BE_TIMER_PUSH(ra_timer.t_ssa);
503 /* ssa destruction */
504 stat_ev_ctx_push_str("berachordal_phase", "ssadestr");
505 be_ssa_destruction(chordal_env);
506 stat_ev_ctx_pop("berachordal_phase");
508 BE_TIMER_POP(ra_timer.t_ssa);
510 dump(BE_CH_DUMP_SSADESTR, irg, pse->cls, "-ssadestr", dump_ir_block_graph_sched);
512 BE_TIMER_PUSH(ra_timer.t_verify);
513 if (chordal_env->opts->vrfy_option != BE_CH_VRFY_OFF) {
514 be_ssa_destruction_check(chordal_env);
516 BE_TIMER_POP(ra_timer.t_verify);
518 stat_ev_do(node_stats(birg, pse->cls, &node_stat));
519 stat_ev_dbl("perms_after_coal", node_stat.n_perms);
520 stat_ev_dbl("copies_after_coal", node_stat.n_copies);
521 stat_ev_ctx_pop("bechordal_cls");
523 /* the ifg exists only if there are allocatable regs */
524 be_ifg_free(chordal_env->ifg);
527 /* free some always allocated data structures */
528 pmap_destroy(chordal_env->border_heads);
529 bitset_free(chordal_env->ignore_colors);
533 * Performs chordal register allocation for each register class on given irg.
535 * @param birg Backend irg object
536 * @return Structure containing timer for the single phases or NULL if no timing requested.
538 static void be_ra_chordal_main(be_irg_t *birg)
540 const be_main_env_t *main_env = birg->main_env;
541 const arch_isa_t *isa = arch_env_get_isa(main_env->arch_env);
542 ir_graph *irg = birg->irg;
543 be_options_t *main_opts = main_env->options;
545 be_chordal_env_t chordal_env;
548 BE_TIMER_INIT(main_opts);
549 BE_TIMER_PUSH(ra_timer.t_other);
550 BE_TIMER_PUSH(ra_timer.t_prolog);
552 be_assure_dom_front(birg);
553 be_assure_liveness(birg);
555 chordal_env.obst = &obst;
556 chordal_env.opts = &options;
557 chordal_env.irg = irg;
558 chordal_env.birg = birg;
559 chordal_env.border_heads = NULL;
560 chordal_env.ifg = NULL;
561 chordal_env.ignore_colors = NULL;
565 BE_TIMER_POP(ra_timer.t_prolog);
567 be_stat_ev("insns_before", count_insns(irg));
571 if (! arch_code_generator_has_spiller(birg->cg)) {
572 /* use one of the generic spiller */
574 /* Perform the following for each register class. */
575 for (j = 0, m = arch_isa_get_n_reg_class(isa); j < m; ++j) {
576 post_spill_env_t pse;
577 const arch_register_class_t *cls
578 = arch_isa_get_reg_class(isa, j);
580 if(arch_register_class_flags(cls) & arch_register_class_flag_manual_ra)
584 memcpy(&pse.cenv, &chordal_env, sizeof(chordal_env));
586 pre_spill(&pse, cls);
589 /* this is a hack, TODO remove me later */
591 be_do_stat_reg_pressure(birg);
595 BE_TIMER_PUSH(ra_timer.t_spill);
596 be_do_spill(birg, cls);
597 BE_TIMER_POP(ra_timer.t_spill);
599 dump(BE_CH_DUMP_SPILL, irg, pse.cls, "-spill",
600 dump_ir_block_graph_sched);
605 post_spill_env_t *pse;
607 /* the backend has it's own spiller */
608 m = arch_isa_get_n_reg_class(isa);
610 pse = alloca(m * sizeof(pse[0]));
612 for (j = 0; j < m; ++j) {
613 memcpy(&pse[j].cenv, &chordal_env, sizeof(chordal_env));
615 pre_spill(&pse[j], pse[j].cls);
618 BE_TIMER_PUSH(ra_timer.t_spill);
619 arch_code_generator_spill(birg->cg, birg);
620 BE_TIMER_POP(ra_timer.t_spill);
621 dump(BE_CH_DUMP_SPILL, irg, NULL, "-spill", dump_ir_block_graph_sched);
623 for (j = 0; j < m; ++j) {
624 post_spill(&pse[j], j);
629 be_verify_register_allocation(birg);
631 BE_TIMER_PUSH(ra_timer.t_epilog);
632 lower_nodes_after_ra(birg, options.lower_perm_opt & BE_CH_LOWER_PERM_COPY ? 1 : 0);
633 dump(BE_CH_DUMP_LOWER, irg, NULL, "-belower-after-ra", dump_ir_block_graph_sched);
635 obstack_free(&obst, NULL);
636 be_liveness_invalidate(be_get_birg_liveness(birg));
637 BE_TIMER_POP(ra_timer.t_epilog);
639 BE_TIMER_POP(ra_timer.t_other);
641 be_stat_ev("insns_after", count_insns(irg));
646 static be_ra_t be_ra_chordal_allocator = {
650 void be_init_chordal_main(void)
652 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
653 lc_opt_entry_t *ra_grp = lc_opt_get_grp(be_grp, "ra");
654 lc_opt_entry_t *chordal_grp = lc_opt_get_grp(ra_grp, "chordal");
656 lc_opt_add_table(chordal_grp, be_chordal_options);
658 be_register_allocator("chordal", &be_ra_chordal_allocator);
661 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal_main);