e42804d50e869887ed4fbe0a619e86d66bd31a49
[libfirm] / ir / be / bechordal_main.c
1 /**
2  * @file   bechordal_main.c
3  * @date   29.11.2005
4  * @author Sebastian Hack
5  * @cvs-id $Id$
6  *
7  * Copyright (C) 2005-2006 Universitaet Karlsruhe
8  * Released under the GPL
9  *
10  * Driver for the chordal register allocator.
11  */
12 #ifdef HAVE_CONFIG_H
13 #include "config.h"
14 #endif
15
16 #include <time.h>
17
18 #include "obst.h"
19 #include "pset.h"
20 #include "list.h"
21 #include "bitset.h"
22 #include "iterator.h"
23 #include "firm_config.h"
24
25 #include <libcore/lc_opts.h>
26 #include <libcore/lc_opts_enum.h>
27 #include <libcore/lc_timing.h>
28
29 #include "ircons_t.h"
30 #include "irmode_t.h"
31 #include "irgraph_t.h"
32 #include "irprintf_t.h"
33 #include "irgwalk.h"
34 #include "ircons.h"
35 #include "irdump.h"
36 #include "irdom.h"
37 #include "ircons.h"
38 #include "irbitset.h"
39 #include "irnode.h"
40 #include "ircons.h"
41 #include "debug.h"
42 #include "xmalloc.h"
43 #include "execfreq.h"
44
45 #include "bechordal_t.h"
46 #include "beabi.h"
47 #include "bejavacoal.h"
48 #include "beutil.h"
49 #include "besched.h"
50 #include "besched_t.h"
51 #include "belive_t.h"
52 #include "bearch_t.h"
53 #include "beifg_t.h"
54 #include "beifg_impl.h"
55 #include "benode_t.h"
56 #include "bestatevent.h"
57 #include "bestat.h"
58 #include "bemodule.h"
59 #include "be_t.h"
60
61 #include "bespillbelady.h"
62 #include "bespillmorgan.h"
63 #include "bespillslots.h"
64 #include "bespilloptions.h"
65 #include "belower.h"
66
67 #ifdef WITH_ILP
68 #include "bespillremat.h"
69 #endif /* WITH_ILP */
70
71 #include "bejavacoal.h"
72 #include "becopystat.h"
73 #include "becopyopt.h"
74 #include "bessadestr.h"
75 #include "beverify.h"
76 #include "benode_t.h"
77
78 static be_ra_chordal_opts_t options = {
79         BE_CH_DUMP_NONE,
80         BE_CH_LOWER_PERM_SWAP,
81         BE_CH_VRFY_WARN,
82 };
83
84 typedef struct _post_spill_env_t {
85         be_chordal_env_t            cenv;
86         be_irg_t                    *birg;
87         const arch_register_class_t *cls;
88         double                      pre_spill_cost;
89 } post_spill_env_t;
90
91 static be_ra_timer_t ra_timer = {
92         NULL,
93         NULL,
94         NULL,
95         NULL,
96         NULL,
97         NULL,
98         NULL,
99         NULL,
100         NULL,
101         NULL,
102         NULL,
103 };
104
105 static const lc_opt_enum_int_items_t lower_perm_items[] = {
106         { "copy", BE_CH_LOWER_PERM_COPY },
107         { "swap", BE_CH_LOWER_PERM_SWAP },
108         { NULL, 0 }
109 };
110
111 static const lc_opt_enum_int_items_t lower_perm_stat_items[] = {
112         { NULL, 0 }
113 };
114
115 static const lc_opt_enum_int_items_t dump_items[] = {
116         { "none",       BE_CH_DUMP_NONE       },
117         { "spill",      BE_CH_DUMP_SPILL      },
118         { "live",       BE_CH_DUMP_LIVE       },
119         { "color",      BE_CH_DUMP_COLOR      },
120         { "copymin",    BE_CH_DUMP_COPYMIN    },
121         { "ssadestr",   BE_CH_DUMP_SSADESTR   },
122         { "tree",       BE_CH_DUMP_TREE_INTV  },
123         { "constr",     BE_CH_DUMP_CONSTR     },
124         { "lower",      BE_CH_DUMP_LOWER      },
125         { "spillslots", BE_CH_DUMP_SPILLSLOTS },
126         { "appel",      BE_CH_DUMP_APPEL      },
127         { "all",        BE_CH_DUMP_ALL        },
128         { NULL, 0 }
129 };
130
131 static const lc_opt_enum_int_items_t be_ch_vrfy_items[] = {
132         { "off",    BE_CH_VRFY_OFF    },
133         { "warn",   BE_CH_VRFY_WARN   },
134         { "assert", BE_CH_VRFY_ASSERT },
135         { NULL, 0 }
136 };
137
138 static lc_opt_enum_int_var_t lower_perm_var = {
139         &options.lower_perm_opt, lower_perm_items
140 };
141
142 static lc_opt_enum_int_var_t dump_var = {
143         &options.dump_flags, dump_items
144 };
145
146 static lc_opt_enum_int_var_t be_ch_vrfy_var = {
147         &options.vrfy_option, be_ch_vrfy_items
148 };
149
150 static const lc_opt_table_entry_t be_chordal_options[] = {
151         LC_OPT_ENT_ENUM_PTR ("perm",          "perm lowering options", &lower_perm_var),
152         LC_OPT_ENT_ENUM_MASK("dump",          "select dump phases", &dump_var),
153         LC_OPT_ENT_ENUM_PTR ("vrfy",          "verify options", &be_ch_vrfy_var),
154         { NULL }
155 };
156
157 static void dump(unsigned mask, ir_graph *irg,
158                                  const arch_register_class_t *cls,
159                                  const char *suffix,
160                                  void (*dump_func)(ir_graph *, const char *))
161 {
162         if((options.dump_flags & mask) == mask) {
163                 if (cls) {
164                         char buf[256];
165                         snprintf(buf, sizeof(buf), "-%s%s", cls->name, suffix);
166                         be_dump(irg, buf, dump_func);
167                 }
168                 else
169                         be_dump(irg, suffix, dump_func);
170         }
171 }
172
173 /**
174  * Checks for every reload if it's user can perform the load on itself.
175  */
176 static void memory_operand_walker(ir_node *irn, void *env) {
177         be_chordal_env_t *cenv = env;
178         const arch_env_t *aenv = cenv->birg->main_env->arch_env;
179         const ir_edge_t  *edge, *ne;
180         ir_node          *block;
181         ir_node          *spill;
182
183         if (! be_is_Reload(irn))
184                 return;
185
186         /* only use memory operands, if the reload is only used by 1 node */
187         if(get_irn_n_edges(irn) > 1)
188                 return;
189
190         spill = be_get_Reload_mem(irn);
191         block = get_nodes_block(irn);
192
193         foreach_out_edge_safe(irn, edge, ne) {
194                 ir_node *src = get_edge_src_irn(edge);
195                 int     pos  = get_edge_src_pos(edge);
196
197                 assert(src && "outedges broken!");
198
199                 if (get_nodes_block(src) == block && arch_possible_memory_operand(aenv, src, pos)) {
200                         arch_perform_memory_operand(aenv, src, spill, pos);
201                 }
202         }
203
204         /* kill the Reload */
205         if (get_irn_n_edges(irn) == 0) {
206                 sched_remove(irn);
207                 set_irn_n(irn, be_pos_Reload_mem, new_Bad());
208                 set_irn_n(irn, be_pos_Reload_frame, new_Bad());
209         }
210 }
211
212 /**
213  * Starts a walk for memory operands if supported by the backend.
214  */
215 static INLINE void check_for_memory_operands(be_chordal_env_t *chordal_env) {
216         irg_walk_graph(chordal_env->irg, NULL, memory_operand_walker, chordal_env);
217 }
218
219 /**
220  * Sorry for doing stats again...
221  */
222 typedef struct _node_stat_t {
223         unsigned int n_phis;      /**< Phis of the current register class. */
224         unsigned int n_mem_phis;  /**< Memory Phis (Phis with spill operands). */
225         unsigned int n_copies;    /**< Copies */
226         unsigned int n_perms;     /**< Perms */
227         unsigned int n_spills;    /**< Spill nodes */
228         unsigned int n_reloads;   /**< Reloads */
229 } node_stat_t;
230
231 struct node_stat_walker {
232         node_stat_t      *stat;
233         const arch_env_t *arch_env;
234         bitset_t         *mem_phis;
235         const arch_register_class_t *cls;
236 };
237
238 static void node_stat_walker(ir_node *irn, void *data)
239 {
240         struct node_stat_walker *env  = data;
241         const arch_env_t        *aenv = env->arch_env;
242
243         if (arch_irn_consider_in_reg_alloc(aenv, env->cls, irn)) {
244
245                 /* if the node is a normal phi */
246                 if(is_Phi(irn))
247                         env->stat->n_phis++;
248
249                 else if(arch_irn_classify(aenv, irn) & arch_irn_class_spill)
250                         ++env->stat->n_spills;
251
252                 else if(arch_irn_classify(aenv, irn) & arch_irn_class_reload)
253                         ++env->stat->n_reloads;
254
255                 else if(arch_irn_classify(aenv, irn) & arch_irn_class_copy)
256                         ++env->stat->n_copies;
257
258                 else if(arch_irn_classify(aenv, irn) & arch_irn_class_perm)
259                         ++env->stat->n_perms;
260         }
261
262         /* a mem phi is a PhiM with a mem phi operand or a Spill operand */
263         else if(is_Phi(irn) && get_irn_mode(irn) == mode_M) {
264                 int i;
265
266                 for(i = get_irn_arity(irn) - 1; i >= 0; --i) {
267                         ir_node *op = get_irn_n(irn, i);
268
269                         if((is_Phi(op) && bitset_contains_irn(env->mem_phis, op)) || (arch_irn_classify(aenv, op) & arch_irn_class_spill)) {
270                                 bitset_add_irn(env->mem_phis, irn);
271                                 env->stat->n_mem_phis++;
272                                 break;
273                         }
274                 }
275         }
276 }
277
278 static void node_stats(be_irg_t *birg, const arch_register_class_t *cls, node_stat_t *stat)
279 {
280         struct node_stat_walker env;
281
282         memset(stat, 0, sizeof(stat[0]));
283         env.arch_env = birg->main_env->arch_env;
284         env.mem_phis = bitset_irg_malloc(birg->irg);
285         env.stat     = stat;
286         env.cls      = cls;
287         irg_walk_graph(birg->irg, NULL, node_stat_walker, &env);
288         bitset_free(env.mem_phis);
289 }
290
291 static void insn_count_walker(ir_node *irn, void *data)
292 {
293         int *cnt = data;
294
295         switch(get_irn_opcode(irn)) {
296         case iro_Proj:
297         case iro_Phi:
298         case iro_Start:
299         case iro_End:
300                 break;
301         default:
302                 (*cnt)++;
303         }
304 }
305
306 static unsigned int count_insns(ir_graph *irg)
307 {
308         int cnt = 0;
309         irg_walk_graph(irg, insn_count_walker, NULL, &cnt);
310         return cnt;
311 }
312
313 /**
314  * Initialize all timers.
315  */
316 static void be_init_timer(be_options_t *main_opts)
317 {
318         if (main_opts->timing == BE_TIME_ON) {
319                 ra_timer.t_prolog     = lc_timer_register("ra_prolog",     "regalloc prolog");
320                 ra_timer.t_epilog     = lc_timer_register("ra_epilog",     "regalloc epilog");
321                 ra_timer.t_live       = lc_timer_register("ra_liveness",   "be liveness");
322                 ra_timer.t_spill      = lc_timer_register("ra_spill",      "spiller");
323                 ra_timer.t_spillslots = lc_timer_register("ra_spillslots", "spillslots");
324                 ra_timer.t_color      = lc_timer_register("ra_color",      "graph coloring");
325                 ra_timer.t_ifg        = lc_timer_register("ra_ifg",        "interference graph");
326                 ra_timer.t_copymin    = lc_timer_register("ra_copymin",    "copy minimization");
327                 ra_timer.t_ssa        = lc_timer_register("ra_ssadestr",   "ssa destruction");
328                 ra_timer.t_verify     = lc_timer_register("ra_verify",     "graph verification");
329                 ra_timer.t_other      = lc_timer_register("ra_other",      "other time");
330
331                 LC_STOP_AND_RESET_TIMER(ra_timer.t_prolog);
332                 LC_STOP_AND_RESET_TIMER(ra_timer.t_epilog);
333                 LC_STOP_AND_RESET_TIMER(ra_timer.t_live);
334                 LC_STOP_AND_RESET_TIMER(ra_timer.t_spill);
335                 LC_STOP_AND_RESET_TIMER(ra_timer.t_spillslots);
336                 LC_STOP_AND_RESET_TIMER(ra_timer.t_color);
337                 LC_STOP_AND_RESET_TIMER(ra_timer.t_ifg);
338                 LC_STOP_AND_RESET_TIMER(ra_timer.t_copymin);
339                 LC_STOP_AND_RESET_TIMER(ra_timer.t_ssa);
340                 LC_STOP_AND_RESET_TIMER(ra_timer.t_verify);
341                 LC_STOP_AND_RESET_TIMER(ra_timer.t_other);
342
343                 global_ra_timer = &ra_timer;
344         }
345 }
346
347 #define BE_TIMER_INIT(main_opts)        be_init_timer(main_opts)
348
349 #define BE_TIMER_PUSH(timer)                                                            \
350         if (main_opts->timing == BE_TIME_ON) {                                              \
351                 if (! lc_timer_push(timer)) {                                                   \
352                         if (options.vrfy_option == BE_CH_VRFY_ASSERT)                               \
353                                 assert(!"Timer already on stack, cannot be pushed twice.");             \
354                         else if (options.vrfy_option == BE_CH_VRFY_WARN)                            \
355                                 fprintf(stderr, "Timer %s already on stack, cannot be pushed twice.\n", \
356                                         lc_timer_get_name(timer));                                          \
357                 }                                                                               \
358         }
359 #define BE_TIMER_POP(timer)                                                                    \
360         if (main_opts->timing == BE_TIME_ON) {                                                     \
361                 lc_timer_t *tmp = lc_timer_pop();                                                      \
362                 if (options.vrfy_option == BE_CH_VRFY_ASSERT)                                          \
363                         assert(tmp == timer && "Attempt to pop wrong timer.");                             \
364                 else if (options.vrfy_option == BE_CH_VRFY_WARN && tmp != timer)                       \
365                         fprintf(stderr, "Attempt to pop wrong timer. %s is on stack, trying to pop %s.\n", \
366                                 lc_timer_get_name(tmp), lc_timer_get_name(timer));                             \
367                 timer = tmp;                                                                           \
368         }
369
370 /**
371  * Perform things which need to be done per register class before spilling.
372  */
373 static void pre_spill(const arch_isa_t *isa, int cls_idx, post_spill_env_t *pse) {
374         be_chordal_env_t *chordal_env = &pse->cenv;
375         be_irg_t         *birg        = pse->birg;
376         node_stat_t      node_stat;
377
378         pse->cls                   = arch_isa_get_reg_class(isa, cls_idx);
379         chordal_env->cls           = pse->cls;
380         chordal_env->border_heads  = pmap_create();
381         chordal_env->ignore_colors = bitset_malloc(chordal_env->cls->n_regs);
382
383 #ifdef FIRM_STATISTICS
384         if (be_stat_ev_is_active()) {
385                 be_stat_tags[STAT_TAG_CLS] = pse->cls->name;
386                 be_stat_ev_push(be_stat_tags, STAT_TAG_LAST, be_stat_file);
387
388                 /* perform some node statistics. */
389                 node_stats(birg, pse->cls, &node_stat);
390                 be_stat_ev("phis_before_spill", node_stat.n_phis);
391         }
392 #endif /* FIRM_STATISTICS */
393
394         /* put all ignore registers into the ignore register set. */
395         be_put_ignore_regs(birg, pse->cls, chordal_env->ignore_colors);
396
397         be_pre_spill_prepare_constr(chordal_env);
398         dump(BE_CH_DUMP_CONSTR, birg->irg, pse->cls, "-constr-pre", dump_ir_block_graph_sched);
399
400 #ifdef FIRM_STATISTICS
401         if (be_stat_ev_is_active()) {
402                 pse->pre_spill_cost = be_estimate_irg_costs(birg->irg,
403                         birg->main_env->arch_env, birg->exec_freq);
404                 be_stat_ev_pop();
405         }
406 #endif /* FIRM_STATISTICS */
407 }
408
409 /**
410  * Perform things which need to be done per register class after spilling.
411  */
412 static void post_spill(post_spill_env_t *pse, int iteration) {
413         be_chordal_env_t    *chordal_env = &pse->cenv;
414         be_irg_t            *birg        = pse->birg;
415         ir_graph            *irg         = birg->irg;
416         const be_main_env_t *main_env    = birg->main_env;
417         be_options_t        *main_opts   = main_env->options;
418         node_stat_t         node_stat;
419         int                 colors_n     = arch_register_class_n_regs(chordal_env->cls);
420         int             allocatable_regs = colors_n - be_put_ignore_regs(birg, chordal_env->cls, NULL);
421
422         /* some special classes contain only ignore regs, no work to be done */
423         if (allocatable_regs > 0) {
424
425 #ifdef FIRM_STATISTICS
426                 if (be_stat_ev_is_active()) {
427                         double spillcosts = be_estimate_irg_costs(irg, main_env->arch_env, birg->exec_freq) - pse->pre_spill_cost;
428
429                         be_stat_tags[STAT_TAG_CLS] = pse->cls->name;
430                         be_stat_ev_push(be_stat_tags, STAT_TAG_LAST, be_stat_file);
431
432                         be_stat_ev_l("spillcosts", (long) spillcosts);
433
434                         node_stats(birg, pse->cls, &node_stat);
435                         be_stat_ev("phis_after_spill", node_stat.n_phis);
436                         be_stat_ev("mem_phis", node_stat.n_mem_phis);
437                         be_stat_ev("reloads", node_stat.n_reloads);
438                         be_stat_ev("spills", node_stat.n_spills);
439                 }
440 #endif /* FIRM_STATISTICS */
441
442                 /*
443                         If we have a backend provided spiller, post spill is
444                         called in a loop after spilling for each register class.
445                         But we only need to fix stack nodes once in this case.
446                 */
447                 if (iteration == 0) {
448                         check_for_memory_operands(chordal_env);
449                         be_abi_fix_stack_nodes(birg->abi);
450                 }
451
452                 BE_TIMER_PUSH(ra_timer.t_verify);
453
454                 /* verify schedule and register pressure */
455                 if (chordal_env->opts->vrfy_option == BE_CH_VRFY_WARN) {
456                         be_verify_schedule(birg);
457                         be_verify_register_pressure(birg, pse->cls, irg);
458                 }
459                 else if (chordal_env->opts->vrfy_option == BE_CH_VRFY_ASSERT) {
460                         assert(be_verify_schedule(birg) && "Schedule verification failed");
461                         assert(be_verify_register_pressure(birg, pse->cls, irg)
462                                 && "Register pressure verification failed");
463                 }
464                 BE_TIMER_POP(ra_timer.t_verify);
465
466                 /* Color the graph. */
467                 BE_TIMER_PUSH(ra_timer.t_color);
468                 be_ra_chordal_color(chordal_env);
469                 BE_TIMER_POP(ra_timer.t_color);
470
471                 dump(BE_CH_DUMP_CONSTR, irg, pse->cls, "-color", dump_ir_block_graph_sched);
472
473                 /* Create the ifg with the selected flavor */
474                 BE_TIMER_PUSH(ra_timer.t_ifg);
475                 chordal_env->ifg = be_create_ifg(chordal_env);
476                 BE_TIMER_POP(ra_timer.t_ifg);
477
478 #ifdef FIRM_STATISTICS
479                 if (be_stat_ev_is_active()) {
480                         be_ifg_stat_t stat;
481
482                         be_ifg_stat(birg, chordal_env->ifg, &stat);
483                         be_stat_ev("ifg_nodes", stat.n_nodes);
484                         be_stat_ev("ifg_edges", stat.n_edges);
485                         be_stat_ev("ifg_comps", stat.n_comps);
486
487                         node_stats(birg, pse->cls, &node_stat);
488                         be_stat_ev("perms_before_coal", node_stat.n_perms);
489                         be_stat_ev("copies_before_coal", node_stat.n_copies);
490                 }
491 #endif /* FIRM_STATISTICS */
492
493                 /* copy minimization */
494                 BE_TIMER_PUSH(ra_timer.t_copymin);
495                 co_driver(chordal_env);
496                 BE_TIMER_POP(ra_timer.t_copymin);
497
498                 dump(BE_CH_DUMP_COPYMIN, irg, pse->cls, "-copymin", dump_ir_block_graph_sched);
499
500                 BE_TIMER_PUSH(ra_timer.t_ssa);
501
502                 /* ssa destruction */
503                 be_ssa_destruction(chordal_env);
504
505                 BE_TIMER_POP(ra_timer.t_ssa);
506
507                 dump(BE_CH_DUMP_SSADESTR, irg, pse->cls, "-ssadestr", dump_ir_block_graph_sched);
508
509                 BE_TIMER_PUSH(ra_timer.t_verify);
510                 if (chordal_env->opts->vrfy_option != BE_CH_VRFY_OFF) {
511                         be_ssa_destruction_check(chordal_env);
512                 }
513                 BE_TIMER_POP(ra_timer.t_verify);
514
515 #ifdef FIRM_STATISTICS
516                 if (be_stat_ev_is_active()) {
517                         node_stats(birg, pse->cls, &node_stat);
518                         be_stat_ev("perms_after_coal", node_stat.n_perms);
519                         be_stat_ev("copies_after_coal", node_stat.n_copies);
520                         be_stat_ev_pop();
521                 }
522 #endif /* FIRM_STATISTICS */
523
524                 /* the ifg exists only if there are allocatable regs */
525                 be_ifg_free(chordal_env->ifg);
526         }
527
528         /* free some always allocated data structures */
529         pmap_destroy(chordal_env->border_heads);
530         bitset_free(chordal_env->ignore_colors);
531 }
532
533 /**
534  * Performs chordal register allocation for each register class on given irg.
535  *
536  * @param birg  Backend irg object
537  * @return Structure containing timer for the single phases or NULL if no timing requested.
538  */
539 static void be_ra_chordal_main(be_irg_t *birg)
540 {
541         const be_main_env_t *main_env  = birg->main_env;
542         const arch_isa_t    *isa       = arch_env_get_isa(main_env->arch_env);
543         ir_graph            *irg       = birg->irg;
544         be_options_t        *main_opts = main_env->options;
545         int                 j, m;
546         be_chordal_env_t    chordal_env;
547
548         BE_TIMER_INIT(main_opts);
549         BE_TIMER_PUSH(ra_timer.t_other);
550         BE_TIMER_PUSH(ra_timer.t_prolog);
551
552         be_assure_dom_front(birg);
553         be_assure_liveness(birg);
554
555         chordal_env.opts          = &options;
556         chordal_env.irg           = irg;
557         chordal_env.birg          = birg;
558         chordal_env.border_heads  = NULL;
559         chordal_env.ifg           = NULL;
560         chordal_env.ignore_colors = NULL;
561
562         obstack_init(&chordal_env.obst);
563
564         BE_TIMER_POP(ra_timer.t_prolog);
565
566         be_stat_ev("insns_before", count_insns(irg));
567
568         if (! arch_code_generator_has_spiller(birg->cg)) {
569                 /* use one of the generic spiller */
570
571                 /* Perform the following for each register class. */
572                 for (j = 0, m = arch_isa_get_n_reg_class(isa); j < m; ++j) {
573                         post_spill_env_t pse;
574
575                         memcpy(&pse.cenv, &chordal_env, sizeof(chordal_env));
576                         pse.birg = birg;
577                         pre_spill(isa, j, &pse);
578
579                         BE_TIMER_PUSH(ra_timer.t_spill);
580                         be_do_spill(birg, pse.cls);
581                         BE_TIMER_POP(ra_timer.t_spill);
582
583                         dump(BE_CH_DUMP_SPILL, irg, pse.cls, "-spill", dump_ir_block_graph_sched);
584
585                         post_spill(&pse, 0);
586                 }
587         } else {
588                 post_spill_env_t *pse;
589
590                 /* the backend has it's own spiller */
591                 m = arch_isa_get_n_reg_class(isa);
592
593                 pse = alloca(m * sizeof(pse[0]));
594
595                 for (j = 0; j < m; ++j) {
596                         memcpy(&pse[j].cenv, &chordal_env, sizeof(chordal_env));
597                         pse[j].birg = birg;
598                         pre_spill(isa, j, &pse[j]);
599                 }
600
601                 BE_TIMER_PUSH(ra_timer.t_spill);
602                 arch_code_generator_spill(birg->cg, birg);
603                 BE_TIMER_POP(ra_timer.t_spill);
604                 dump(BE_CH_DUMP_SPILL, irg, NULL, "-spill", dump_ir_block_graph_sched);
605
606                 for (j = 0; j < m; ++j) {
607                         post_spill(&pse[j], j);
608                 }
609         }
610
611         BE_TIMER_PUSH(ra_timer.t_epilog);
612         lower_nodes_after_ra(birg, options.lower_perm_opt & BE_CH_LOWER_PERM_COPY ? 1 : 0);
613         dump(BE_CH_DUMP_LOWER, irg, NULL, "-belower-after-ra", dump_ir_block_graph_sched);
614
615         obstack_free(&chordal_env.obst, NULL);
616         be_invalidate_liveness(birg);
617         BE_TIMER_POP(ra_timer.t_epilog);
618
619         BE_TIMER_POP(ra_timer.t_other);
620
621         be_stat_ev("insns_after", count_insns(irg));
622
623         return;
624 }
625
626 static be_ra_t be_ra_chordal_allocator = {
627         be_ra_chordal_main,
628 };
629
630 void be_init_chordal_main(void)
631 {
632         lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
633         lc_opt_entry_t *ra_grp = lc_opt_get_grp(be_grp, "ra");
634         lc_opt_entry_t *chordal_grp = lc_opt_get_grp(ra_grp, "chordal");
635
636         lc_opt_add_table(chordal_grp, be_chordal_options);
637
638         be_register_allocator("chordal", &be_ra_chordal_allocator);
639 }
640
641 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal_main);