2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Driver for the chordal register allocator.
23 * @author Sebastian Hack
37 #include "lc_opts_enum.h"
41 #include "irgraph_t.h"
42 #include "irprintf_t.h"
53 #include "iredges_t.h"
56 #include "bechordal_t.h"
65 #include "bestatevent.h"
73 #include "bespillslots.h"
77 #include "becopystat.h"
78 #include "becopyopt.h"
79 #include "bessadestr.h"
83 #include "bepbqpcoloring.h"
85 static be_ra_chordal_opts_t options = {
87 BE_CH_LOWER_PERM_SWAP,
93 typedef struct post_spill_env_t {
94 be_chordal_env_t cenv;
96 const arch_register_class_t *cls;
97 double pre_spill_cost;
100 static const lc_opt_enum_int_items_t lower_perm_items[] = {
101 { "copy", BE_CH_LOWER_PERM_COPY },
102 { "swap", BE_CH_LOWER_PERM_SWAP },
106 static const lc_opt_enum_mask_items_t dump_items[] = {
107 { "none", BE_CH_DUMP_NONE },
108 { "spill", BE_CH_DUMP_SPILL },
109 { "live", BE_CH_DUMP_LIVE },
110 { "color", BE_CH_DUMP_COLOR },
111 { "copymin", BE_CH_DUMP_COPYMIN },
112 { "ssadestr", BE_CH_DUMP_SSADESTR },
113 { "tree", BE_CH_DUMP_TREE_INTV },
114 { "split", BE_CH_DUMP_SPLIT },
115 { "constr", BE_CH_DUMP_CONSTR },
116 { "lower", BE_CH_DUMP_LOWER },
117 { "spillslots", BE_CH_DUMP_SPILLSLOTS },
118 { "appel", BE_CH_DUMP_APPEL },
119 { "all", BE_CH_DUMP_ALL },
123 static const lc_opt_enum_int_items_t be_ch_vrfy_items[] = {
124 { "off", BE_CH_VRFY_OFF },
125 { "warn", BE_CH_VRFY_WARN },
126 { "assert", BE_CH_VRFY_ASSERT },
130 static lc_opt_enum_int_var_t lower_perm_var = {
131 &options.lower_perm_opt, lower_perm_items
134 static lc_opt_enum_mask_var_t dump_var = {
135 &options.dump_flags, dump_items
138 static lc_opt_enum_int_var_t be_ch_vrfy_var = {
139 &options.vrfy_option, be_ch_vrfy_items
142 static const lc_opt_table_entry_t be_chordal_options[] = {
143 LC_OPT_ENT_ENUM_INT ("perm", "perm lowering options", &lower_perm_var),
144 LC_OPT_ENT_ENUM_MASK("dump", "select dump phases", &dump_var),
145 LC_OPT_ENT_ENUM_INT ("verify", "verify options", &be_ch_vrfy_var),
149 static be_module_list_entry_t *colorings = NULL;
150 static const be_ra_chordal_coloring_t *selected_coloring = NULL;
152 void be_register_chordal_coloring(const char *name, be_ra_chordal_coloring_t *coloring)
154 if (selected_coloring == NULL)
155 selected_coloring = coloring;
157 be_add_module_to_list(&colorings, name, coloring);
160 static void be_ra_chordal_coloring(be_chordal_env_t *env)
162 selected_coloring->allocate(env);
165 static void dump(unsigned mask, ir_graph *irg,
166 const arch_register_class_t *cls,
169 if ((options.dump_flags & mask) == mask) {
172 snprintf(buf, sizeof(buf), "%s-%s", cls->name, suffix);
173 dump_ir_graph(irg, buf);
175 dump_ir_graph(irg, suffix);
181 * Post-Walker: Checks for the given reload if has only one user that can perform the
182 * reload as part of its address mode.
183 * Fold the reload into the user it that is possible.
185 static void memory_operand_walker(ir_node *irn, void *env)
192 if (! be_is_Reload(irn))
195 /* only use memory operands, if the reload is only used by 1 node */
196 if (get_irn_n_edges(irn) > 1)
199 spill = be_get_Reload_mem(irn);
200 block = get_nodes_block(irn);
202 foreach_out_edge_safe(irn, edge) {
203 ir_node *src = get_edge_src_irn(edge);
204 int pos = get_edge_src_pos(edge);
206 assert(src && "outedges broken!");
208 if (get_nodes_block(src) == block && arch_possible_memory_operand(src, pos)) {
209 arch_perform_memory_operand(src, spill, pos);
213 /* kill the Reload if it was folded */
214 if (get_irn_n_edges(irn) == 0) {
215 ir_graph *irg = get_irn_irg(irn);
216 ir_mode *frame_mode = get_irn_mode(get_irn_n(irn, n_be_Reload_frame));
218 set_irn_n(irn, n_be_Reload_mem, new_r_Bad(irg, mode_X));
219 set_irn_n(irn, n_be_Reload_frame, new_r_Bad(irg, frame_mode));
224 * Starts a walk for memory operands if supported by the backend.
226 void check_for_memory_operands(ir_graph *irg)
228 irg_walk_graph(irg, NULL, memory_operand_walker, NULL);
232 static be_node_stats_t last_node_stats;
235 * Perform things which need to be done per register class before spilling.
237 static void pre_spill(post_spill_env_t *pse, const arch_register_class_t *cls)
239 be_chordal_env_t *chordal_env = &pse->cenv;
240 ir_graph *irg = pse->irg;
241 ir_exec_freq *exec_freq = be_get_irg_exec_freq(irg);
244 chordal_env->cls = cls;
245 chordal_env->border_heads = pmap_create();
246 chordal_env->allocatable_regs = bitset_malloc(chordal_env->cls->n_regs);
248 be_assure_live_chk(irg);
250 if (stat_ev_enabled) {
251 pse->pre_spill_cost = be_estimate_irg_costs(irg, exec_freq);
254 /* put all ignore registers into the ignore register set. */
255 be_put_allocatable_regs(irg, pse->cls, chordal_env->allocatable_regs);
257 be_timer_push(T_RA_CONSTR);
258 be_pre_spill_prepare_constr(irg, chordal_env->cls);
259 be_timer_pop(T_RA_CONSTR);
261 dump(BE_CH_DUMP_CONSTR, irg, pse->cls, "constr-pre");
265 * Perform things which need to be done per register class after spilling.
267 static void post_spill(post_spill_env_t *pse, int iteration)
269 be_chordal_env_t *chordal_env = &pse->cenv;
270 ir_graph *irg = pse->irg;
271 ir_exec_freq *exec_freq = be_get_irg_exec_freq(irg);
272 int allocatable_regs = be_get_n_allocatable_regs(irg, chordal_env->cls);
274 /* some special classes contain only ignore regs, no work to be done */
275 if (allocatable_regs > 0) {
276 stat_ev_dbl("bechordal_spillcosts", be_estimate_irg_costs(irg, exec_freq) - pse->pre_spill_cost);
279 If we have a backend provided spiller, post spill is
280 called in a loop after spilling for each register class.
281 But we only need to fix stack nodes once in this case.
283 be_timer_push(T_RA_SPILL_APPLY);
284 check_for_memory_operands(irg);
285 if (iteration == 0) {
286 be_abi_fix_stack_nodes(irg);
288 be_timer_pop(T_RA_SPILL_APPLY);
291 /* verify schedule and register pressure */
292 be_timer_push(T_VERIFY);
293 if (chordal_env->opts->vrfy_option == BE_CH_VRFY_WARN) {
294 be_verify_schedule(irg);
295 be_verify_register_pressure(irg, pse->cls);
296 } else if (chordal_env->opts->vrfy_option == BE_CH_VRFY_ASSERT) {
297 assert(be_verify_schedule(irg) && "Schedule verification failed");
298 assert(be_verify_register_pressure(irg, pse->cls)
299 && "Register pressure verification failed");
301 be_timer_pop(T_VERIFY);
303 /* Color the graph. */
304 be_timer_push(T_RA_COLOR);
305 be_ra_chordal_coloring(chordal_env);
306 be_timer_pop(T_RA_COLOR);
308 dump(BE_CH_DUMP_CONSTR, irg, pse->cls, "color");
310 /* Create the ifg with the selected flavor */
311 be_timer_push(T_RA_IFG);
312 chordal_env->ifg = be_create_ifg(chordal_env);
313 be_timer_pop(T_RA_IFG);
315 if (stat_ev_enabled) {
317 be_node_stats_t node_stats;
319 be_ifg_stat(irg, chordal_env->ifg, &stat);
320 stat_ev_dbl("bechordal_ifg_nodes", stat.n_nodes);
321 stat_ev_dbl("bechordal_ifg_edges", stat.n_edges);
322 stat_ev_dbl("bechordal_ifg_comps", stat.n_comps);
324 be_collect_node_stats(&node_stats, irg);
325 be_subtract_node_stats(&node_stats, &last_node_stats);
327 stat_ev_dbl("bechordal_perms_before_coal",
328 node_stats[BE_STAT_PERMS]);
329 stat_ev_dbl("bechordal_copies_before_coal",
330 node_stats[BE_STAT_COPIES]);
333 be_timer_push(T_RA_COPYMIN);
334 co_driver(chordal_env);
335 be_timer_pop(T_RA_COPYMIN);
337 dump(BE_CH_DUMP_COPYMIN, irg, pse->cls, "copymin");
339 /* ssa destruction */
340 be_timer_push(T_RA_SSA);
341 be_ssa_destruction(chordal_env);
342 be_timer_pop(T_RA_SSA);
344 dump(BE_CH_DUMP_SSADESTR, irg, pse->cls, "ssadestr");
346 if (chordal_env->opts->vrfy_option != BE_CH_VRFY_OFF) {
347 be_timer_push(T_VERIFY);
348 be_ssa_destruction_check(chordal_env);
349 be_timer_pop(T_VERIFY);
352 /* the ifg exists only if there are allocatable regs */
353 be_ifg_free(chordal_env->ifg);
356 /* free some always allocated data structures */
357 pmap_destroy(chordal_env->border_heads);
358 bitset_free(chordal_env->allocatable_regs);
362 * Performs chordal register allocation for each register class on given irg.
364 * @param irg the graph
365 * @return Structure containing timer for the single phases or NULL if no
368 static void be_ra_chordal_main(ir_graph *irg)
370 const arch_env_t *arch_env = be_get_irg_arch_env(irg);
373 be_chordal_env_t chordal_env;
376 be_timer_push(T_RA_OTHER);
378 be_timer_push(T_RA_PROLOG);
380 chordal_env.obst = &obst;
381 chordal_env.opts = &options;
382 chordal_env.irg = irg;
383 chordal_env.border_heads = NULL;
384 chordal_env.ifg = NULL;
385 chordal_env.allocatable_regs = NULL;
389 be_timer_pop(T_RA_PROLOG);
391 if (stat_ev_enabled) {
392 be_collect_node_stats(&last_node_stats, irg);
395 /* use one of the generic spiller */
397 /* Perform the following for each register class. */
398 for (j = 0, m = arch_env->n_register_classes; j < m; ++j) {
399 post_spill_env_t pse;
400 const arch_register_class_t *cls = &arch_env->register_classes[j];
402 if (arch_register_class_flags(cls) & arch_register_class_flag_manual_ra)
406 stat_ev_ctx_push_str("bechordal_cls", cls->name);
408 if (stat_ev_enabled) {
409 be_do_stat_reg_pressure(irg, cls);
412 pse.cenv = chordal_env;
414 pre_spill(&pse, cls);
416 be_timer_push(T_RA_SPILL);
417 be_do_spill(irg, cls);
418 be_timer_pop(T_RA_SPILL);
420 dump(BE_CH_DUMP_SPILL, irg, pse.cls, "spill");
424 if (stat_ev_enabled) {
425 be_node_stats_t node_stats;
427 be_collect_node_stats(&node_stats, irg);
428 be_subtract_node_stats(&node_stats, &last_node_stats);
429 be_emit_node_stats(&node_stats, "bechordal_");
431 be_copy_node_stats(&last_node_stats, &node_stats);
432 stat_ev_ctx_pop("bechordal_cls");
436 be_timer_push(T_VERIFY);
437 if (chordal_env.opts->vrfy_option == BE_CH_VRFY_WARN) {
438 be_verify_register_allocation(irg);
439 } else if (chordal_env.opts->vrfy_option == BE_CH_VRFY_ASSERT) {
440 assert(be_verify_register_allocation(irg)
441 && "Register allocation invalid");
443 be_timer_pop(T_VERIFY);
445 be_timer_push(T_RA_EPILOG);
446 lower_nodes_after_ra(irg, options.lower_perm_opt == BE_CH_LOWER_PERM_COPY);
447 dump(BE_CH_DUMP_LOWER, irg, NULL, "belower-after-ra");
449 obstack_free(&obst, NULL);
450 be_invalidate_live_sets(irg);
451 be_timer_pop(T_RA_EPILOG);
453 be_timer_pop(T_RA_OTHER);
456 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal_main)
457 void be_init_chordal_main(void)
459 static be_ra_t be_ra_chordal_allocator = {
463 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
464 lc_opt_entry_t *ra_grp = lc_opt_get_grp(be_grp, "ra");
465 lc_opt_entry_t *chordal_grp = lc_opt_get_grp(ra_grp, "chordal");
467 be_register_allocator("chordal", &be_ra_chordal_allocator);
469 lc_opt_add_table(chordal_grp, be_chordal_options);
470 be_add_module_list_opt(chordal_grp, "coloring", "select coloring method", &colorings, (void**) &selected_coloring);