2 * @file bechordal_main.c
4 * @author Sebastian Hack
7 * Copyright (C) 2005-2006 Universitaet Karlsruhe
8 * Released under the GPL
10 * Driver for the chordal register allocator.
23 #include "firm_config.h"
26 #include <libcore/lc_opts.h>
27 #include <libcore/lc_opts_enum.h>
28 #include <libcore/lc_timing.h>
29 #endif /* WITH_LIBCORE */
33 #include "irgraph_t.h"
34 #include "irprintf_t.h"
47 #include "bechordal_t.h"
49 #include "bejavacoal.h"
52 #include "besched_t.h"
56 #include "beifg_impl.h"
58 #include "bestatevent.h"
61 #include "bespillbelady.h"
62 #include "bespillmorgan.h"
63 #include "bespillslots.h"
64 #include "bespilloptions.h"
68 #include "bespillremat.h"
71 #include "bejavacoal.h"
72 #include "becopystat.h"
73 #include "becopyopt.h"
74 #include "bessadestr.h"
78 static be_ra_chordal_opts_t options = {
82 BE_CH_LOWER_PERM_SWAP,
86 /** Enable extreme live range splitting. */
87 static int be_elr_split = 0;
89 /** Assumed loop iteration count for execution frequency estimation. */
90 static int be_loop_weight = 9;
92 typedef struct _post_spill_env_t {
93 be_chordal_env_t cenv;
94 double pre_spill_cost;
98 static be_ra_timer_t ra_timer = {
112 static const lc_opt_enum_int_items_t spill_items[] = {
113 { "morgan", BE_CH_SPILL_MORGAN },
114 { "belady", BE_CH_SPILL_BELADY },
116 { "remat", BE_CH_SPILL_REMAT },
117 #endif /* WITH_ILP */
121 static const lc_opt_enum_int_items_t ifg_flavor_items[] = {
122 { "std", BE_CH_IFG_STD },
123 { "fast", BE_CH_IFG_FAST },
124 { "clique", BE_CH_IFG_CLIQUE },
125 { "pointer", BE_CH_IFG_POINTER },
126 { "list", BE_CH_IFG_LIST },
127 { "check", BE_CH_IFG_CHECK },
131 static const lc_opt_enum_int_items_t lower_perm_items[] = {
132 { "copy", BE_CH_LOWER_PERM_COPY },
133 { "swap", BE_CH_LOWER_PERM_SWAP },
137 static const lc_opt_enum_int_items_t lower_perm_stat_items[] = {
141 static const lc_opt_enum_int_items_t dump_items[] = {
142 { "spill", BE_CH_DUMP_SPILL },
143 { "live", BE_CH_DUMP_LIVE },
144 { "color", BE_CH_DUMP_COLOR },
145 { "copymin", BE_CH_DUMP_COPYMIN },
146 { "ssadestr", BE_CH_DUMP_SSADESTR },
147 { "tree", BE_CH_DUMP_TREE_INTV },
148 { "constr", BE_CH_DUMP_CONSTR },
149 { "lower", BE_CH_DUMP_LOWER },
150 { "spillslots", BE_CH_DUMP_SPILLSLOTS },
151 { "appel", BE_CH_DUMP_APPEL },
152 { "all", BE_CH_DUMP_ALL },
156 static const lc_opt_enum_int_items_t be_ch_vrfy_items[] = {
157 { "off", BE_CH_VRFY_OFF },
158 { "warn", BE_CH_VRFY_WARN },
159 { "assert", BE_CH_VRFY_ASSERT },
163 static lc_opt_enum_int_var_t spill_var = {
164 &options.spill_method, spill_items
167 static lc_opt_enum_int_var_t ifg_flavor_var = {
168 &options.ifg_flavor, ifg_flavor_items
171 static lc_opt_enum_int_var_t lower_perm_var = {
172 &options.lower_perm_opt, lower_perm_items
175 static lc_opt_enum_int_var_t dump_var = {
176 &options.dump_flags, dump_items
179 static lc_opt_enum_int_var_t be_ch_vrfy_var = {
180 &options.vrfy_option, be_ch_vrfy_items
183 static const lc_opt_table_entry_t be_chordal_options[] = {
184 LC_OPT_ENT_ENUM_INT ("spill", "spill method", &spill_var),
185 LC_OPT_ENT_ENUM_PTR ("ifg", "interference graph flavour", &ifg_flavor_var),
186 LC_OPT_ENT_ENUM_PTR ("perm", "perm lowering options", &lower_perm_var),
187 LC_OPT_ENT_ENUM_MASK("dump", "select dump phases", &dump_var),
188 LC_OPT_ENT_ENUM_PTR ("vrfy", "verify options", &be_ch_vrfy_var),
189 LC_OPT_ENT_BOOL ("elrsplit", "enable extreme live range splitting", &be_elr_split),
190 LC_OPT_ENT_INT ("loop_weight", "assumed amount of loop iterations for guessing the execution frequency", &be_loop_weight),
194 extern void be_spill_remat_register_options(lc_opt_entry_t *ent);
196 void be_ra_chordal_check(be_chordal_env_t *chordal_env) {
197 const arch_env_t *arch_env = chordal_env->birg->main_env->arch_env;
200 ir_node **nodes, *n1, *n2;
202 be_lv_t *lv = chordal_env->birg->lv;
203 DEBUG_ONLY(firm_dbg_module_t *dbg = chordal_env->dbg;)
205 /* Collect all irns */
207 pmap_foreach(chordal_env->border_heads, pme) {
209 struct list_head *head = pme->value;
210 list_for_each_entry(border_t, curr, head, list)
211 if (curr->is_def && curr->is_real)
212 if (arch_get_irn_reg_class(arch_env, curr->irn, -1) == chordal_env->cls)
213 obstack_ptr_grow(&ob, curr->irn);
215 obstack_ptr_grow(&ob, NULL);
216 nodes = (ir_node **) obstack_finish(&ob);
219 for (i = 0, n1 = nodes[i]; n1; n1 = nodes[++i]) {
220 const arch_register_t *n1_reg, *n2_reg;
222 n1_reg = arch_get_irn_register(arch_env, n1);
223 if (!arch_reg_is_allocatable(arch_env, n1, -1, n1_reg)) {
224 DBG((dbg, 0, "Register %s assigned to %+F is not allowed\n", n1_reg->name, n1));
225 assert(0 && "Register constraint does not hold");
227 for (o = i+1, n2 = nodes[o]; n2; n2 = nodes[++o]) {
228 n2_reg = arch_get_irn_register(arch_env, n2);
229 if (values_interfere(lv, n1, n2) && n1_reg == n2_reg) {
230 DBG((dbg, 0, "Values %+F and %+F interfere and have the same register assigned: %s\n", n1, n2, n1_reg->name));
231 assert(0 && "Interfering values have the same color!");
235 obstack_free(&ob, NULL);
238 int nodes_interfere(const be_chordal_env_t *env, const ir_node *a, const ir_node *b)
241 return be_ifg_connected(env->ifg, a, b);
243 return values_interfere(env->birg->lv, a, b);
246 static void be_ra_chordal_register_options(lc_opt_entry_t *grp)
248 static int run_once = 0;
249 lc_opt_entry_t *chordal_grp;
253 chordal_grp = lc_opt_get_grp(grp, "chordal");
255 lc_opt_add_table(chordal_grp, be_chordal_options);
257 co_register_options(chordal_grp);
259 be_java_coal_register_options(chordal_grp);
262 be_spill_remat_register_options(chordal_grp);
266 #endif /* WITH_LIBCORE */
268 static void dump(unsigned mask, ir_graph *irg,
269 const arch_register_class_t *cls,
271 void (*dump_func)(ir_graph *, const char *))
273 if((options.dump_flags & mask) == mask) {
276 snprintf(buf, sizeof(buf), "-%s%s", cls->name, suffix);
277 be_dump(irg, buf, dump_func);
280 be_dump(irg, suffix, dump_func);
284 static void put_ignore_colors(be_chordal_env_t *chordal_env)
286 int n_colors = chordal_env->cls->n_regs;
289 bitset_clear_all(chordal_env->ignore_colors);
290 be_abi_put_ignore_regs(chordal_env->birg->abi, chordal_env->cls, chordal_env->ignore_colors);
291 for(i = 0; i < n_colors; ++i)
292 if(arch_register_type_is(&chordal_env->cls->regs[i], ignore))
293 bitset_set(chordal_env->ignore_colors, i);
296 FILE *be_chordal_open(const be_chordal_env_t *env, const char *prefix, const char *suffix)
300 ir_snprintf(buf, sizeof(buf), "%s%F_%s%s", prefix, env->irg, env->cls->name, suffix);
301 return fopen(buf, "wt");
304 void check_ifg_implementations(be_chordal_env_t *chordal_env)
308 f = be_chordal_open(chordal_env, "std", ".log");
309 chordal_env->ifg = be_ifg_std_new(chordal_env);
310 be_ifg_check_sorted_to_file(chordal_env->ifg, f);
313 f = be_chordal_open(chordal_env, "list", ".log");
314 be_ifg_free(chordal_env->ifg);
315 chordal_env->ifg = be_ifg_list_new(chordal_env);
316 be_ifg_check_sorted_to_file(chordal_env->ifg, f);
319 f = be_chordal_open(chordal_env, "clique", ".log");
320 be_ifg_free(chordal_env->ifg);
321 chordal_env->ifg = be_ifg_clique_new(chordal_env);
322 be_ifg_check_sorted_to_file(chordal_env->ifg, f);
325 f = be_chordal_open(chordal_env, "pointer", ".log");
326 be_ifg_free(chordal_env->ifg);
327 chordal_env->ifg = be_ifg_pointer_new(chordal_env);
328 be_ifg_check_sorted_to_file(chordal_env->ifg, f);
331 chordal_env->ifg = NULL;
335 * Checks for every reload if it's user can perform the load on itself.
337 static void memory_operand_walker(ir_node *irn, void *env) {
338 be_chordal_env_t *cenv = env;
339 const arch_env_t *aenv = cenv->birg->main_env->arch_env;
340 const ir_edge_t *edge, *ne;
344 if (! be_is_Reload(irn))
347 /* only use memory operands, if the reload is only used by 1 node */
348 if(get_irn_n_edges(irn) > 1)
351 spill = be_get_Reload_mem(irn);
352 block = get_nodes_block(irn);
354 foreach_out_edge_safe(irn, edge, ne) {
355 ir_node *src = get_edge_src_irn(edge);
356 int pos = get_edge_src_pos(edge);
358 assert(src && "outedges broken!");
360 if (get_nodes_block(src) == block && arch_possible_memory_operand(aenv, src, pos)) {
361 DBG((cenv->dbg, LEVEL_3, "performing memory operand %+F at %+F\n", irn, src));
362 arch_perform_memory_operand(aenv, src, spill, pos);
366 /* kill the Reload */
367 if (get_irn_n_edges(irn) == 0) {
369 set_irn_n(irn, be_pos_Reload_mem, new_Bad());
374 * Starts a walk for memory operands if supported by the backend.
376 static INLINE void check_for_memory_operands(be_chordal_env_t *chordal_env) {
377 irg_walk_graph(chordal_env->irg, NULL, memory_operand_walker, chordal_env);
381 * Sorry for doing stats again...
383 typedef struct _node_stat_t {
384 unsigned int n_phis; /**< Phis of the current register class. */
385 unsigned int n_mem_phis; /**< Memory Phis (Phis with spill operands). */
386 unsigned int n_copies; /**< Copies */
387 unsigned int n_perms; /**< Perms */
388 unsigned int n_spills; /**< Spill nodes */
389 unsigned int n_reloads; /**< Reloads */
392 struct node_stat_walker {
394 const be_chordal_env_t *cenv;
398 static void node_stat_walker(ir_node *irn, void *data)
400 struct node_stat_walker *env = data;
401 const arch_env_t *aenv = env->cenv->birg->main_env->arch_env;
403 if(arch_irn_consider_in_reg_alloc(aenv, env->cenv->cls, irn)) {
405 /* if the node is a normal phi */
409 else if(arch_irn_classify(aenv, irn) & arch_irn_class_spill)
410 ++env->stat->n_spills;
412 else if(arch_irn_classify(aenv, irn) & arch_irn_class_reload)
413 ++env->stat->n_reloads;
415 else if(arch_irn_classify(aenv, irn) & arch_irn_class_copy)
416 ++env->stat->n_copies;
418 else if(arch_irn_classify(aenv, irn) & arch_irn_class_perm)
419 ++env->stat->n_perms;
422 /* a mem phi is a PhiM with a mem phi operand or a Spill operand */
423 else if(is_Phi(irn) && get_irn_mode(irn) == mode_M) {
426 for(i = get_irn_arity(irn) - 1; i >= 0; --i) {
427 ir_node *op = get_irn_n(irn, i);
429 if((is_Phi(op) && bitset_contains_irn(env->mem_phis, op)) || (arch_irn_classify(aenv, op) & arch_irn_class_spill)) {
430 bitset_add_irn(env->mem_phis, irn);
431 env->stat->n_mem_phis++;
438 static void node_stats(const be_chordal_env_t *cenv, node_stat_t *stat)
440 struct node_stat_walker env;
442 memset(stat, 0, sizeof(stat[0]));
444 env.mem_phis = bitset_irg_malloc(cenv->irg);
446 irg_walk_graph(cenv->irg, NULL, node_stat_walker, &env);
447 bitset_free(env.mem_phis);
450 static void insn_count_walker(ir_node *irn, void *data)
454 switch(get_irn_opcode(irn)) {
465 static unsigned int count_insns(ir_graph *irg)
468 irg_walk_graph(irg, insn_count_walker, NULL, &cnt);
474 * Initialize all timers.
476 static void be_init_timer(be_options_t *main_opts)
478 if (main_opts->timing == BE_TIME_ON) {
479 ra_timer.t_prolog = lc_timer_register("ra_prolog", "regalloc prolog");
480 ra_timer.t_epilog = lc_timer_register("ra_epilog", "regalloc epilog");
481 ra_timer.t_live = lc_timer_register("ra_liveness", "be liveness");
482 ra_timer.t_spill = lc_timer_register("ra_spill", "spiller");
483 ra_timer.t_spillslots = lc_timer_register("ra_spillslots", "spillslots");
484 ra_timer.t_color = lc_timer_register("ra_color", "graph coloring");
485 ra_timer.t_ifg = lc_timer_register("ra_ifg", "interference graph");
486 ra_timer.t_copymin = lc_timer_register("ra_copymin", "copy minimization");
487 ra_timer.t_ssa = lc_timer_register("ra_ssadestr", "ssa destruction");
488 ra_timer.t_verify = lc_timer_register("ra_verify", "graph verification");
489 ra_timer.t_other = lc_timer_register("ra_other", "other time");
491 LC_STOP_AND_RESET_TIMER(ra_timer.t_prolog);
492 LC_STOP_AND_RESET_TIMER(ra_timer.t_epilog);
493 LC_STOP_AND_RESET_TIMER(ra_timer.t_live);
494 LC_STOP_AND_RESET_TIMER(ra_timer.t_spill);
495 LC_STOP_AND_RESET_TIMER(ra_timer.t_spillslots);
496 LC_STOP_AND_RESET_TIMER(ra_timer.t_color);
497 LC_STOP_AND_RESET_TIMER(ra_timer.t_ifg);
498 LC_STOP_AND_RESET_TIMER(ra_timer.t_copymin);
499 LC_STOP_AND_RESET_TIMER(ra_timer.t_ssa);
500 LC_STOP_AND_RESET_TIMER(ra_timer.t_verify);
501 LC_STOP_AND_RESET_TIMER(ra_timer.t_other);
505 #define BE_TIMER_INIT(main_opts) be_init_timer(main_opts)
507 #define BE_TIMER_PUSH(timer) \
508 if (main_opts->timing == BE_TIME_ON) { \
509 if (! lc_timer_push(timer)) { \
510 if (options.vrfy_option == BE_CH_VRFY_ASSERT) \
511 assert(!"Timer already on stack, cannot be pushed twice."); \
512 else if (options.vrfy_option == BE_CH_VRFY_WARN) \
513 fprintf(stderr, "Timer %s already on stack, cannot be pushed twice.\n", \
514 lc_timer_get_name(timer)); \
517 #define BE_TIMER_POP(timer) \
518 if (main_opts->timing == BE_TIME_ON) { \
519 lc_timer_t *tmp = lc_timer_pop(); \
520 if (options.vrfy_option == BE_CH_VRFY_ASSERT) \
521 assert(tmp == timer && "Attempt to pop wrong timer."); \
522 else if (options.vrfy_option == BE_CH_VRFY_WARN && tmp != timer) \
523 fprintf(stderr, "Attempt to pop wrong timer. %s is on stack, trying to pop %s.\n", \
524 lc_timer_get_name(tmp), lc_timer_get_name(timer)); \
529 #define BE_TIMER_INIT(main_opts)
530 #define BE_TIMER_PUSH(timer)
531 #define BE_TIMER_POP(timer)
533 #endif /* WITH_LIBCORE */
536 * Perform things which need to be done per register class before spilling.
538 static void pre_spill(const arch_isa_t *isa, int cls_idx, post_spill_env_t *pse) {
539 be_chordal_env_t *chordal_env = &pse->cenv;
540 node_stat_t node_stat;
542 chordal_env->cls = arch_isa_get_reg_class(isa, cls_idx);
543 chordal_env->border_heads = pmap_create();
544 chordal_env->ignore_colors = bitset_malloc(chordal_env->cls->n_regs);
546 #ifdef FIRM_STATISTICS
547 if (be_stat_ev_is_active()) {
548 be_stat_tags[STAT_TAG_CLS] = chordal_env->cls->name;
549 be_stat_ev_push(be_stat_tags, STAT_TAG_LAST, be_stat_file);
551 /* perform some node statistics. */
552 node_stats(chordal_env, &node_stat);
553 be_stat_ev("phis_before_spill", node_stat.n_phis);
555 #endif /* FIRM_STATISTICS */
557 /* put all ignore registers into the ignore register set. */
558 put_ignore_colors(chordal_env);
560 be_pre_spill_prepare_constr(chordal_env);
561 dump(BE_CH_DUMP_CONSTR, chordal_env->irg, chordal_env->cls, "-constr-pre", dump_ir_block_graph_sched);
563 #ifdef FIRM_STATISTICS
564 if (be_stat_ev_is_active()) {
565 pse->pre_spill_cost = be_estimate_irg_costs(chordal_env->irg,
566 chordal_env->birg->main_env->arch_env, chordal_env->birg->exec_freq);
568 #endif /* FIRM_STATISTICS */
572 * Perform things which need to be done per register class after spilling.
574 static void post_spill(post_spill_env_t *pse) {
575 be_chordal_env_t *chordal_env = &pse->cenv;
576 ir_graph *irg = chordal_env->irg;
577 be_irg_t *birg = chordal_env->birg;
578 const be_main_env_t *main_env = birg->main_env;
579 be_options_t *main_opts = main_env->options;
580 static int splitted = 0;
581 node_stat_t node_stat;
583 #ifdef FIRM_STATISTICS
584 if (be_stat_ev_is_active()) {
585 double spillcosts = be_estimate_irg_costs(irg, main_env->arch_env, birg->exec_freq) - pse->pre_spill_cost;
587 be_stat_ev_l("spillcosts", (long) spillcosts);
589 node_stats(chordal_env, &node_stat);
590 be_stat_ev("phis_after_spill", node_stat.n_phis);
591 be_stat_ev("mem_phis", node_stat.n_mem_phis);
592 be_stat_ev("reloads", node_stat.n_reloads);
593 be_stat_ev("spills", node_stat.n_spills);
595 #endif /* FIRM_STATISTICS */
597 check_for_memory_operands(chordal_env);
599 be_abi_fix_stack_nodes(birg->abi, birg->lv);
601 BE_TIMER_PUSH(ra_timer.t_verify);
603 /* verify schedule and register pressure */
604 if (chordal_env->opts->vrfy_option == BE_CH_VRFY_WARN) {
605 be_verify_schedule(irg);
606 be_verify_register_pressure(chordal_env->birg, chordal_env->cls, irg);
608 else if (chordal_env->opts->vrfy_option == BE_CH_VRFY_ASSERT) {
609 assert(be_verify_schedule(irg) && "Schedule verification failed");
610 assert(be_verify_register_pressure(chordal_env->birg, chordal_env->cls, irg)
611 && "Register pressure verification failed");
613 BE_TIMER_POP(ra_timer.t_verify);
615 if (be_elr_split && ! splitted) {
616 extreme_liverange_splitting(chordal_env);
620 /* Color the graph. */
621 BE_TIMER_PUSH(ra_timer.t_color);
622 be_ra_chordal_color(chordal_env);
623 BE_TIMER_POP(ra_timer.t_color);
625 dump(BE_CH_DUMP_CONSTR, irg, chordal_env->cls, "-color", dump_ir_block_graph_sched);
627 /* Create the ifg with the selected flavor */
628 BE_TIMER_PUSH(ra_timer.t_ifg);
629 switch (chordal_env->opts->ifg_flavor) {
631 fprintf(stderr, "no valid ifg flavour selected. falling back to std\n");
634 chordal_env->ifg = be_ifg_std_new(chordal_env);
636 case BE_CH_IFG_CLIQUE:
637 chordal_env->ifg = be_ifg_clique_new(chordal_env);
639 case BE_CH_IFG_POINTER:
640 chordal_env->ifg = be_ifg_pointer_new(chordal_env);
643 chordal_env->ifg = be_ifg_list_new(chordal_env);
645 case BE_CH_IFG_CHECK:
646 check_ifg_implementations(chordal_env);
647 /* Build the interference graph. */
648 chordal_env->ifg = be_ifg_std_new(chordal_env);
651 BE_TIMER_POP(ra_timer.t_ifg);
653 #ifdef FIRM_STATISTICS
654 if (be_stat_ev_is_active()) {
656 be_ifg_stat(chordal_env, &stat);
657 be_stat_ev("ifg_nodes", stat.n_nodes);
658 be_stat_ev("ifg_edges", stat.n_edges);
659 be_stat_ev("ifg_comps", stat.n_comps);
661 node_stats(chordal_env, &node_stat);
662 be_stat_ev("perms_before_coal", node_stat.n_perms);
663 be_stat_ev("copies_before_coal", node_stat.n_copies);
665 #endif /* FIRM_STATISTICS */
667 /* copy minimization */
668 BE_TIMER_PUSH(ra_timer.t_copymin);
669 co_driver(chordal_env);
670 BE_TIMER_POP(ra_timer.t_copymin);
672 dump(BE_CH_DUMP_COPYMIN, irg, chordal_env->cls, "-copymin", dump_ir_block_graph_sched);
674 BE_TIMER_PUSH(ra_timer.t_ssa);
676 /* ssa destruction */
677 be_ssa_destruction(chordal_env);
679 BE_TIMER_POP(ra_timer.t_ssa);
681 dump(BE_CH_DUMP_SSADESTR, irg, chordal_env->cls, "-ssadestr", dump_ir_block_graph_sched);
683 BE_TIMER_PUSH(ra_timer.t_verify);
684 if (chordal_env->opts->vrfy_option != BE_CH_VRFY_OFF) {
685 be_ssa_destruction_check(chordal_env);
687 BE_TIMER_POP(ra_timer.t_verify);
689 be_ifg_free(chordal_env->ifg);
690 pmap_destroy(chordal_env->border_heads);
691 bitset_free(chordal_env->ignore_colors);
693 #ifdef FIRM_STATISTICS
694 if (be_stat_ev_is_active()) {
695 node_stats(chordal_env, &node_stat);
696 be_stat_ev("perms_after_coal", node_stat.n_perms);
697 be_stat_ev("copies_after_coal", node_stat.n_copies);
700 #endif /* FIRM_STATISTICS */
704 * Performs chordal register allocation for each register class on given irg.
706 * @param birg Backend irg object
707 * @return Structure containing timer for the single phases or NULL if no timing requested.
709 static be_ra_timer_t *be_ra_chordal_main(be_irg_t *birg)
711 const be_main_env_t *main_env = birg->main_env;
712 const arch_isa_t *isa = arch_env_get_isa(main_env->arch_env);
713 ir_graph *irg = birg->irg;
714 be_options_t *main_opts = main_env->options;
716 be_chordal_env_t chordal_env;
718 BE_TIMER_INIT(main_opts);
719 BE_TIMER_PUSH(ra_timer.t_other);
720 BE_TIMER_PUSH(ra_timer.t_prolog);
722 be_assure_dom_front(birg);
723 be_assure_liveness(birg);
725 chordal_env.opts = &options;
726 chordal_env.irg = irg;
727 chordal_env.birg = birg;
728 FIRM_DBG_REGISTER(chordal_env.dbg, "firm.be.chordal");
730 obstack_init(&chordal_env.obst);
732 BE_TIMER_POP(ra_timer.t_prolog);
734 be_stat_ev("insns_before", count_insns(irg));
736 if (! arch_code_generator_has_spiller(birg->cg)) {
737 /* use one of the generic spiller */
739 /* Perform the following for each register class. */
740 for (j = 0, m = arch_isa_get_n_reg_class(isa); j < m; ++j) {
741 post_spill_env_t pse;
743 memcpy(&pse.cenv, &chordal_env, sizeof(chordal_env));
744 pre_spill(isa, j, &pse);
746 BE_TIMER_PUSH(ra_timer.t_spill);
748 switch(options.spill_method) {
749 case BE_CH_SPILL_MORGAN:
750 be_spill_morgan(&pse.cenv);
752 case BE_CH_SPILL_BELADY:
753 be_spill_belady(&pse.cenv);
756 case BE_CH_SPILL_REMAT:
757 be_spill_remat(&pse.cenv);
759 #endif /* WITH_ILP */
761 fprintf(stderr, "no valid spiller selected. falling back to belady\n");
762 be_spill_belady(&pse.cenv);
764 BE_TIMER_POP(ra_timer.t_spill);
766 dump(BE_CH_DUMP_SPILL, irg, pse.cenv.cls, "-spill", dump_ir_block_graph_sched);
772 post_spill_env_t *pse;
774 /* the backend has it's own spiller */
775 m = arch_isa_get_n_reg_class(isa);
777 pse = alloca(m * sizeof(pse[0]));
779 for (j = 0; j < m; ++j) {
780 memcpy(&pse[j].cenv, &chordal_env, sizeof(chordal_env));
781 pre_spill(isa, j, &pse[j]);
784 BE_TIMER_PUSH(ra_timer.t_spill);
785 arch_code_generator_spill(birg->cg, &chordal_env);
786 BE_TIMER_POP(ra_timer.t_spill);
787 dump(BE_CH_DUMP_SPILL, irg, NULL, "-spill", dump_ir_block_graph_sched);
789 for (j = 0; j < m; ++j) {
794 BE_TIMER_PUSH(ra_timer.t_spillslots);
796 be_coalesce_spillslots(&chordal_env);
797 dump(BE_CH_DUMP_SPILLSLOTS, irg, NULL, "-spillslots", dump_ir_block_graph_sched);
799 BE_TIMER_POP(ra_timer.t_spillslots);
801 BE_TIMER_PUSH(ra_timer.t_verify);
802 /* verify spillslots */
803 if (options.vrfy_option == BE_CH_VRFY_WARN) {
804 be_verify_spillslots(main_env->arch_env, irg);
806 else if (options.vrfy_option == BE_CH_VRFY_ASSERT) {
807 assert(be_verify_spillslots(main_env->arch_env, irg) && "Spillslot verification failed");
809 BE_TIMER_POP(ra_timer.t_verify);
811 BE_TIMER_PUSH(ra_timer.t_epilog);
812 dump(BE_CH_DUMP_LOWER, irg, NULL, "-spilloff", dump_ir_block_graph_sched);
814 lower_nodes_after_ra(&chordal_env, options.lower_perm_opt & BE_CH_LOWER_PERM_COPY ? 1 : 0);
815 dump(BE_CH_DUMP_LOWER, irg, NULL, "-belower-after-ra", dump_ir_block_graph_sched);
817 obstack_free(&chordal_env.obst, NULL);
818 BE_TIMER_POP(ra_timer.t_epilog);
820 BE_TIMER_POP(ra_timer.t_other);
822 be_stat_ev("insns_after", count_insns(irg));
825 return main_opts->timing == BE_TIME_ON ? &ra_timer : NULL;
826 #endif /* WITH_LIBCORE */
830 const be_ra_t be_ra_chordal_allocator = {
832 be_ra_chordal_register_options,