2 * @file bechordal_main.c
4 * @author Sebastian Hack
7 * Copyright (C) 2005-2006 Universitaet Karlsruhe
8 * Released under the GPL
10 * Driver for the chordal register allocator.
23 #include "firm_config.h"
25 #include <libcore/lc_opts.h>
26 #include <libcore/lc_opts_enum.h>
27 #include <libcore/lc_timing.h>
31 #include "irgraph_t.h"
32 #include "irprintf_t.h"
45 #include "bechordal_t.h"
47 #include "bejavacoal.h"
50 #include "besched_t.h"
54 #include "beifg_impl.h"
56 #include "bestatevent.h"
60 #include "bespillbelady.h"
61 #include "bespillmorgan.h"
62 #include "bespillslots.h"
63 #include "bespilloptions.h"
67 #include "bespillremat.h"
70 #include "bejavacoal.h"
71 #include "becopystat.h"
72 #include "becopyopt.h"
73 #include "bessadestr.h"
77 static be_ra_chordal_opts_t options = {
79 BE_CH_LOWER_PERM_SWAP,
83 typedef struct _post_spill_env_t {
84 be_chordal_env_t cenv;
86 const arch_register_class_t *cls;
87 double pre_spill_cost;
90 static be_ra_timer_t ra_timer = {
104 static const lc_opt_enum_int_items_t lower_perm_items[] = {
105 { "copy", BE_CH_LOWER_PERM_COPY },
106 { "swap", BE_CH_LOWER_PERM_SWAP },
110 static const lc_opt_enum_int_items_t lower_perm_stat_items[] = {
114 static const lc_opt_enum_int_items_t dump_items[] = {
115 { "none", BE_CH_DUMP_NONE },
116 { "spill", BE_CH_DUMP_SPILL },
117 { "live", BE_CH_DUMP_LIVE },
118 { "color", BE_CH_DUMP_COLOR },
119 { "copymin", BE_CH_DUMP_COPYMIN },
120 { "ssadestr", BE_CH_DUMP_SSADESTR },
121 { "tree", BE_CH_DUMP_TREE_INTV },
122 { "constr", BE_CH_DUMP_CONSTR },
123 { "lower", BE_CH_DUMP_LOWER },
124 { "spillslots", BE_CH_DUMP_SPILLSLOTS },
125 { "appel", BE_CH_DUMP_APPEL },
126 { "all", BE_CH_DUMP_ALL },
130 static const lc_opt_enum_int_items_t be_ch_vrfy_items[] = {
131 { "off", BE_CH_VRFY_OFF },
132 { "warn", BE_CH_VRFY_WARN },
133 { "assert", BE_CH_VRFY_ASSERT },
137 static lc_opt_enum_int_var_t lower_perm_var = {
138 &options.lower_perm_opt, lower_perm_items
141 static lc_opt_enum_int_var_t dump_var = {
142 &options.dump_flags, dump_items
145 static lc_opt_enum_int_var_t be_ch_vrfy_var = {
146 &options.vrfy_option, be_ch_vrfy_items
149 static const lc_opt_table_entry_t be_chordal_options[] = {
150 LC_OPT_ENT_ENUM_PTR ("perm", "perm lowering options", &lower_perm_var),
151 LC_OPT_ENT_ENUM_MASK("dump", "select dump phases", &dump_var),
152 LC_OPT_ENT_ENUM_PTR ("vrfy", "verify options", &be_ch_vrfy_var),
156 static void dump(unsigned mask, ir_graph *irg,
157 const arch_register_class_t *cls,
159 void (*dump_func)(ir_graph *, const char *))
161 if((options.dump_flags & mask) == mask) {
164 snprintf(buf, sizeof(buf), "-%s%s", cls->name, suffix);
165 be_dump(irg, buf, dump_func);
168 be_dump(irg, suffix, dump_func);
173 * Checks for every reload if it's user can perform the load on itself.
175 static void memory_operand_walker(ir_node *irn, void *env) {
176 be_chordal_env_t *cenv = env;
177 const arch_env_t *aenv = cenv->birg->main_env->arch_env;
178 const ir_edge_t *edge, *ne;
182 if (! be_is_Reload(irn))
185 /* only use memory operands, if the reload is only used by 1 node */
186 if(get_irn_n_edges(irn) > 1)
189 spill = be_get_Reload_mem(irn);
190 block = get_nodes_block(irn);
192 foreach_out_edge_safe(irn, edge, ne) {
193 ir_node *src = get_edge_src_irn(edge);
194 int pos = get_edge_src_pos(edge);
196 assert(src && "outedges broken!");
198 if (get_nodes_block(src) == block && arch_possible_memory_operand(aenv, src, pos)) {
199 DBG((cenv->dbg, LEVEL_3, "performing memory operand %+F at %+F\n", irn, src));
200 arch_perform_memory_operand(aenv, src, spill, pos);
204 /* kill the Reload */
205 if (get_irn_n_edges(irn) == 0) {
207 set_irn_n(irn, be_pos_Reload_mem, new_Bad());
208 set_irn_n(irn, be_pos_Reload_frame, new_Bad());
213 * Starts a walk for memory operands if supported by the backend.
215 static INLINE void check_for_memory_operands(be_chordal_env_t *chordal_env) {
216 irg_walk_graph(chordal_env->irg, NULL, memory_operand_walker, chordal_env);
220 * Sorry for doing stats again...
222 typedef struct _node_stat_t {
223 unsigned int n_phis; /**< Phis of the current register class. */
224 unsigned int n_mem_phis; /**< Memory Phis (Phis with spill operands). */
225 unsigned int n_copies; /**< Copies */
226 unsigned int n_perms; /**< Perms */
227 unsigned int n_spills; /**< Spill nodes */
228 unsigned int n_reloads; /**< Reloads */
231 struct node_stat_walker {
233 const arch_env_t *arch_env;
235 const arch_register_class_t *cls;
238 static void node_stat_walker(ir_node *irn, void *data)
240 struct node_stat_walker *env = data;
241 const arch_env_t *aenv = env->arch_env;
243 if (arch_irn_consider_in_reg_alloc(aenv, env->cls, irn)) {
245 /* if the node is a normal phi */
249 else if(arch_irn_classify(aenv, irn) & arch_irn_class_spill)
250 ++env->stat->n_spills;
252 else if(arch_irn_classify(aenv, irn) & arch_irn_class_reload)
253 ++env->stat->n_reloads;
255 else if(arch_irn_classify(aenv, irn) & arch_irn_class_copy)
256 ++env->stat->n_copies;
258 else if(arch_irn_classify(aenv, irn) & arch_irn_class_perm)
259 ++env->stat->n_perms;
262 /* a mem phi is a PhiM with a mem phi operand or a Spill operand */
263 else if(is_Phi(irn) && get_irn_mode(irn) == mode_M) {
266 for(i = get_irn_arity(irn) - 1; i >= 0; --i) {
267 ir_node *op = get_irn_n(irn, i);
269 if((is_Phi(op) && bitset_contains_irn(env->mem_phis, op)) || (arch_irn_classify(aenv, op) & arch_irn_class_spill)) {
270 bitset_add_irn(env->mem_phis, irn);
271 env->stat->n_mem_phis++;
278 static void node_stats(be_irg_t *birg, const arch_register_class_t *cls, node_stat_t *stat)
280 struct node_stat_walker env;
282 memset(stat, 0, sizeof(stat[0]));
283 env.arch_env = birg->main_env->arch_env;
284 env.mem_phis = bitset_irg_malloc(birg->irg);
287 irg_walk_graph(birg->irg, NULL, node_stat_walker, &env);
288 bitset_free(env.mem_phis);
291 static void insn_count_walker(ir_node *irn, void *data)
295 switch(get_irn_opcode(irn)) {
306 static unsigned int count_insns(ir_graph *irg)
309 irg_walk_graph(irg, insn_count_walker, NULL, &cnt);
314 * Initialize all timers.
316 static void be_init_timer(be_options_t *main_opts)
318 if (main_opts->timing == BE_TIME_ON) {
319 ra_timer.t_prolog = lc_timer_register("ra_prolog", "regalloc prolog");
320 ra_timer.t_epilog = lc_timer_register("ra_epilog", "regalloc epilog");
321 ra_timer.t_live = lc_timer_register("ra_liveness", "be liveness");
322 ra_timer.t_spill = lc_timer_register("ra_spill", "spiller");
323 ra_timer.t_spillslots = lc_timer_register("ra_spillslots", "spillslots");
324 ra_timer.t_color = lc_timer_register("ra_color", "graph coloring");
325 ra_timer.t_ifg = lc_timer_register("ra_ifg", "interference graph");
326 ra_timer.t_copymin = lc_timer_register("ra_copymin", "copy minimization");
327 ra_timer.t_ssa = lc_timer_register("ra_ssadestr", "ssa destruction");
328 ra_timer.t_verify = lc_timer_register("ra_verify", "graph verification");
329 ra_timer.t_other = lc_timer_register("ra_other", "other time");
331 LC_STOP_AND_RESET_TIMER(ra_timer.t_prolog);
332 LC_STOP_AND_RESET_TIMER(ra_timer.t_epilog);
333 LC_STOP_AND_RESET_TIMER(ra_timer.t_live);
334 LC_STOP_AND_RESET_TIMER(ra_timer.t_spill);
335 LC_STOP_AND_RESET_TIMER(ra_timer.t_spillslots);
336 LC_STOP_AND_RESET_TIMER(ra_timer.t_color);
337 LC_STOP_AND_RESET_TIMER(ra_timer.t_ifg);
338 LC_STOP_AND_RESET_TIMER(ra_timer.t_copymin);
339 LC_STOP_AND_RESET_TIMER(ra_timer.t_ssa);
340 LC_STOP_AND_RESET_TIMER(ra_timer.t_verify);
341 LC_STOP_AND_RESET_TIMER(ra_timer.t_other);
343 global_ra_timer = &ra_timer;
347 #define BE_TIMER_INIT(main_opts) be_init_timer(main_opts)
349 #define BE_TIMER_PUSH(timer) \
350 if (main_opts->timing == BE_TIME_ON) { \
351 if (! lc_timer_push(timer)) { \
352 if (options.vrfy_option == BE_CH_VRFY_ASSERT) \
353 assert(!"Timer already on stack, cannot be pushed twice."); \
354 else if (options.vrfy_option == BE_CH_VRFY_WARN) \
355 fprintf(stderr, "Timer %s already on stack, cannot be pushed twice.\n", \
356 lc_timer_get_name(timer)); \
359 #define BE_TIMER_POP(timer) \
360 if (main_opts->timing == BE_TIME_ON) { \
361 lc_timer_t *tmp = lc_timer_pop(); \
362 if (options.vrfy_option == BE_CH_VRFY_ASSERT) \
363 assert(tmp == timer && "Attempt to pop wrong timer."); \
364 else if (options.vrfy_option == BE_CH_VRFY_WARN && tmp != timer) \
365 fprintf(stderr, "Attempt to pop wrong timer. %s is on stack, trying to pop %s.\n", \
366 lc_timer_get_name(tmp), lc_timer_get_name(timer)); \
371 * Perform things which need to be done per register class before spilling.
373 static void pre_spill(const arch_isa_t *isa, int cls_idx, post_spill_env_t *pse) {
374 be_chordal_env_t *chordal_env = &pse->cenv;
375 be_irg_t *birg = pse->birg;
376 node_stat_t node_stat;
378 pse->cls = arch_isa_get_reg_class(isa, cls_idx);
379 chordal_env->cls = pse->cls;
380 chordal_env->border_heads = pmap_create();
381 chordal_env->ignore_colors = bitset_malloc(chordal_env->cls->n_regs);
383 #ifdef FIRM_STATISTICS
384 if (be_stat_ev_is_active()) {
385 be_stat_tags[STAT_TAG_CLS] = pse->cls->name;
386 be_stat_ev_push(be_stat_tags, STAT_TAG_LAST, be_stat_file);
388 /* perform some node statistics. */
389 node_stats(birg, pse->cls, &node_stat);
390 be_stat_ev("phis_before_spill", node_stat.n_phis);
392 #endif /* FIRM_STATISTICS */
394 /* put all ignore registers into the ignore register set. */
395 be_put_ignore_regs(birg, pse->cls, chordal_env->ignore_colors);
397 be_pre_spill_prepare_constr(chordal_env);
398 dump(BE_CH_DUMP_CONSTR, birg->irg, pse->cls, "-constr-pre", dump_ir_block_graph_sched);
400 #ifdef FIRM_STATISTICS
401 if (be_stat_ev_is_active()) {
402 pse->pre_spill_cost = be_estimate_irg_costs(birg->irg,
403 birg->main_env->arch_env, birg->exec_freq);
406 #endif /* FIRM_STATISTICS */
410 * Perform things which need to be done per register class after spilling.
412 static void post_spill(post_spill_env_t *pse, int iteration) {
413 be_chordal_env_t *chordal_env = &pse->cenv;
414 be_irg_t *birg = pse->birg;
415 ir_graph *irg = birg->irg;
416 const be_main_env_t *main_env = birg->main_env;
417 be_options_t *main_opts = main_env->options;
418 node_stat_t node_stat;
420 #ifdef FIRM_STATISTICS
421 if (be_stat_ev_is_active()) {
422 double spillcosts = be_estimate_irg_costs(irg, main_env->arch_env, birg->exec_freq) - pse->pre_spill_cost;
424 be_stat_tags[STAT_TAG_CLS] = pse->cls->name;
425 be_stat_ev_push(be_stat_tags, STAT_TAG_LAST, be_stat_file);
427 be_stat_ev_l("spillcosts", (long) spillcosts);
429 node_stats(birg, pse->cls, &node_stat);
430 be_stat_ev("phis_after_spill", node_stat.n_phis);
431 be_stat_ev("mem_phis", node_stat.n_mem_phis);
432 be_stat_ev("reloads", node_stat.n_reloads);
433 be_stat_ev("spills", node_stat.n_spills);
435 #endif /* FIRM_STATISTICS */
438 If we have a backend provided spiller, post spill is
439 called in a loop after spilling for each register class.
440 But we only need to fix stack nodes once in this case.
442 if (iteration == 0) {
443 check_for_memory_operands(chordal_env);
444 be_abi_fix_stack_nodes(birg->abi);
447 BE_TIMER_PUSH(ra_timer.t_verify);
449 /* verify schedule and register pressure */
450 if (chordal_env->opts->vrfy_option == BE_CH_VRFY_WARN) {
451 be_verify_schedule(irg);
452 be_verify_register_pressure(birg, pse->cls, irg);
454 else if (chordal_env->opts->vrfy_option == BE_CH_VRFY_ASSERT) {
455 assert(be_verify_schedule(irg) && "Schedule verification failed");
456 assert(be_verify_register_pressure(birg, pse->cls, irg)
457 && "Register pressure verification failed");
459 BE_TIMER_POP(ra_timer.t_verify);
461 /* Color the graph. */
462 BE_TIMER_PUSH(ra_timer.t_color);
463 be_ra_chordal_color(chordal_env);
464 BE_TIMER_POP(ra_timer.t_color);
466 dump(BE_CH_DUMP_CONSTR, irg, pse->cls, "-color", dump_ir_block_graph_sched);
468 /* Create the ifg with the selected flavor */
469 BE_TIMER_PUSH(ra_timer.t_ifg);
470 chordal_env->ifg = be_create_ifg(chordal_env);
471 BE_TIMER_POP(ra_timer.t_ifg);
473 #ifdef FIRM_STATISTICS
474 if (be_stat_ev_is_active()) {
477 be_ifg_stat(birg, chordal_env->ifg, &stat);
478 be_stat_ev("ifg_nodes", stat.n_nodes);
479 be_stat_ev("ifg_edges", stat.n_edges);
480 be_stat_ev("ifg_comps", stat.n_comps);
482 node_stats(birg, pse->cls, &node_stat);
483 be_stat_ev("perms_before_coal", node_stat.n_perms);
484 be_stat_ev("copies_before_coal", node_stat.n_copies);
486 #endif /* FIRM_STATISTICS */
488 /* copy minimization */
489 BE_TIMER_PUSH(ra_timer.t_copymin);
490 co_driver(chordal_env);
491 BE_TIMER_POP(ra_timer.t_copymin);
493 dump(BE_CH_DUMP_COPYMIN, irg, pse->cls, "-copymin", dump_ir_block_graph_sched);
495 BE_TIMER_PUSH(ra_timer.t_ssa);
497 /* ssa destruction */
498 be_ssa_destruction(chordal_env);
500 BE_TIMER_POP(ra_timer.t_ssa);
502 dump(BE_CH_DUMP_SSADESTR, irg, pse->cls, "-ssadestr", dump_ir_block_graph_sched);
504 BE_TIMER_PUSH(ra_timer.t_verify);
505 if (chordal_env->opts->vrfy_option != BE_CH_VRFY_OFF) {
506 be_ssa_destruction_check(chordal_env);
508 BE_TIMER_POP(ra_timer.t_verify);
510 /* free some data structures */
511 be_ifg_free(chordal_env->ifg);
512 pmap_destroy(chordal_env->border_heads);
513 bitset_free(chordal_env->ignore_colors);
515 #ifdef FIRM_STATISTICS
516 if (be_stat_ev_is_active()) {
517 node_stats(birg, pse->cls, &node_stat);
518 be_stat_ev("perms_after_coal", node_stat.n_perms);
519 be_stat_ev("copies_after_coal", node_stat.n_copies);
522 #endif /* FIRM_STATISTICS */
526 * Performs chordal register allocation for each register class on given irg.
528 * @param birg Backend irg object
529 * @return Structure containing timer for the single phases or NULL if no timing requested.
531 static void be_ra_chordal_main(be_irg_t *birg)
533 const be_main_env_t *main_env = birg->main_env;
534 const arch_isa_t *isa = arch_env_get_isa(main_env->arch_env);
535 ir_graph *irg = birg->irg;
536 be_options_t *main_opts = main_env->options;
538 be_chordal_env_t chordal_env;
540 BE_TIMER_INIT(main_opts);
541 BE_TIMER_PUSH(ra_timer.t_other);
542 BE_TIMER_PUSH(ra_timer.t_prolog);
544 be_assure_dom_front(birg);
545 be_assure_liveness(birg);
547 chordal_env.opts = &options;
548 chordal_env.irg = irg;
549 chordal_env.birg = birg;
550 FIRM_DBG_REGISTER(chordal_env.dbg, "firm.be.chordal");
552 obstack_init(&chordal_env.obst);
554 BE_TIMER_POP(ra_timer.t_prolog);
556 be_stat_ev("insns_before", count_insns(irg));
558 if (! arch_code_generator_has_spiller(birg->cg)) {
559 /* use one of the generic spiller */
561 /* Perform the following for each register class. */
562 for (j = 0, m = arch_isa_get_n_reg_class(isa); j < m; ++j) {
563 post_spill_env_t pse;
565 memcpy(&pse.cenv, &chordal_env, sizeof(chordal_env));
567 pre_spill(isa, j, &pse);
569 BE_TIMER_PUSH(ra_timer.t_spill);
570 be_do_spill(birg, pse.cls);
571 BE_TIMER_POP(ra_timer.t_spill);
573 dump(BE_CH_DUMP_SPILL, irg, pse.cls, "-spill", dump_ir_block_graph_sched);
578 post_spill_env_t *pse;
580 /* the backend has it's own spiller */
581 m = arch_isa_get_n_reg_class(isa);
583 pse = alloca(m * sizeof(pse[0]));
585 for (j = 0; j < m; ++j) {
586 memcpy(&pse[j].cenv, &chordal_env, sizeof(chordal_env));
588 pre_spill(isa, j, &pse[j]);
591 BE_TIMER_PUSH(ra_timer.t_spill);
592 arch_code_generator_spill(birg->cg, birg);
593 BE_TIMER_POP(ra_timer.t_spill);
594 dump(BE_CH_DUMP_SPILL, irg, NULL, "-spill", dump_ir_block_graph_sched);
596 for (j = 0; j < m; ++j) {
597 post_spill(&pse[j], j);
601 BE_TIMER_PUSH(ra_timer.t_epilog);
602 lower_nodes_after_ra(birg, options.lower_perm_opt & BE_CH_LOWER_PERM_COPY ? 1 : 0);
603 dump(BE_CH_DUMP_LOWER, irg, NULL, "-belower-after-ra", dump_ir_block_graph_sched);
605 obstack_free(&chordal_env.obst, NULL);
606 be_invalidate_liveness(birg);
607 BE_TIMER_POP(ra_timer.t_epilog);
609 BE_TIMER_POP(ra_timer.t_other);
611 be_stat_ev("insns_after", count_insns(irg));
616 static be_ra_t be_ra_chordal_allocator = {
620 void be_init_chordal(void)
622 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
623 lc_opt_entry_t *ra_grp = lc_opt_get_grp(be_grp, "ra");
624 lc_opt_entry_t *chordal_grp = lc_opt_get_grp(ra_grp, "chordal");
626 lc_opt_add_table(chordal_grp, be_chordal_options);
628 be_register_allocator("chordal", &be_ra_chordal_allocator);
631 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal);