2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Driver for the chordal register allocator.
23 * @author Sebastian Hack
39 #include "firm_config.h"
41 #include <libcore/lc_opts.h>
42 #include <libcore/lc_opts_enum.h>
43 #include <libcore/lc_timing.h>
47 #include "irgraph_t.h"
48 #include "irprintf_t.h"
60 #include "iredges_t.h"
62 #include "bechordal_t.h"
64 #include "bejavacoal.h"
67 #include "besched_t.h"
71 #include "beifg_impl.h"
73 #include "bestatevent.h"
80 #include "bespillslots.h"
81 #include "bespilloptions.h"
85 #include "bespillremat.h"
88 #include "bejavacoal.h"
89 #include "becopystat.h"
90 #include "becopyopt.h"
91 #include "bessadestr.h"
95 static be_ra_chordal_opts_t options = {
97 BE_CH_LOWER_PERM_SWAP,
103 typedef struct _post_spill_env_t {
104 be_chordal_env_t cenv;
106 const arch_register_class_t *cls;
107 double pre_spill_cost;
110 static be_options_t *main_opts;
111 static be_ra_timer_t ra_timer = {
125 static const lc_opt_enum_int_items_t lower_perm_items[] = {
126 { "copy", BE_CH_LOWER_PERM_COPY },
127 { "swap", BE_CH_LOWER_PERM_SWAP },
131 static const lc_opt_enum_int_items_t lower_perm_stat_items[] = {
135 static const lc_opt_enum_int_items_t dump_items[] = {
136 { "none", BE_CH_DUMP_NONE },
137 { "spill", BE_CH_DUMP_SPILL },
138 { "live", BE_CH_DUMP_LIVE },
139 { "color", BE_CH_DUMP_COLOR },
140 { "copymin", BE_CH_DUMP_COPYMIN },
141 { "ssadestr", BE_CH_DUMP_SSADESTR },
142 { "tree", BE_CH_DUMP_TREE_INTV },
143 { "constr", BE_CH_DUMP_CONSTR },
144 { "lower", BE_CH_DUMP_LOWER },
145 { "spillslots", BE_CH_DUMP_SPILLSLOTS },
146 { "appel", BE_CH_DUMP_APPEL },
147 { "all", BE_CH_DUMP_ALL },
151 static const lc_opt_enum_int_items_t be_ch_vrfy_items[] = {
152 { "off", BE_CH_VRFY_OFF },
153 { "warn", BE_CH_VRFY_WARN },
154 { "assert", BE_CH_VRFY_ASSERT },
158 static lc_opt_enum_int_var_t lower_perm_var = {
159 &options.lower_perm_opt, lower_perm_items
162 static lc_opt_enum_int_var_t dump_var = {
163 &options.dump_flags, dump_items
166 static lc_opt_enum_int_var_t be_ch_vrfy_var = {
167 &options.vrfy_option, be_ch_vrfy_items
170 static const lc_opt_table_entry_t be_chordal_options[] = {
171 LC_OPT_ENT_ENUM_PTR ("perm", "perm lowering options", &lower_perm_var),
172 LC_OPT_ENT_ENUM_MASK("dump", "select dump phases", &dump_var),
173 LC_OPT_ENT_ENUM_PTR ("vrfy", "verify options", &be_ch_vrfy_var),
177 static void dump(unsigned mask, ir_graph *irg,
178 const arch_register_class_t *cls,
180 void (*dump_func)(ir_graph *, const char *))
182 if((options.dump_flags & mask) == mask) {
185 snprintf(buf, sizeof(buf), "-%s%s", cls->name, suffix);
186 be_dump(irg, buf, dump_func);
189 be_dump(irg, suffix, dump_func);
194 * Checks for every reload if it's user can perform the load on itself.
196 static void memory_operand_walker(ir_node *irn, void *env) {
197 be_chordal_env_t *cenv = env;
198 const arch_env_t *aenv = cenv->birg->main_env->arch_env;
199 const ir_edge_t *edge, *ne;
203 if (! be_is_Reload(irn))
206 /* only use memory operands, if the reload is only used by 1 node */
207 if(get_irn_n_edges(irn) > 1)
210 spill = be_get_Reload_mem(irn);
211 block = get_nodes_block(irn);
213 foreach_out_edge_safe(irn, edge, ne) {
214 ir_node *src = get_edge_src_irn(edge);
215 int pos = get_edge_src_pos(edge);
217 assert(src && "outedges broken!");
219 if (get_nodes_block(src) == block && arch_possible_memory_operand(aenv, src, pos)) {
220 arch_perform_memory_operand(aenv, src, spill, pos);
224 /* kill the Reload */
225 if (get_irn_n_edges(irn) == 0) {
227 set_irn_n(irn, be_pos_Reload_mem, new_Bad());
228 set_irn_n(irn, be_pos_Reload_frame, new_Bad());
233 * Starts a walk for memory operands if supported by the backend.
235 static INLINE void check_for_memory_operands(be_chordal_env_t *chordal_env) {
236 irg_walk_graph(chordal_env->irg, NULL, memory_operand_walker, chordal_env);
240 * Sorry for doing stats again...
242 typedef struct _node_stat_t {
243 unsigned int n_phis; /**< Phis of the current register class. */
244 unsigned int n_mem_phis; /**< Memory Phis (Phis with spill operands). */
245 unsigned int n_copies; /**< Copies */
246 unsigned int n_perms; /**< Perms */
247 unsigned int n_spills; /**< Spill nodes */
248 unsigned int n_reloads; /**< Reloads */
251 struct node_stat_walker {
253 const arch_env_t *arch_env;
255 const arch_register_class_t *cls;
258 static void node_stat_walker(ir_node *irn, void *data)
260 struct node_stat_walker *env = data;
261 const arch_env_t *aenv = env->arch_env;
263 if (arch_irn_consider_in_reg_alloc(aenv, env->cls, irn)) {
265 /* if the node is a normal phi */
269 else if(arch_irn_classify(aenv, irn) & arch_irn_class_spill)
270 ++env->stat->n_spills;
272 else if(arch_irn_classify(aenv, irn) & arch_irn_class_reload)
273 ++env->stat->n_reloads;
275 else if(arch_irn_classify(aenv, irn) & arch_irn_class_copy)
276 ++env->stat->n_copies;
278 else if(arch_irn_classify(aenv, irn) & arch_irn_class_perm)
279 ++env->stat->n_perms;
282 /* a mem phi is a PhiM with a mem phi operand or a Spill operand */
283 else if(is_Phi(irn) && get_irn_mode(irn) == mode_M) {
286 for(i = get_irn_arity(irn) - 1; i >= 0; --i) {
287 ir_node *op = get_irn_n(irn, i);
289 if((is_Phi(op) && bitset_contains_irn(env->mem_phis, op)) || (arch_irn_classify(aenv, op) & arch_irn_class_spill)) {
290 bitset_add_irn(env->mem_phis, irn);
291 env->stat->n_mem_phis++;
298 static void node_stats(be_irg_t *birg, const arch_register_class_t *cls, node_stat_t *stat)
300 struct node_stat_walker env;
302 memset(stat, 0, sizeof(stat[0]));
303 env.arch_env = birg->main_env->arch_env;
304 env.mem_phis = bitset_irg_malloc(birg->irg);
307 irg_walk_graph(birg->irg, NULL, node_stat_walker, &env);
308 bitset_free(env.mem_phis);
311 static void insn_count_walker(ir_node *irn, void *data)
315 switch(get_irn_opcode(irn)) {
326 static unsigned int count_insns(ir_graph *irg)
329 irg_walk_graph(irg, insn_count_walker, NULL, &cnt);
334 * Initialize all timers.
336 static void be_init_timer(be_options_t *main_opts)
338 if (main_opts->timing == BE_TIME_ON) {
339 ra_timer.t_prolog = lc_timer_register("time_ra_prolog", "regalloc prolog");
340 ra_timer.t_epilog = lc_timer_register("time_ra_epilog", "regalloc epilog");
341 ra_timer.t_live = lc_timer_register("time_ra_liveness", "be liveness");
342 ra_timer.t_spill = lc_timer_register("time_ra_spill", "spiller");
343 ra_timer.t_color = lc_timer_register("time_ra_color", "graph coloring");
344 ra_timer.t_ifg = lc_timer_register("time_ra_ifg", "interference graph");
345 ra_timer.t_copymin = lc_timer_register("time_ra_copymin", "copy minimization");
346 ra_timer.t_ssa = lc_timer_register("time_ra_ssadestr", "ssa destruction");
347 ra_timer.t_verify = lc_timer_register("time_ra_verify", "graph verification");
348 ra_timer.t_other = lc_timer_register("time_ra_other", "other time");
350 LC_STOP_AND_RESET_TIMER(ra_timer.t_prolog);
351 LC_STOP_AND_RESET_TIMER(ra_timer.t_epilog);
352 LC_STOP_AND_RESET_TIMER(ra_timer.t_live);
353 LC_STOP_AND_RESET_TIMER(ra_timer.t_spill);
354 LC_STOP_AND_RESET_TIMER(ra_timer.t_color);
355 LC_STOP_AND_RESET_TIMER(ra_timer.t_ifg);
356 LC_STOP_AND_RESET_TIMER(ra_timer.t_copymin);
357 LC_STOP_AND_RESET_TIMER(ra_timer.t_ssa);
358 LC_STOP_AND_RESET_TIMER(ra_timer.t_verify);
359 LC_STOP_AND_RESET_TIMER(ra_timer.t_other);
361 global_ra_timer = &ra_timer;
365 #define BE_TIMER_INIT(main_opts) be_init_timer(main_opts)
367 #define BE_TIMER_PUSH(timer) \
368 if (main_opts->timing == BE_TIME_ON) { \
369 if (! lc_timer_push(timer)) { \
370 if (options.vrfy_option == BE_CH_VRFY_ASSERT) \
371 assert(!"Timer already on stack, cannot be pushed twice."); \
372 else if (options.vrfy_option == BE_CH_VRFY_WARN) \
373 fprintf(stderr, "Timer %s already on stack, cannot be pushed twice.\n", \
374 lc_timer_get_name(timer)); \
377 #define BE_TIMER_POP(timer) \
378 if (main_opts->timing == BE_TIME_ON) { \
379 lc_timer_t *tmp = lc_timer_pop(); \
380 if (options.vrfy_option == BE_CH_VRFY_ASSERT) \
381 assert(tmp == timer && "Attempt to pop wrong timer."); \
382 else if (options.vrfy_option == BE_CH_VRFY_WARN && tmp != timer) \
383 fprintf(stderr, "Attempt to pop wrong timer. %s is on stack, trying to pop %s.\n", \
384 lc_timer_get_name(tmp), lc_timer_get_name(timer)); \
389 * Perform things which need to be done per register class before spilling.
391 static void pre_spill(post_spill_env_t *pse, const arch_register_class_t *cls)
393 be_chordal_env_t *chordal_env = &pse->cenv;
394 be_irg_t *birg = pse->birg;
395 ir_graph *irg = be_get_birg_irg(birg);
396 const be_main_env_t *main_env = birg->main_env;
397 node_stat_t node_stat;
400 chordal_env->cls = cls;
401 chordal_env->border_heads = pmap_create();
402 chordal_env->ignore_colors = bitset_malloc(chordal_env->cls->n_regs);
404 BE_TIMER_PUSH(ra_timer.t_live);
405 be_assure_liveness(birg);
406 BE_TIMER_POP(ra_timer.t_live);
408 BE_TIMER_PUSH(ra_timer.t_verify);
409 be_liveness_assure_chk(be_get_birg_liveness(birg));
410 BE_TIMER_POP(ra_timer.t_verify);
412 stat_ev_ctx_push_str("bechordal_cls", pse->cls->name);
413 stat_ev_do(node_stats(birg, pse->cls, &node_stat));
414 stat_ev_do(pse->pre_spill_cost = be_estimate_irg_costs(irg, main_env->arch_env, birg->exec_freq));
415 stat_ev_dbl("phis_before_spill", node_stat.n_phis);
417 /* put all ignore registers into the ignore register set. */
418 be_put_ignore_regs(birg, pse->cls, chordal_env->ignore_colors);
420 be_pre_spill_prepare_constr(chordal_env);
421 dump(BE_CH_DUMP_CONSTR, birg->irg, pse->cls, "-constr-pre", dump_ir_block_graph_sched);
423 stat_ev_ctx_pop("bechordal_cls");
427 * Perform things which need to be done per register class after spilling.
429 static void post_spill(post_spill_env_t *pse, int iteration) {
430 be_chordal_env_t *chordal_env = &pse->cenv;
431 be_irg_t *birg = pse->birg;
432 ir_graph *irg = birg->irg;
433 const be_main_env_t *main_env = birg->main_env;
434 node_stat_t node_stat;
435 int colors_n = arch_register_class_n_regs(chordal_env->cls);
436 int allocatable_regs = colors_n - be_put_ignore_regs(birg, chordal_env->cls, NULL);
438 main_opts = main_env->options;
440 /* some special classes contain only ignore regs, no work to be done */
441 if (allocatable_regs > 0) {
443 stat_ev_ctx_push_str("bechordal_cls", pse->cls->name);
444 stat_ev_do(node_stats(birg, pse->cls, &node_stat));
445 stat_ev_dbl("phis_after_spill", node_stat.n_phis);
446 stat_ev_dbl("mem_phis", node_stat.n_mem_phis);
447 stat_ev_dbl("reloads", node_stat.n_reloads);
448 stat_ev_dbl("spills", node_stat.n_spills);
449 stat_ev_dbl("spillcosts", be_estimate_irg_costs(irg, main_env->arch_env, birg->exec_freq) - pse->pre_spill_cost);
452 If we have a backend provided spiller, post spill is
453 called in a loop after spilling for each register class.
454 But we only need to fix stack nodes once in this case.
456 if (iteration == 0) {
457 check_for_memory_operands(chordal_env);
458 be_abi_fix_stack_nodes(birg->abi);
461 BE_TIMER_PUSH(ra_timer.t_verify);
463 /* verify schedule and register pressure */
464 if (chordal_env->opts->vrfy_option == BE_CH_VRFY_WARN) {
465 be_verify_schedule(birg);
466 be_verify_register_pressure(birg, pse->cls, irg);
468 else if (chordal_env->opts->vrfy_option == BE_CH_VRFY_ASSERT) {
469 assert(be_verify_schedule(birg) && "Schedule verification failed");
470 assert(be_verify_register_pressure(birg, pse->cls, irg)
471 && "Register pressure verification failed");
473 BE_TIMER_POP(ra_timer.t_verify);
475 /* Color the graph. */
476 BE_TIMER_PUSH(ra_timer.t_color);
477 be_ra_chordal_color(chordal_env);
478 BE_TIMER_POP(ra_timer.t_color);
480 dump(BE_CH_DUMP_CONSTR, irg, pse->cls, "-color", dump_ir_block_graph_sched);
482 /* Create the ifg with the selected flavor */
483 BE_TIMER_PUSH(ra_timer.t_ifg);
484 chordal_env->ifg = be_create_ifg(chordal_env);
485 BE_TIMER_POP(ra_timer.t_ifg);
490 stat_ev_do(be_ifg_stat(birg, chordal_env->ifg, &stat));
491 stat_ev_dbl("ifg_nodes", stat.n_nodes);
492 stat_ev_dbl("ifg_edges", stat.n_edges);
493 stat_ev_dbl("ifg_comps", stat.n_comps);
495 stat_ev_do(node_stats(birg, pse->cls, &node_stat));
496 stat_ev_dbl("perms_before_coal", node_stat.n_perms);
497 stat_ev_dbl("copies_before_coal", node_stat.n_copies);
500 /* copy minimization */
501 BE_TIMER_PUSH(ra_timer.t_copymin);
502 co_driver(chordal_env);
503 BE_TIMER_POP(ra_timer.t_copymin);
505 dump(BE_CH_DUMP_COPYMIN, irg, pse->cls, "-copymin", dump_ir_block_graph_sched);
507 BE_TIMER_PUSH(ra_timer.t_ssa);
509 /* ssa destruction */
510 stat_ev_ctx_push_str("berachordal_phase", "ssadestr");
511 be_ssa_destruction(chordal_env);
512 stat_ev_ctx_pop("berachordal_phase");
514 BE_TIMER_POP(ra_timer.t_ssa);
516 dump(BE_CH_DUMP_SSADESTR, irg, pse->cls, "-ssadestr", dump_ir_block_graph_sched);
518 BE_TIMER_PUSH(ra_timer.t_verify);
519 if (chordal_env->opts->vrfy_option != BE_CH_VRFY_OFF) {
520 be_ssa_destruction_check(chordal_env);
522 BE_TIMER_POP(ra_timer.t_verify);
524 stat_ev_do(node_stats(birg, pse->cls, &node_stat));
525 stat_ev_dbl("perms_after_coal", node_stat.n_perms);
526 stat_ev_dbl("copies_after_coal", node_stat.n_copies);
527 stat_ev_ctx_pop("bechordal_cls");
529 /* the ifg exists only if there are allocatable regs */
530 be_ifg_free(chordal_env->ifg);
533 /* free some always allocated data structures */
534 pmap_destroy(chordal_env->border_heads);
535 bitset_free(chordal_env->ignore_colors);
539 * Performs chordal register allocation for each register class on given irg.
541 * @param birg Backend irg object
542 * @return Structure containing timer for the single phases or NULL if no timing requested.
544 static void be_ra_chordal_main(be_irg_t *birg)
546 const be_main_env_t *main_env = birg->main_env;
547 const arch_isa_t *isa = arch_env_get_isa(main_env->arch_env);
548 ir_graph *irg = birg->irg;
549 be_options_t *main_opts = main_env->options;
551 be_chordal_env_t chordal_env;
554 BE_TIMER_INIT(main_opts);
555 BE_TIMER_PUSH(ra_timer.t_other);
556 BE_TIMER_PUSH(ra_timer.t_prolog);
558 be_assure_dom_front(birg);
559 be_assure_liveness(birg);
561 chordal_env.obst = &obst;
562 chordal_env.opts = &options;
563 chordal_env.irg = irg;
564 chordal_env.birg = birg;
565 chordal_env.border_heads = NULL;
566 chordal_env.ifg = NULL;
567 chordal_env.ignore_colors = NULL;
571 BE_TIMER_POP(ra_timer.t_prolog);
573 be_stat_ev("insns_before", count_insns(irg));
577 if (! arch_code_generator_has_spiller(birg->cg)) {
578 /* use one of the generic spiller */
580 /* Perform the following for each register class. */
581 for (j = 0, m = arch_isa_get_n_reg_class(isa); j < m; ++j) {
582 post_spill_env_t pse;
583 const arch_register_class_t *cls
584 = arch_isa_get_reg_class(isa, j);
586 if(arch_register_class_flags(cls) & arch_register_class_flag_manual_ra)
590 memcpy(&pse.cenv, &chordal_env, sizeof(chordal_env));
592 pre_spill(&pse, cls);
595 /* this is a hack, TODO remove me later */
597 be_do_stat_reg_pressure(birg);
601 BE_TIMER_PUSH(ra_timer.t_spill);
602 be_do_spill(birg, cls);
603 BE_TIMER_POP(ra_timer.t_spill);
605 dump(BE_CH_DUMP_SPILL, irg, pse.cls, "-spill",
606 dump_ir_block_graph_sched);
611 post_spill_env_t *pse;
613 /* the backend has it's own spiller */
614 m = arch_isa_get_n_reg_class(isa);
616 pse = alloca(m * sizeof(pse[0]));
618 for (j = 0; j < m; ++j) {
619 memcpy(&pse[j].cenv, &chordal_env, sizeof(chordal_env));
621 pre_spill(&pse[j], pse[j].cls);
624 BE_TIMER_PUSH(ra_timer.t_spill);
625 arch_code_generator_spill(birg->cg, birg);
626 BE_TIMER_POP(ra_timer.t_spill);
627 dump(BE_CH_DUMP_SPILL, irg, NULL, "-spill", dump_ir_block_graph_sched);
629 for (j = 0; j < m; ++j) {
630 post_spill(&pse[j], j);
635 be_verify_register_allocation(birg);
637 BE_TIMER_PUSH(ra_timer.t_epilog);
638 lower_nodes_after_ra(birg, options.lower_perm_opt & BE_CH_LOWER_PERM_COPY ? 1 : 0);
639 dump(BE_CH_DUMP_LOWER, irg, NULL, "-belower-after-ra", dump_ir_block_graph_sched);
641 obstack_free(&obst, NULL);
642 be_liveness_invalidate(be_get_birg_liveness(birg));
643 BE_TIMER_POP(ra_timer.t_epilog);
645 BE_TIMER_POP(ra_timer.t_other);
647 be_stat_ev("insns_after", count_insns(irg));
652 static be_ra_t be_ra_chordal_allocator = {
656 void be_init_chordal_main(void)
658 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
659 lc_opt_entry_t *ra_grp = lc_opt_get_grp(be_grp, "ra");
660 lc_opt_entry_t *chordal_grp = lc_opt_get_grp(ra_grp, "chordal");
662 lc_opt_add_table(chordal_grp, be_chordal_options);
664 be_register_allocator("chordal", &be_ra_chordal_allocator);
667 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal_main);