2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Driver for the chordal register allocator.
23 * @author Sebastian Hack
39 #include "lc_opts_enum.h"
43 #include "irgraph_t.h"
44 #include "irprintf_t.h"
55 #include "iredges_t.h"
58 #include "bechordal_t.h"
67 #include "bestatevent.h"
75 #include "bespillslots.h"
79 #include "becopystat.h"
80 #include "becopyopt.h"
81 #include "bessadestr.h"
85 #include "bepbqpcoloring.h"
87 static be_ra_chordal_opts_t options = {
89 BE_CH_LOWER_PERM_SWAP,
95 typedef struct post_spill_env_t {
96 be_chordal_env_t cenv;
98 const arch_register_class_t *cls;
99 double pre_spill_cost;
102 static const lc_opt_enum_int_items_t lower_perm_items[] = {
103 { "copy", BE_CH_LOWER_PERM_COPY },
104 { "swap", BE_CH_LOWER_PERM_SWAP },
108 static const lc_opt_enum_int_items_t lower_perm_stat_items[] = {
112 static const lc_opt_enum_int_items_t dump_items[] = {
113 { "none", BE_CH_DUMP_NONE },
114 { "spill", BE_CH_DUMP_SPILL },
115 { "live", BE_CH_DUMP_LIVE },
116 { "color", BE_CH_DUMP_COLOR },
117 { "copymin", BE_CH_DUMP_COPYMIN },
118 { "ssadestr", BE_CH_DUMP_SSADESTR },
119 { "tree", BE_CH_DUMP_TREE_INTV },
120 { "constr", BE_CH_DUMP_CONSTR },
121 { "lower", BE_CH_DUMP_LOWER },
122 { "spillslots", BE_CH_DUMP_SPILLSLOTS },
123 { "appel", BE_CH_DUMP_APPEL },
124 { "all", BE_CH_DUMP_ALL },
128 static const lc_opt_enum_int_items_t be_ch_vrfy_items[] = {
129 { "off", BE_CH_VRFY_OFF },
130 { "warn", BE_CH_VRFY_WARN },
131 { "assert", BE_CH_VRFY_ASSERT },
135 static lc_opt_enum_int_var_t lower_perm_var = {
136 &options.lower_perm_opt, lower_perm_items
139 static lc_opt_enum_int_var_t dump_var = {
140 &options.dump_flags, dump_items
143 static lc_opt_enum_int_var_t be_ch_vrfy_var = {
144 &options.vrfy_option, be_ch_vrfy_items
147 static const lc_opt_table_entry_t be_chordal_options[] = {
148 LC_OPT_ENT_ENUM_PTR ("perm", "perm lowering options", &lower_perm_var),
149 LC_OPT_ENT_ENUM_MASK("dump", "select dump phases", &dump_var),
150 LC_OPT_ENT_ENUM_PTR ("verify", "verify options", &be_ch_vrfy_var),
154 static be_module_list_entry_t *colorings = NULL;
155 static const be_ra_chordal_coloring_t *selected_coloring = NULL;
157 void be_register_chordal_coloring(const char *name, be_ra_chordal_coloring_t *coloring)
159 if (selected_coloring == NULL)
160 selected_coloring = coloring;
162 be_add_module_to_list(&colorings, name, coloring);
165 static void be_ra_chordal_coloring(be_chordal_env_t *env)
167 selected_coloring->allocate(env);
170 static void dump(unsigned mask, ir_graph *irg,
171 const arch_register_class_t *cls,
174 if ((options.dump_flags & mask) == mask) {
177 snprintf(buf, sizeof(buf), "%s-%s", cls->name, suffix);
178 dump_ir_graph(irg, buf);
180 dump_ir_graph(irg, suffix);
186 * Checks for every reload if its user can perform the load on itself.
188 static void memory_operand_walker(ir_node *irn, void *env)
190 const ir_edge_t *edge, *ne;
196 if (! be_is_Reload(irn))
199 /* only use memory operands, if the reload is only used by 1 node */
200 if (get_irn_n_edges(irn) > 1)
203 spill = be_get_Reload_mem(irn);
204 block = get_nodes_block(irn);
206 foreach_out_edge_safe(irn, edge, ne) {
207 ir_node *src = get_edge_src_irn(edge);
208 int pos = get_edge_src_pos(edge);
210 assert(src && "outedges broken!");
212 if (get_nodes_block(src) == block && arch_possible_memory_operand(src, pos)) {
213 arch_perform_memory_operand(src, spill, pos);
217 /* kill the Reload */
218 if (get_irn_n_edges(irn) == 0) {
219 ir_graph *irg = get_irn_irg(irn);
221 set_irn_n(irn, n_be_Reload_mem, new_r_Bad(irg));
222 set_irn_n(irn, n_be_Reload_frame, new_r_Bad(irg));
227 * Starts a walk for memory operands if supported by the backend.
229 void check_for_memory_operands(ir_graph *irg)
231 irg_walk_graph(irg, NULL, memory_operand_walker, NULL);
235 static be_node_stats_t last_node_stats;
238 * Perform things which need to be done per register class before spilling.
240 static void pre_spill(post_spill_env_t *pse, const arch_register_class_t *cls)
242 be_chordal_env_t *chordal_env = &pse->cenv;
243 ir_graph *irg = pse->irg;
244 ir_exec_freq *exec_freq = be_get_irg_exec_freq(irg);
247 chordal_env->cls = cls;
248 chordal_env->border_heads = pmap_create();
249 chordal_env->allocatable_regs = bitset_malloc(chordal_env->cls->n_regs);
251 be_assure_liveness(irg);
252 be_liveness_assure_chk(be_get_irg_liveness(irg));
254 stat_ev_do(pse->pre_spill_cost = be_estimate_irg_costs(irg, exec_freq));
256 /* put all ignore registers into the ignore register set. */
257 be_put_allocatable_regs(irg, pse->cls, chordal_env->allocatable_regs);
259 be_timer_push(T_RA_CONSTR);
260 be_pre_spill_prepare_constr(irg, chordal_env->cls);
261 be_timer_pop(T_RA_CONSTR);
263 dump(BE_CH_DUMP_CONSTR, irg, pse->cls, "constr-pre");
267 * Perform things which need to be done per register class after spilling.
269 static void post_spill(post_spill_env_t *pse, int iteration)
271 be_chordal_env_t *chordal_env = &pse->cenv;
272 ir_graph *irg = pse->irg;
273 ir_exec_freq *exec_freq = be_get_irg_exec_freq(irg);
274 int allocatable_regs = be_get_n_allocatable_regs(irg, chordal_env->cls);
276 /* some special classes contain only ignore regs, no work to be done */
277 if (allocatable_regs > 0) {
278 stat_ev_dbl("bechordal_spillcosts", be_estimate_irg_costs(irg, exec_freq) - pse->pre_spill_cost);
281 If we have a backend provided spiller, post spill is
282 called in a loop after spilling for each register class.
283 But we only need to fix stack nodes once in this case.
285 be_timer_push(T_RA_SPILL_APPLY);
286 check_for_memory_operands(irg);
287 if (iteration == 0) {
288 be_abi_fix_stack_nodes(irg);
290 be_timer_pop(T_RA_SPILL_APPLY);
293 /* verify schedule and register pressure */
294 be_timer_push(T_VERIFY);
295 if (chordal_env->opts->vrfy_option == BE_CH_VRFY_WARN) {
296 be_verify_schedule(irg);
297 be_verify_register_pressure(irg, pse->cls);
298 } else if (chordal_env->opts->vrfy_option == BE_CH_VRFY_ASSERT) {
299 assert(be_verify_schedule(irg) && "Schedule verification failed");
300 assert(be_verify_register_pressure(irg, pse->cls)
301 && "Register pressure verification failed");
303 be_timer_pop(T_VERIFY);
305 /* Color the graph. */
306 be_timer_push(T_RA_COLOR);
307 be_ra_chordal_coloring(chordal_env);
308 be_timer_pop(T_RA_COLOR);
310 dump(BE_CH_DUMP_CONSTR, irg, pse->cls, "color");
312 /* Create the ifg with the selected flavor */
313 be_timer_push(T_RA_IFG);
314 chordal_env->ifg = be_create_ifg(chordal_env);
315 be_timer_pop(T_RA_IFG);
319 be_node_stats_t node_stats;
321 be_ifg_stat(irg, chordal_env->ifg, &stat);
322 stat_ev_dbl("bechordal_ifg_nodes", stat.n_nodes);
323 stat_ev_dbl("bechordal_ifg_edges", stat.n_edges);
324 stat_ev_dbl("bechordal_ifg_comps", stat.n_comps);
326 be_collect_node_stats(&node_stats, irg);
327 be_subtract_node_stats(&node_stats, &last_node_stats);
329 stat_ev_dbl("bechordal_perms_before_coal",
330 node_stats[BE_STAT_PERMS]);
331 stat_ev_dbl("bechordal_copies_before_coal",
332 node_stats[BE_STAT_COPIES]);
335 be_timer_push(T_RA_COPYMIN);
336 co_driver(chordal_env);
337 be_timer_pop(T_RA_COPYMIN);
339 dump(BE_CH_DUMP_COPYMIN, irg, pse->cls, "copymin");
341 /* ssa destruction */
342 be_timer_push(T_RA_SSA);
343 be_ssa_destruction(chordal_env);
344 be_timer_pop(T_RA_SSA);
346 dump(BE_CH_DUMP_SSADESTR, irg, pse->cls, "ssadestr");
348 if (chordal_env->opts->vrfy_option != BE_CH_VRFY_OFF) {
349 be_timer_push(T_VERIFY);
350 be_ssa_destruction_check(chordal_env);
351 be_timer_pop(T_VERIFY);
354 /* the ifg exists only if there are allocatable regs */
355 be_ifg_free(chordal_env->ifg);
358 /* free some always allocated data structures */
359 pmap_destroy(chordal_env->border_heads);
360 bitset_free(chordal_env->allocatable_regs);
364 * Performs chordal register allocation for each register class on given irg.
366 * @param irg the graph
367 * @return Structure containing timer for the single phases or NULL if no
370 static void be_ra_chordal_main(ir_graph *irg)
372 const arch_env_t *arch_env = be_get_irg_arch_env(irg);
375 be_chordal_env_t chordal_env;
378 be_timer_push(T_RA_OTHER);
380 be_timer_push(T_RA_PROLOG);
382 be_assure_liveness(irg);
384 chordal_env.obst = &obst;
385 chordal_env.opts = &options;
386 chordal_env.irg = irg;
387 chordal_env.border_heads = NULL;
388 chordal_env.ifg = NULL;
389 chordal_env.allocatable_regs = NULL;
393 be_timer_pop(T_RA_PROLOG);
396 be_collect_node_stats(&last_node_stats, irg);
399 /* use one of the generic spiller */
401 /* Perform the following for each register class. */
402 for (j = 0, m = arch_env->n_register_classes; j < m; ++j) {
403 post_spill_env_t pse;
404 const arch_register_class_t *cls = &arch_env->register_classes[j];
406 if (arch_register_class_flags(cls) & arch_register_class_flag_manual_ra)
410 stat_ev_ctx_push_str("bechordal_cls", cls->name);
413 be_do_stat_reg_pressure(irg, cls);
416 memcpy(&pse.cenv, &chordal_env, sizeof(chordal_env));
418 pre_spill(&pse, cls);
420 be_timer_push(T_RA_SPILL);
421 be_do_spill(irg, cls);
422 be_timer_pop(T_RA_SPILL);
424 dump(BE_CH_DUMP_SPILL, irg, pse.cls, "spill");
429 be_node_stats_t node_stats;
431 be_collect_node_stats(&node_stats, irg);
432 be_subtract_node_stats(&node_stats, &last_node_stats);
433 be_emit_node_stats(&node_stats, "bechordal_");
435 be_copy_node_stats(&last_node_stats, &node_stats);
436 stat_ev_ctx_pop("bechordal_cls");
440 be_timer_push(T_VERIFY);
441 if (chordal_env.opts->vrfy_option == BE_CH_VRFY_WARN) {
442 be_verify_register_allocation(irg);
443 } else if (chordal_env.opts->vrfy_option == BE_CH_VRFY_ASSERT) {
444 assert(be_verify_register_allocation(irg)
445 && "Register allocation invalid");
447 be_timer_pop(T_VERIFY);
449 be_timer_push(T_RA_EPILOG);
450 lower_nodes_after_ra(irg,
451 options.lower_perm_opt&BE_CH_LOWER_PERM_COPY ? 1 : 0);
452 dump(BE_CH_DUMP_LOWER, irg, NULL, "belower-after-ra");
454 obstack_free(&obst, NULL);
455 be_liveness_invalidate(be_get_irg_liveness(irg));
456 be_timer_pop(T_RA_EPILOG);
458 be_timer_pop(T_RA_OTHER);
461 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal_main)
462 void be_init_chordal_main(void)
464 static be_ra_t be_ra_chordal_allocator = {
468 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
469 lc_opt_entry_t *ra_grp = lc_opt_get_grp(be_grp, "ra");
470 lc_opt_entry_t *chordal_grp = lc_opt_get_grp(ra_grp, "chordal");
472 be_register_allocator("chordal", &be_ra_chordal_allocator);
474 lc_opt_add_table(chordal_grp, be_chordal_options);
475 be_add_module_list_opt(chordal_grp, "coloring", "select coloring methode", &colorings, (void**) &selected_coloring);