2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Driver for the chordal register allocator.
23 * @author Sebastian Hack
38 #include "lc_opts_enum.h"
42 #include "irgraph_t.h"
43 #include "irprintf_t.h"
54 #include "iredges_t.h"
57 #include "bechordal_t.h"
66 #include "bestatevent.h"
74 #include "bespillslots.h"
78 #include "becopystat.h"
79 #include "becopyopt.h"
80 #include "bessadestr.h"
84 #include "bepbqpcoloring.h"
86 static be_ra_chordal_opts_t options = {
88 BE_CH_LOWER_PERM_SWAP,
94 typedef struct post_spill_env_t {
95 be_chordal_env_t cenv;
97 const arch_register_class_t *cls;
98 double pre_spill_cost;
101 static const lc_opt_enum_int_items_t lower_perm_items[] = {
102 { "copy", BE_CH_LOWER_PERM_COPY },
103 { "swap", BE_CH_LOWER_PERM_SWAP },
107 static const lc_opt_enum_mask_items_t dump_items[] = {
108 { "none", BE_CH_DUMP_NONE },
109 { "spill", BE_CH_DUMP_SPILL },
110 { "live", BE_CH_DUMP_LIVE },
111 { "color", BE_CH_DUMP_COLOR },
112 { "copymin", BE_CH_DUMP_COPYMIN },
113 { "ssadestr", BE_CH_DUMP_SSADESTR },
114 { "tree", BE_CH_DUMP_TREE_INTV },
115 { "constr", BE_CH_DUMP_CONSTR },
116 { "lower", BE_CH_DUMP_LOWER },
117 { "spillslots", BE_CH_DUMP_SPILLSLOTS },
118 { "appel", BE_CH_DUMP_APPEL },
119 { "all", BE_CH_DUMP_ALL },
123 static const lc_opt_enum_int_items_t be_ch_vrfy_items[] = {
124 { "off", BE_CH_VRFY_OFF },
125 { "warn", BE_CH_VRFY_WARN },
126 { "assert", BE_CH_VRFY_ASSERT },
130 static lc_opt_enum_int_var_t lower_perm_var = {
131 &options.lower_perm_opt, lower_perm_items
134 static lc_opt_enum_mask_var_t dump_var = {
135 &options.dump_flags, dump_items
138 static lc_opt_enum_int_var_t be_ch_vrfy_var = {
139 &options.vrfy_option, be_ch_vrfy_items
142 static const lc_opt_table_entry_t be_chordal_options[] = {
143 LC_OPT_ENT_ENUM_INT ("perm", "perm lowering options", &lower_perm_var),
144 LC_OPT_ENT_ENUM_MASK("dump", "select dump phases", &dump_var),
145 LC_OPT_ENT_ENUM_INT ("verify", "verify options", &be_ch_vrfy_var),
149 static be_module_list_entry_t *colorings = NULL;
150 static const be_ra_chordal_coloring_t *selected_coloring = NULL;
152 void be_register_chordal_coloring(const char *name, be_ra_chordal_coloring_t *coloring)
154 if (selected_coloring == NULL)
155 selected_coloring = coloring;
157 be_add_module_to_list(&colorings, name, coloring);
160 static void be_ra_chordal_coloring(be_chordal_env_t *env)
162 selected_coloring->allocate(env);
165 static void dump(unsigned mask, ir_graph *irg,
166 const arch_register_class_t *cls,
169 if ((options.dump_flags & mask) == mask) {
172 snprintf(buf, sizeof(buf), "%s-%s", cls->name, suffix);
173 dump_ir_graph(irg, buf);
175 dump_ir_graph(irg, suffix);
181 * Post-Walker: Checks for the given reload if has only one user that can perform the
182 * reload as part of its address mode.
183 * Fold the reload into the user it that is possible.
185 static void memory_operand_walker(ir_node *irn, void *env)
187 const ir_edge_t *edge, *ne;
193 if (! be_is_Reload(irn))
196 /* only use memory operands, if the reload is only used by 1 node */
197 if (get_irn_n_edges(irn) > 1)
200 spill = be_get_Reload_mem(irn);
201 block = get_nodes_block(irn);
203 foreach_out_edge_safe(irn, edge, ne) {
204 ir_node *src = get_edge_src_irn(edge);
205 int pos = get_edge_src_pos(edge);
207 assert(src && "outedges broken!");
209 if (get_nodes_block(src) == block && arch_possible_memory_operand(src, pos)) {
210 arch_perform_memory_operand(src, spill, pos);
214 /* kill the Reload if it was folded */
215 if (get_irn_n_edges(irn) == 0) {
216 ir_graph *irg = get_irn_irg(irn);
217 ir_mode *frame_mode = get_irn_mode(get_irn_n(irn, n_be_Reload_frame));
219 set_irn_n(irn, n_be_Reload_mem, new_r_Bad(irg, mode_X));
220 set_irn_n(irn, n_be_Reload_frame, new_r_Bad(irg, frame_mode));
225 * Starts a walk for memory operands if supported by the backend.
227 void check_for_memory_operands(ir_graph *irg)
229 irg_walk_graph(irg, NULL, memory_operand_walker, NULL);
233 static be_node_stats_t last_node_stats;
236 * Perform things which need to be done per register class before spilling.
238 static void pre_spill(post_spill_env_t *pse, const arch_register_class_t *cls)
240 be_chordal_env_t *chordal_env = &pse->cenv;
241 ir_graph *irg = pse->irg;
242 ir_exec_freq *exec_freq = be_get_irg_exec_freq(irg);
245 chordal_env->cls = cls;
246 chordal_env->border_heads = pmap_create();
247 chordal_env->allocatable_regs = bitset_malloc(chordal_env->cls->n_regs);
249 be_assure_live_chk(irg);
251 if (stat_ev_enabled) {
252 pse->pre_spill_cost = be_estimate_irg_costs(irg, exec_freq);
255 /* put all ignore registers into the ignore register set. */
256 be_put_allocatable_regs(irg, pse->cls, chordal_env->allocatable_regs);
258 be_timer_push(T_RA_CONSTR);
259 be_pre_spill_prepare_constr(irg, chordal_env->cls);
260 be_timer_pop(T_RA_CONSTR);
262 dump(BE_CH_DUMP_CONSTR, irg, pse->cls, "constr-pre");
266 * Perform things which need to be done per register class after spilling.
268 static void post_spill(post_spill_env_t *pse, int iteration)
270 be_chordal_env_t *chordal_env = &pse->cenv;
271 ir_graph *irg = pse->irg;
272 ir_exec_freq *exec_freq = be_get_irg_exec_freq(irg);
273 int allocatable_regs = be_get_n_allocatable_regs(irg, chordal_env->cls);
275 /* some special classes contain only ignore regs, no work to be done */
276 if (allocatable_regs > 0) {
277 stat_ev_dbl("bechordal_spillcosts", be_estimate_irg_costs(irg, exec_freq) - pse->pre_spill_cost);
280 If we have a backend provided spiller, post spill is
281 called in a loop after spilling for each register class.
282 But we only need to fix stack nodes once in this case.
284 be_timer_push(T_RA_SPILL_APPLY);
285 check_for_memory_operands(irg);
286 if (iteration == 0) {
287 be_abi_fix_stack_nodes(irg);
289 be_timer_pop(T_RA_SPILL_APPLY);
292 /* verify schedule and register pressure */
293 be_timer_push(T_VERIFY);
294 if (chordal_env->opts->vrfy_option == BE_CH_VRFY_WARN) {
295 be_verify_schedule(irg);
296 be_verify_register_pressure(irg, pse->cls);
297 } else if (chordal_env->opts->vrfy_option == BE_CH_VRFY_ASSERT) {
298 assert(be_verify_schedule(irg) && "Schedule verification failed");
299 assert(be_verify_register_pressure(irg, pse->cls)
300 && "Register pressure verification failed");
302 be_timer_pop(T_VERIFY);
304 /* Color the graph. */
305 be_timer_push(T_RA_COLOR);
306 be_ra_chordal_coloring(chordal_env);
307 be_timer_pop(T_RA_COLOR);
309 dump(BE_CH_DUMP_CONSTR, irg, pse->cls, "color");
311 /* Create the ifg with the selected flavor */
312 be_timer_push(T_RA_IFG);
313 chordal_env->ifg = be_create_ifg(chordal_env);
314 be_timer_pop(T_RA_IFG);
316 if (stat_ev_enabled) {
318 be_node_stats_t node_stats;
320 be_ifg_stat(irg, chordal_env->ifg, &stat);
321 stat_ev_dbl("bechordal_ifg_nodes", stat.n_nodes);
322 stat_ev_dbl("bechordal_ifg_edges", stat.n_edges);
323 stat_ev_dbl("bechordal_ifg_comps", stat.n_comps);
325 be_collect_node_stats(&node_stats, irg);
326 be_subtract_node_stats(&node_stats, &last_node_stats);
328 stat_ev_dbl("bechordal_perms_before_coal",
329 node_stats[BE_STAT_PERMS]);
330 stat_ev_dbl("bechordal_copies_before_coal",
331 node_stats[BE_STAT_COPIES]);
334 be_timer_push(T_RA_COPYMIN);
335 co_driver(chordal_env);
336 be_timer_pop(T_RA_COPYMIN);
338 dump(BE_CH_DUMP_COPYMIN, irg, pse->cls, "copymin");
340 /* ssa destruction */
341 be_timer_push(T_RA_SSA);
342 be_ssa_destruction(chordal_env);
343 be_timer_pop(T_RA_SSA);
345 dump(BE_CH_DUMP_SSADESTR, irg, pse->cls, "ssadestr");
347 if (chordal_env->opts->vrfy_option != BE_CH_VRFY_OFF) {
348 be_timer_push(T_VERIFY);
349 be_ssa_destruction_check(chordal_env);
350 be_timer_pop(T_VERIFY);
353 /* the ifg exists only if there are allocatable regs */
354 be_ifg_free(chordal_env->ifg);
357 /* free some always allocated data structures */
358 pmap_destroy(chordal_env->border_heads);
359 bitset_free(chordal_env->allocatable_regs);
363 * Performs chordal register allocation for each register class on given irg.
365 * @param irg the graph
366 * @return Structure containing timer for the single phases or NULL if no
369 static void be_ra_chordal_main(ir_graph *irg)
371 const arch_env_t *arch_env = be_get_irg_arch_env(irg);
374 be_chordal_env_t chordal_env;
377 be_timer_push(T_RA_OTHER);
379 be_timer_push(T_RA_PROLOG);
381 chordal_env.obst = &obst;
382 chordal_env.opts = &options;
383 chordal_env.irg = irg;
384 chordal_env.border_heads = NULL;
385 chordal_env.ifg = NULL;
386 chordal_env.allocatable_regs = NULL;
390 be_timer_pop(T_RA_PROLOG);
392 if (stat_ev_enabled) {
393 be_collect_node_stats(&last_node_stats, irg);
396 /* use one of the generic spiller */
398 /* Perform the following for each register class. */
399 for (j = 0, m = arch_env->n_register_classes; j < m; ++j) {
400 post_spill_env_t pse;
401 const arch_register_class_t *cls = &arch_env->register_classes[j];
403 if (arch_register_class_flags(cls) & arch_register_class_flag_manual_ra)
407 stat_ev_ctx_push_str("bechordal_cls", cls->name);
409 if (stat_ev_enabled) {
410 be_do_stat_reg_pressure(irg, cls);
413 pse.cenv = chordal_env;
415 pre_spill(&pse, cls);
417 be_timer_push(T_RA_SPILL);
418 be_do_spill(irg, cls);
419 be_timer_pop(T_RA_SPILL);
421 dump(BE_CH_DUMP_SPILL, irg, pse.cls, "spill");
425 if (stat_ev_enabled) {
426 be_node_stats_t node_stats;
428 be_collect_node_stats(&node_stats, irg);
429 be_subtract_node_stats(&node_stats, &last_node_stats);
430 be_emit_node_stats(&node_stats, "bechordal_");
432 be_copy_node_stats(&last_node_stats, &node_stats);
433 stat_ev_ctx_pop("bechordal_cls");
437 be_timer_push(T_VERIFY);
438 if (chordal_env.opts->vrfy_option == BE_CH_VRFY_WARN) {
439 be_verify_register_allocation(irg);
440 } else if (chordal_env.opts->vrfy_option == BE_CH_VRFY_ASSERT) {
441 assert(be_verify_register_allocation(irg)
442 && "Register allocation invalid");
444 be_timer_pop(T_VERIFY);
446 be_timer_push(T_RA_EPILOG);
447 lower_nodes_after_ra(irg, options.lower_perm_opt == BE_CH_LOWER_PERM_COPY);
448 dump(BE_CH_DUMP_LOWER, irg, NULL, "belower-after-ra");
450 obstack_free(&obst, NULL);
451 be_invalidate_live_sets(irg);
452 be_timer_pop(T_RA_EPILOG);
454 be_timer_pop(T_RA_OTHER);
457 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal_main)
458 void be_init_chordal_main(void)
460 static be_ra_t be_ra_chordal_allocator = {
464 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
465 lc_opt_entry_t *ra_grp = lc_opt_get_grp(be_grp, "ra");
466 lc_opt_entry_t *chordal_grp = lc_opt_get_grp(ra_grp, "chordal");
468 be_register_allocator("chordal", &be_ra_chordal_allocator);
470 lc_opt_add_table(chordal_grp, be_chordal_options);
471 be_add_module_list_opt(chordal_grp, "coloring", "select coloring methode", &colorings, (void**) &selected_coloring);