2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Driver for the chordal register allocator.
23 * @author Sebastian Hack
39 #include "lc_opts_enum.h"
43 #include "irgraph_t.h"
44 #include "irprintf_t.h"
55 #include "iredges_t.h"
57 #include "bechordal_t.h"
65 #include "beifg_impl.h"
67 #include "bestatevent.h"
74 #include "bespillslots.h"
78 #include "becopystat.h"
79 #include "becopyopt.h"
80 #include "bessadestr.h"
84 #include "bepbqpcoloring.h"
86 static be_ra_chordal_opts_t options = {
88 BE_CH_LOWER_PERM_SWAP,
94 typedef struct _post_spill_env_t {
95 be_chordal_env_t cenv;
97 const arch_register_class_t *cls;
98 double pre_spill_cost;
101 static const lc_opt_enum_int_items_t lower_perm_items[] = {
102 { "copy", BE_CH_LOWER_PERM_COPY },
103 { "swap", BE_CH_LOWER_PERM_SWAP },
107 static const lc_opt_enum_int_items_t lower_perm_stat_items[] = {
111 static const lc_opt_enum_int_items_t dump_items[] = {
112 { "none", BE_CH_DUMP_NONE },
113 { "spill", BE_CH_DUMP_SPILL },
114 { "live", BE_CH_DUMP_LIVE },
115 { "color", BE_CH_DUMP_COLOR },
116 { "copymin", BE_CH_DUMP_COPYMIN },
117 { "ssadestr", BE_CH_DUMP_SSADESTR },
118 { "tree", BE_CH_DUMP_TREE_INTV },
119 { "constr", BE_CH_DUMP_CONSTR },
120 { "lower", BE_CH_DUMP_LOWER },
121 { "spillslots", BE_CH_DUMP_SPILLSLOTS },
122 { "appel", BE_CH_DUMP_APPEL },
123 { "all", BE_CH_DUMP_ALL },
127 static const lc_opt_enum_int_items_t be_ch_vrfy_items[] = {
128 { "off", BE_CH_VRFY_OFF },
129 { "warn", BE_CH_VRFY_WARN },
130 { "assert", BE_CH_VRFY_ASSERT },
134 static lc_opt_enum_int_var_t lower_perm_var = {
135 &options.lower_perm_opt, lower_perm_items
138 static lc_opt_enum_int_var_t dump_var = {
139 &options.dump_flags, dump_items
142 static lc_opt_enum_int_var_t be_ch_vrfy_var = {
143 &options.vrfy_option, be_ch_vrfy_items
146 static const lc_opt_table_entry_t be_chordal_options[] = {
147 LC_OPT_ENT_ENUM_PTR ("perm", "perm lowering options", &lower_perm_var),
148 LC_OPT_ENT_ENUM_MASK("dump", "select dump phases", &dump_var),
149 LC_OPT_ENT_ENUM_PTR ("verify", "verify options", &be_ch_vrfy_var),
153 static be_module_list_entry_t *colorings = NULL;
154 static const be_ra_chordal_coloring_t *selected_coloring = NULL;
156 void be_register_chordal_coloring(const char *name, be_ra_chordal_coloring_t *coloring)
158 if (selected_coloring == NULL)
159 selected_coloring = coloring;
161 be_add_module_to_list(&colorings, name, coloring);
164 void be_ra_chordal_coloring(be_chordal_env_t *env)
166 assert(selected_coloring != NULL);
167 if (selected_coloring != NULL) {
168 selected_coloring->allocate(env);
173 static void dump(unsigned mask, ir_graph *irg,
174 const arch_register_class_t *cls,
176 void (*dump_func)(ir_graph *, const char *))
178 if ((options.dump_flags & mask) == mask) {
181 snprintf(buf, sizeof(buf), "-%s%s", cls->name, suffix);
182 be_dump(irg, buf, dump_func);
185 be_dump(irg, suffix, dump_func);
190 * Checks for every reload if its user can perform the load on itself.
192 static void memory_operand_walker(ir_node *irn, void *env)
194 const ir_edge_t *edge, *ne;
200 if (! be_is_Reload(irn))
203 /* only use memory operands, if the reload is only used by 1 node */
204 if (get_irn_n_edges(irn) > 1)
207 spill = be_get_Reload_mem(irn);
208 block = get_nodes_block(irn);
210 foreach_out_edge_safe(irn, edge, ne) {
211 ir_node *src = get_edge_src_irn(edge);
212 int pos = get_edge_src_pos(edge);
214 assert(src && "outedges broken!");
216 if (get_nodes_block(src) == block && arch_possible_memory_operand(src, pos)) {
217 arch_perform_memory_operand(src, spill, pos);
221 /* kill the Reload */
222 if (get_irn_n_edges(irn) == 0) {
224 set_irn_n(irn, be_pos_Reload_mem, new_Bad());
225 set_irn_n(irn, be_pos_Reload_frame, new_Bad());
230 * Starts a walk for memory operands if supported by the backend.
232 void check_for_memory_operands(ir_graph *irg)
234 irg_walk_graph(irg, NULL, memory_operand_walker, NULL);
238 static be_node_stats_t last_node_stats;
241 * Perform things which need to be done per register class before spilling.
243 static void pre_spill(post_spill_env_t *pse, const arch_register_class_t *cls)
245 be_chordal_env_t *chordal_env = &pse->cenv;
246 be_irg_t *birg = pse->birg;
247 ir_graph *irg = be_get_birg_irg(birg);
250 chordal_env->cls = cls;
251 chordal_env->border_heads = pmap_create();
252 chordal_env->ignore_colors = bitset_malloc(chordal_env->cls->n_regs);
254 be_assure_liveness(birg);
255 be_liveness_assure_chk(be_get_birg_liveness(birg));
257 stat_ev_do(pse->pre_spill_cost = be_estimate_irg_costs(irg, birg->exec_freq));
259 /* put all ignore registers into the ignore register set. */
260 be_put_ignore_regs(birg, pse->cls, chordal_env->ignore_colors);
262 be_timer_push(T_RA_CONSTR);
263 be_pre_spill_prepare_constr(chordal_env->birg, chordal_env->cls);
264 be_timer_pop(T_RA_CONSTR);
266 dump(BE_CH_DUMP_CONSTR, birg->irg, pse->cls, "-constr-pre", dump_ir_block_graph_sched);
270 * Perform things which need to be done per register class after spilling.
272 static void post_spill(post_spill_env_t *pse, int iteration)
274 be_chordal_env_t *chordal_env = &pse->cenv;
275 be_irg_t *birg = pse->birg;
276 ir_graph *irg = birg->irg;
277 int colors_n = arch_register_class_n_regs(chordal_env->cls);
278 int allocatable_regs = colors_n - be_put_ignore_regs(birg, chordal_env->cls, NULL);
280 /* some special classes contain only ignore regs, no work to be done */
281 if (allocatable_regs > 0) {
282 stat_ev_dbl("bechordal_spillcosts", be_estimate_irg_costs(irg, birg->exec_freq) - pse->pre_spill_cost);
285 If we have a backend provided spiller, post spill is
286 called in a loop after spilling for each register class.
287 But we only need to fix stack nodes once in this case.
289 be_timer_push(T_RA_SPILL_APPLY);
290 check_for_memory_operands(irg);
291 if (iteration == 0) {
292 be_abi_fix_stack_nodes(birg->abi);
294 be_timer_pop(T_RA_SPILL_APPLY);
297 /* verify schedule and register pressure */
298 be_timer_push(T_VERIFY);
299 if (chordal_env->opts->vrfy_option == BE_CH_VRFY_WARN) {
300 be_verify_schedule(birg);
301 be_verify_register_pressure(birg, pse->cls, irg);
302 } else if (chordal_env->opts->vrfy_option == BE_CH_VRFY_ASSERT) {
303 assert(be_verify_schedule(birg) && "Schedule verification failed");
304 assert(be_verify_register_pressure(birg, pse->cls, irg)
305 && "Register pressure verification failed");
307 be_timer_pop(T_VERIFY);
309 /* Color the graph. */
310 be_timer_push(T_RA_COLOR);
311 be_ra_chordal_coloring(chordal_env);
312 be_timer_pop(T_RA_COLOR);
314 dump(BE_CH_DUMP_CONSTR, irg, pse->cls, "-color", dump_ir_block_graph_sched);
316 /* Create the ifg with the selected flavor */
317 be_timer_push(T_RA_IFG);
318 chordal_env->ifg = be_create_ifg(chordal_env);
319 be_timer_pop(T_RA_IFG);
323 be_node_stats_t node_stats;
325 be_ifg_stat(birg, chordal_env->ifg, &stat);
326 stat_ev_dbl("bechordal_ifg_nodes", stat.n_nodes);
327 stat_ev_dbl("bechordal_ifg_edges", stat.n_edges);
328 stat_ev_dbl("bechordal_ifg_comps", stat.n_comps);
330 be_collect_node_stats(&node_stats, birg);
331 be_subtract_node_stats(&node_stats, &last_node_stats);
333 stat_ev_dbl("bechordal_perms_before_coal",
334 node_stats[BE_STAT_PERMS]);
335 stat_ev_dbl("bechordal_copies_before_coal",
336 node_stats[BE_STAT_COPIES]);
339 be_timer_push(T_RA_COPYMIN);
340 co_driver(chordal_env);
341 be_timer_pop(T_RA_COPYMIN);
343 dump(BE_CH_DUMP_COPYMIN, irg, pse->cls, "-copymin", dump_ir_block_graph_sched);
345 /* ssa destruction */
346 be_timer_push(T_RA_SSA);
347 be_ssa_destruction(chordal_env);
348 be_timer_pop(T_RA_SSA);
350 dump(BE_CH_DUMP_SSADESTR, irg, pse->cls, "-ssadestr", dump_ir_block_graph_sched);
352 if (chordal_env->opts->vrfy_option != BE_CH_VRFY_OFF) {
353 be_timer_push(T_VERIFY);
354 be_ssa_destruction_check(chordal_env);
355 be_timer_pop(T_VERIFY);
358 /* the ifg exists only if there are allocatable regs */
359 be_ifg_free(chordal_env->ifg);
362 /* free some always allocated data structures */
363 pmap_destroy(chordal_env->border_heads);
364 bitset_free(chordal_env->ignore_colors);
368 * Performs chordal register allocation for each register class on given irg.
370 * @param birg Backend irg object
371 * @return Structure containing timer for the single phases or NULL if no timing requested.
373 static void be_ra_chordal_main(be_irg_t *birg)
375 const arch_env_t *arch_env = birg->main_env->arch_env;
376 ir_graph *irg = birg->irg;
379 be_chordal_env_t chordal_env;
382 be_timer_push(T_RA_OTHER);
384 be_timer_push(T_RA_PROLOG);
386 be_assure_liveness(birg);
388 chordal_env.obst = &obst;
389 chordal_env.opts = &options;
390 chordal_env.irg = irg;
391 chordal_env.birg = birg;
392 chordal_env.border_heads = NULL;
393 chordal_env.ifg = NULL;
394 chordal_env.ignore_colors = NULL;
398 be_timer_pop(T_RA_PROLOG);
401 be_collect_node_stats(&last_node_stats, birg);
404 if (! arch_code_generator_has_spiller(birg->cg)) {
405 /* use one of the generic spiller */
407 /* Perform the following for each register class. */
408 for (j = 0, m = arch_env_get_n_reg_class(arch_env); j < m; ++j) {
409 post_spill_env_t pse;
410 const arch_register_class_t *cls
411 = arch_env_get_reg_class(arch_env, j);
413 if (arch_register_class_flags(cls) & arch_register_class_flag_manual_ra)
417 stat_ev_ctx_push_str("bechordal_cls", cls->name);
420 be_do_stat_reg_pressure(birg, cls);
423 memcpy(&pse.cenv, &chordal_env, sizeof(chordal_env));
425 pre_spill(&pse, cls);
427 be_timer_push(T_RA_SPILL);
428 be_do_spill(birg, cls);
429 be_timer_pop(T_RA_SPILL);
431 dump(BE_CH_DUMP_SPILL, irg, pse.cls, "-spill",
432 dump_ir_block_graph_sched);
437 be_node_stats_t node_stats;
439 be_collect_node_stats(&node_stats, birg);
440 be_subtract_node_stats(&node_stats, &last_node_stats);
441 be_emit_node_stats(&node_stats, "bechordal_");
443 be_copy_node_stats(&last_node_stats, &node_stats);
444 stat_ev_ctx_pop("bechordal_cls");
448 post_spill_env_t *pse;
450 /* the backend has its own spiller */
451 m = arch_env_get_n_reg_class(arch_env);
453 pse = ALLOCAN(post_spill_env_t, m);
455 for (j = 0; j < m; ++j) {
456 memcpy(&pse[j].cenv, &chordal_env, sizeof(chordal_env));
458 pre_spill(&pse[j], pse[j].cls);
461 be_timer_push(T_RA_SPILL);
462 arch_code_generator_spill(birg->cg, birg);
463 be_timer_pop(T_RA_SPILL);
464 dump(BE_CH_DUMP_SPILL, irg, NULL, "-spill", dump_ir_block_graph_sched);
466 for (j = 0; j < m; ++j) {
467 post_spill(&pse[j], j);
471 be_timer_push(T_VERIFY);
472 if (chordal_env.opts->vrfy_option == BE_CH_VRFY_WARN) {
473 be_verify_register_allocation(birg);
474 } else if (chordal_env.opts->vrfy_option == BE_CH_VRFY_ASSERT) {
475 assert(be_verify_register_allocation(birg)
476 && "Register allocation invalid");
478 be_timer_pop(T_VERIFY);
480 be_timer_push(T_RA_EPILOG);
481 lower_nodes_after_ra(birg, options.lower_perm_opt & BE_CH_LOWER_PERM_COPY ? 1 : 0);
482 dump(BE_CH_DUMP_LOWER, irg, NULL, "-belower-after-ra", dump_ir_block_graph_sched);
484 obstack_free(&obst, NULL);
485 be_liveness_invalidate(be_get_birg_liveness(birg));
486 be_timer_pop(T_RA_EPILOG);
488 be_timer_pop(T_RA_OTHER);
491 void be_init_chordal_main(void)
493 static be_ra_t be_ra_chordal_allocator = {
497 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
498 lc_opt_entry_t *ra_grp = lc_opt_get_grp(be_grp, "ra");
499 lc_opt_entry_t *chordal_grp = lc_opt_get_grp(ra_grp, "chordal");
501 be_register_allocator("chordal", &be_ra_chordal_allocator);
503 lc_opt_add_table(chordal_grp, be_chordal_options);
504 be_add_module_list_opt(chordal_grp, "coloring", "select coloring methode", &colorings, (void**) &selected_coloring);
507 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal_main);