2 * Chordal register allocation.
3 * @author Sebastian Hack
6 * Copyright (C) Universitaet Karlsruhe
7 * Released under the GPL
29 #include "bipartite.h"
32 #include "irgraph_t.h"
33 #include "irprintf_t.h"
43 #include "besched_t.h"
49 #include "bechordal_t.h"
50 #include "bechordal_draw.h"
52 #define DBG_LEVEL SET_LEVEL_0
53 #define DBG_LEVEL_CHECK SET_LEVEL_0
57 #define DUMP_INTERVALS
59 typedef struct _be_chordal_alloc_env_t {
60 be_chordal_env_t *chordal_env;
62 pset *pre_colored; /**< Set of precolored nodes. */
63 bitset_t *live; /**< A liveness bitset. */
64 bitset_t *colors; /**< The color mask. */
65 bitset_t *valid_colors; /**< A mask of colors which shall be considered during allocation.
66 Registers with the ignore bit on, must not be considered. */
67 bitset_t *in_colors; /**< Colors used by live in values. */
68 int colors_n; /**< The number of colors. */
69 } be_chordal_alloc_env_t;
73 /* Make a fourcc for border checking. */
74 #define BORDER_FOURCC FOURCC('B', 'O', 'R', 'D')
76 static void check_border_list(struct list_head *head)
79 list_for_each_entry(border_t, x, head, list) {
80 assert(x->magic == BORDER_FOURCC);
84 static void check_heads(be_chordal_env_t *env)
87 for(ent = pmap_first(env->border_heads); ent; ent = pmap_next(env->border_heads)) {
88 /* ir_printf("checking border list of block %+F\n", ent->key); */
89 check_border_list(ent->value);
95 * Add an interval border to the list of a block's list
97 * @note You always have to create the use before the def.
98 * @param env The environment.
99 * @param head The list head to enqueue the borders.
100 * @param irn The node (value) the border belongs to.
101 * @param pressure The pressure at this point in time.
102 * @param step A time step for the border.
103 * @param is_def Is the border a use or a def.
104 * @return The created border.
106 static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head,
107 ir_node *irn, unsigned step, unsigned pressure,
108 unsigned is_def, unsigned is_real)
115 b = obstack_alloc(&env->obst, sizeof(*b));
117 /* also allocate the def and tie it to the use. */
118 def = obstack_alloc(&env->obst, sizeof(*def));
119 memset(def, 0, sizeof(*def));
124 * Set the link field of the irn to the def.
125 * This strongly relies on the fact, that the use is always
126 * made before the def.
128 set_irn_link(irn, def);
130 b->magic = BORDER_FOURCC;
131 def->magic = BORDER_FOURCC;
135 * If the def is encountered, the use was made and so was the
136 * the def node (see the code above). It was placed into the
137 * link field of the irn, so we can get it there.
140 b = get_irn_link(irn);
142 assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered");
145 b->pressure = pressure;
147 b->is_real = is_real;
150 list_add_tail(&b->list, head);
151 DBG((env->dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step));
158 * Check, if an irn is of the register class currently under processing.
159 * @param env The chordal environment.
160 * @param irn The node.
161 * @return 1, if the node is of that register class, 0 if not.
163 static INLINE int has_reg_class(const be_chordal_env_t *env, const ir_node *irn)
165 // return arch_irn_has_reg_class(env->main_env->arch_env, irn, -1, env->cls);
166 return arch_irn_consider_in_reg_alloc(env->main_env->arch_env, env->cls, irn);
169 #define has_limited_constr(req, irn) \
170 (arch_get_register_req(arch_env, (req), irn, -1) && (req)->type == arch_register_req_type_limited)
172 typedef struct _operand_t operand_t;
179 arch_register_req_t req;
187 unsigned has_constraints : 1;
190 static insn_t *scan_insn(be_chordal_env_t *env, ir_node *irn, struct obstack *obst)
192 const arch_env_t *arch_env = env->main_env->arch_env;
197 insn = obstack_alloc(obst, sizeof(insn[0]));
198 memset(insn, 0, sizeof(insn[0]));
200 insn->next_insn = sched_next(irn);
201 if(get_irn_mode(irn) == mode_T) {
204 for(p = sched_next(irn); is_Proj(p); p = sched_next(p)) {
205 if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, p)) {
208 o.pos = -(get_Proj_proj(p) + 1);
210 arch_get_register_req(arch_env, &o.req, p, -1);
211 obstack_grow(obst, &o, sizeof(o));
213 insn->has_constraints |= arch_register_req_is(&o.req, limited);
220 else if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, irn)) {
225 arch_get_register_req(arch_env, &o.req, irn, -1);
226 obstack_grow(obst, &o, sizeof(o));
228 insn->has_constraints |= arch_register_req_is(&o.req, limited);
231 insn->use_start = insn->n_ops;
233 for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
234 ir_node *op = get_irn_n(irn, i);
236 if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, op)) {
241 arch_get_register_req(arch_env, &o.req, irn, i);
242 obstack_grow(obst, &o, sizeof(o));
244 insn->has_constraints |= arch_register_req_is(&o.req, limited);
248 insn->ops = obstack_finish(obst);
252 static operand_t *find_unpaired_use(insn_t *insn, const operand_t *op, int can_be_constrained)
255 operand_t *res = NULL;
257 for(i = insn->use_start; i < insn->n_ops; ++i) {
258 operand_t *op = &insn->ops[i];
259 int has_constraint = arch_register_req_is(&op->req, limited);
261 if(!values_interfere(op->carrier, op->irn) && !op->partner && (!has_constraint || can_be_constrained)) {
262 if(arch_register_req_is(&op->req, should_be_same) && op->req.other_same == op->carrier)
272 static void pair_up_operands(insn_t *insn)
274 firm_dbg_module_t *dbg = firm_dbg_register("firm.be.chordal.constr");
277 for(i = 0; i < insn->use_start; ++i) {
278 operand_t *op = &insn->ops[i];
279 int has_constraint = arch_register_req_is(&op->req, limited);
280 operand_t *partner = find_unpaired_use(insn, op, !has_constraint);
283 op->partner = partner;
284 partner->partner = op;
289 static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *irn)
291 be_chordal_env_t *env = alloc_env->chordal_env;
292 void *base = obstack_base(&env->obst);
293 insn_t *insn = scan_insn(env, irn, &env->obst);
294 ir_node *res = insn->next_insn;
296 if(insn->has_constraints) {
297 firm_dbg_module_t *dbg = firm_dbg_register("firm.be.chordal.constr");
298 const arch_env_t *aenv = env->main_env->arch_env;
299 int n_regs = env->cls->n_regs;
300 bitset_t *bs = bitset_alloca(n_regs);
301 ir_node **alloc_nodes = alloca(n_regs * sizeof(alloc_nodes[0]));
302 bipartite_t *bp = bipartite_new(n_regs, n_regs);
303 int *assignment = alloca(n_regs * sizeof(assignment[0]));
304 pmap *partners = pmap_create();
308 const ir_edge_t *edge;
309 ir_node *perm = insert_Perm_after(aenv, env->cls, env->dom_front, sched_prev(irn));
311 /* Registers are propagated by insert_Perm_after(). Clean them here! */
313 foreach_out_edge(perm, edge) {
314 ir_node *proj = get_edge_src_irn(edge);
315 arch_set_irn_register(aenv, proj, NULL);
320 be_liveness(env->irg);
321 insn = scan_insn(env, irn, &env->obst);
323 DBG((dbg, LEVEL_1, "handling constraints for %+F\n", irn));
326 * If there was no Perm made, nothing was alive in this register class.
327 * This means, that the node has no operands, thus no input constraints.
328 * so it had output constraints. The other results then can be assigned freeliy.
331 pair_up_operands(insn);
333 for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) {
334 operand_t *op = &insn->ops[i];
335 if(arch_register_req_is(&op->req, limited)) {
336 pmap_insert(partners, op->carrier, op->partner ? op->partner->carrier : NULL);
337 alloc_nodes[n_alloc] = op->carrier;
339 DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, pmap_get(partners, op->carrier)));
341 bitset_clear_all(bs);
342 op->req.limited(op->req.limited_env, bs);
343 bitset_and(bs, alloc_env->valid_colors);
345 DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, bs));
347 bitset_foreach(bs, col)
348 bipartite_add(bp, n_alloc, col);
355 foreach_out_edge(perm, edge) {
356 ir_node *proj = get_edge_src_irn(edge);
358 assert(is_Proj(proj));
360 if(values_interfere(proj, irn)) {
361 assert(n_alloc < n_regs);
362 alloc_nodes[n_alloc] = proj;
363 pmap_insert(partners, proj, NULL);
365 bitset_clear_all(bs);
366 arch_get_allocatable_regs(aenv, proj, -1, bs);
367 bitset_and(bs, alloc_env->valid_colors);
368 bitset_foreach(bs, col)
369 bipartite_add(bp, n_alloc, col);
376 bipartite_matching(bp, assignment);
379 for(i = 0; i < n_alloc; ++i) {
382 const arch_register_t *reg;
384 assert(assignment[i] >= 0 && "there must have been a register assigned");
385 reg = arch_register_for_index(env->cls, assignment[i]);
387 nodes[0] = alloc_nodes[i];
388 nodes[1] = pmap_get(partners, alloc_nodes[i]);
390 for(j = 0; j < 2; ++j) {
394 arch_set_irn_register(aenv, nodes[j], reg);
395 pset_hinsert_ptr(alloc_env->pre_colored, nodes[j]);
396 DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", nodes[j], reg->name));
402 bitset_clear_all(bs);
403 foreach_out_edge(perm, edge) {
404 ir_node *proj = get_edge_src_irn(edge);
405 const arch_register_t *reg = arch_get_irn_register(aenv, proj);
408 bitset_set(bs, reg->index);
411 // bitset_or(bs, alloc_env->ignore_colors);
412 foreach_out_edge(perm, edge) {
413 ir_node *proj = get_edge_src_irn(edge);
414 const arch_register_t *reg = arch_get_irn_register(aenv, proj);
416 DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "<none>"));
419 col = bitset_next_clear(bs, 0);
420 reg = arch_register_for_index(env->cls, col);
421 bitset_set(bs, reg->index);
422 arch_set_irn_register(aenv, proj, reg);
423 pset_insert_ptr(alloc_env->pre_colored, proj);
424 DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name));
429 pmap_destroy(partners);
432 obstack_free(&env->obst, base);
437 * Handle constraint nodes in each basic block.
438 * be_insert_constr_perms() inserts Perm nodes which perm
439 * over all values live at the constrained node right in front
440 * of the constrained node. These Perms signal a constrained node.
441 * For further comments, refer to handle_constraints_at_perm().
443 static void constraints(ir_node *bl, void *data)
445 firm_dbg_module_t *dbg = firm_dbg_register("firm.be.chordal.constr");
446 be_chordal_alloc_env_t *env = data;
447 arch_env_t *arch_env = env->chordal_env->main_env->arch_env;
450 for(irn = sched_first(bl); !sched_is_end(irn);) {
451 irn = handle_constraints(env, irn);
456 * Annotate the register pressure to the nodes and compute
457 * the liveness intervals.
458 * @param block The block to do it for.
459 * @param env_ptr The environment.
461 static void pressure(ir_node *block, void *env_ptr)
463 /* Convenience macro for a def */
464 #define border_def(irn, step, real) \
465 border_add(env, head, irn, step, pressure--, 1, real)
467 /* Convenience macro for a use */
468 #define border_use(irn, step, real) \
469 border_add(env, head, irn, step, ++pressure, 0, real)
471 be_chordal_alloc_env_t *alloc_env = env_ptr;
472 be_chordal_env_t *env = alloc_env->chordal_env;
473 const arch_env_t *arch_env = env->main_env->arch_env;
474 bitset_t *live = alloc_env->live;
475 firm_dbg_module_t *dbg = env->dbg;
480 unsigned pressure = 0;
481 struct list_head *head;
482 pset *live_in = put_live_in(block, pset_new_ptr_default());
483 pset *live_end = put_live_end(block, pset_new_ptr_default());
485 DBG((dbg, LEVEL_1, "Computing pressure in block %+F\n", block));
486 bitset_clear_all(live);
488 /* Set up the border list in the block info */
489 head = obstack_alloc(&env->obst, sizeof(*head));
490 INIT_LIST_HEAD(head);
491 assert(pmap_get(env->border_heads, block) == NULL);
492 pmap_insert(env->border_heads, block, head);
495 * Make final uses of all values live out of the block.
496 * They are necessary to build up real intervals.
498 for(irn = pset_first(live_end); irn; irn = pset_next(live_end)) {
499 if(has_reg_class(env, irn)) {
500 DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_graph_nr(irn)));
501 bitset_set(live, get_irn_graph_nr(irn));
502 border_use(irn, step, 0);
508 * Determine the last uses of a value inside the block, since they are
509 * relevant for the interval borders.
511 sched_foreach_reverse(block, irn) {
512 DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure));
513 DBG((dbg, LEVEL_2, "\tlive: %b\n", live));
516 * If the node defines some value, which can put into a
517 * register of the current class, make a border for it.
519 if(has_reg_class(env, irn)) {
520 int nr = get_irn_graph_nr(irn);
522 bitset_clear(live, nr);
523 border_def(irn, step, 1);
527 * If the node is no phi node we can examine the uses.
530 for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
531 ir_node *op = get_irn_n(irn, i);
533 if(has_reg_class(env, op)) {
534 int nr = get_irn_graph_nr(op);
536 DBG((dbg, LEVEL_4, "\t\tpos: %d, use: %+F\n", i, op));
538 if(!bitset_is_set(live, nr)) {
539 border_use(op, step, 1);
540 bitset_set(live, nr);
549 * Add initial defs for all values live in.
551 for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
552 if(has_reg_class(env, irn)) {
554 /* Mark the value live in. */
555 bitset_set(live, get_irn_graph_nr(irn));
558 border_def(irn, step, 0);
567 static void assign(ir_node *block, void *env_ptr)
569 be_chordal_alloc_env_t *alloc_env = env_ptr;
570 be_chordal_env_t *env = alloc_env->chordal_env;
571 firm_dbg_module_t *dbg = env->dbg;
572 bitset_t *live = alloc_env->live;
573 bitset_t *colors = alloc_env->colors;
574 bitset_t *in_colors = alloc_env->in_colors;
575 const arch_env_t *arch_env = env->main_env->arch_env;
579 struct list_head *head = get_block_border_head(env, block);
580 pset *live_in = put_live_in(block, pset_new_ptr_default());
582 bitset_clear_all(live);
583 bitset_clear_all(in_colors);
585 bitset_copy(colors, alloc_env->valid_colors);
586 bitset_flip_all(colors);
588 DBG((dbg, LEVEL_4, "Assigning colors for block %+F\n", block));
589 DBG((dbg, LEVEL_4, "\tusedef chain for block\n"));
590 list_for_each_entry(border_t, b, head, list) {
591 DBG((dbg, LEVEL_4, "\t%s %+F/%d\n", b->is_def ? "def" : "use",
592 b->irn, get_irn_graph_nr(b->irn)));
596 * Add initial defs for all values live in.
597 * Since their colors have already been assigned (The dominators were
598 * allocated before), we have to mark their colors as used also.
600 for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
601 if(has_reg_class(env, irn)) {
602 const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
605 assert(reg && "Node must have been assigned a register");
606 col = arch_register_get_index(reg);
608 /* Mark the color of the live in value as used. */
609 bitset_set(colors, col);
610 bitset_set(in_colors, col);
612 /* Mark the value live in. */
613 bitset_set(live, get_irn_graph_nr(irn));
618 * Mind that the sequence of defs from back to front defines a perfect
619 * elimination order. So, coloring the definitions from first to last
622 list_for_each_entry_reverse(border_t, b, head, list) {
623 ir_node *irn = b->irn;
624 int nr = get_irn_graph_nr(irn);
627 * Assign a color, if it is a local def. Global defs already have a
630 if(b->is_def && !is_live_in(block, irn)) {
631 const arch_register_t *reg;
634 if(pset_find_ptr(alloc_env->pre_colored, irn)) {
635 reg = arch_get_irn_register(arch_env, irn);
637 assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
641 col = bitset_next_clear(colors, 0);
642 reg = arch_register_for_index(env->cls, col);
643 assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet");
646 bitset_set(colors, col);
647 arch_set_irn_register(arch_env, irn, reg);
649 DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n",
650 arch_register_get_name(reg), col, irn));
652 assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
653 bitset_set(live, nr);
656 /* Clear the color upon a use. */
657 else if(!b->is_def) {
658 const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
661 assert(reg && "Register must have been assigned");
663 col = arch_register_get_index(reg);
664 assert(bitset_is_set(live, nr) && "Cannot have a non live use");
666 bitset_clear(colors, col);
667 bitset_clear(live, nr);
674 void be_ra_chordal_color(be_chordal_env_t *chordal_env)
676 be_chordal_alloc_env_t env;
679 int colors_n = arch_register_class_n_regs(chordal_env->cls);
680 ir_graph *irg = chordal_env->irg;
683 if(get_irg_dom_state(irg) != dom_consistent)
686 env.chordal_env = chordal_env;
687 env.colors_n = colors_n;
688 env.colors = bitset_malloc(colors_n);
689 env.valid_colors = bitset_malloc(colors_n);
690 env.in_colors = bitset_malloc(colors_n);
691 env.pre_colored = pset_new_ptr_default();
693 arch_put_non_ignore_regs(chordal_env->main_env->arch_env, chordal_env->cls, env.valid_colors);
695 /* Handle register targeting constraints */
696 dom_tree_walk_irg(irg, constraints, NULL, &env);
699 if(chordal_env->opts->dump_flags & BE_CH_DUMP_CONSTR) {
700 snprintf(buf, sizeof(buf), "-%s-constr", chordal_env->cls->name);
701 dump_ir_block_graph_sched(chordal_env->irg, buf);
706 env.live = bitset_malloc(get_graph_node_count(chordal_env->irg));
708 /* First, determine the pressure */
709 dom_tree_walk_irg(irg, pressure, NULL, &env);
711 /* Assign the colors */
712 dom_tree_walk_irg(irg, assign, NULL, &env);
714 be_numbering_done(irg);
717 if(chordal_env->opts->dump_flags & BE_CH_DUMP_TREE_INTV) {
720 ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", chordal_env->cls->name, irg);
721 plotter = new_plotter_ps(buf);
722 draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter);
723 plotter_free(plotter);
730 free(env.valid_colors);
732 del_pset(env.pre_colored);