2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Chordal register allocation.
23 * @author Sebastian Hack
37 #include "raw_bitset.h"
39 #include "bipartite.h"
40 #include "hungarian.h"
43 #include "irgraph_t.h"
44 #include "irprintf_t.h"
56 #include "besched_t.h"
63 #include "bestatevent.h"
65 #include "beintlive_t.h"
67 #include "bechordal_t.h"
68 #include "bechordal_draw.h"
71 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
75 #define DUMP_INTERVALS
77 /* new style assign routine without borders. */
78 #undef NEW_STYLE_ASSIGN
80 typedef struct _be_chordal_alloc_env_t {
81 be_chordal_env_t *chordal_env;
83 pset *pre_colored; /**< Set of precolored nodes. */
84 bitset_t *live; /**< A liveness bitset. */
85 bitset_t *tmp_colors; /**< An auxiliary bitset which is as long as the number of colors in the class. */
86 bitset_t *colors; /**< The color mask. */
87 bitset_t *in_colors; /**< Colors used by live in values. */
88 int colors_n; /**< The number of colors. */
89 } be_chordal_alloc_env_t;
93 /* Make a fourcc for border checking. */
94 #define BORDER_FOURCC FOURCC('B', 'O', 'R', 'D')
97 static void check_border_list(struct list_head *head)
100 list_for_each_entry(border_t, x, head, list) {
101 assert(x->magic == BORDER_FOURCC);
105 static void check_heads(be_chordal_env_t *env)
108 for(ent = pmap_first(env->border_heads); ent; ent = pmap_next(env->border_heads)) {
109 /* ir_printf("checking border list of block %+F\n", ent->key); */
110 check_border_list(ent->value);
116 * Add an interval border to the list of a block's list
117 * of interval border.
118 * @note You always have to create the use before the def.
119 * @param env The environment.
120 * @param head The list head to enqueue the borders.
121 * @param irn The node (value) the border belongs to.
122 * @param pressure The pressure at this point in time.
123 * @param step A time step for the border.
124 * @param is_def Is the border a use or a def.
125 * @return The created border.
127 static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head,
128 ir_node *irn, unsigned step, unsigned pressure,
129 unsigned is_def, unsigned is_real)
136 b = obstack_alloc(env->obst, sizeof(*b));
138 /* also allocate the def and tie it to the use. */
139 def = obstack_alloc(env->obst, sizeof(*def));
140 memset(def, 0, sizeof(*def));
145 * Set the link field of the irn to the def.
146 * This strongly relies on the fact, that the use is always
147 * made before the def.
149 set_irn_link(irn, def);
151 DEBUG_ONLY(b->magic = BORDER_FOURCC);
152 DEBUG_ONLY(def->magic = BORDER_FOURCC);
156 * If the def is encountered, the use was made and so was the
157 * the def node (see the code above). It was placed into the
158 * link field of the irn, so we can get it there.
161 b = get_irn_link(irn);
163 assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered");
166 b->pressure = pressure;
168 b->is_real = is_real;
171 list_add_tail(&b->list, head);
172 DBG((dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step));
179 * Check, if an irn is of the register class currently under processing.
180 * @param env The chordal environment.
181 * @param irn The node.
182 * @return 1, if the node is of that register class, 0 if not.
184 static INLINE int has_reg_class(const be_chordal_env_t *env, const ir_node *irn)
186 return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn);
189 #define has_limited_constr(req, irn) \
190 (arch_get_register_req(arch_env, (req), irn, -1) && (req)->type == arch_register_req_type_limited)
192 static int get_next_free_reg(const be_chordal_alloc_env_t *alloc_env, bitset_t *colors)
194 bitset_t *tmp = alloc_env->tmp_colors;
195 bitset_copy(tmp, colors);
196 bitset_or(tmp, alloc_env->chordal_env->ignore_colors);
197 return bitset_next_clear(tmp, 0);
200 static bitset_t *get_decisive_partner_regs(bitset_t *bs, const be_operand_t *o1, const be_operand_t *o2)
205 bitset_copy(bs, o2->regs);
210 bitset_copy(bs, o1->regs);
214 assert(o1->req->cls == o2->req->cls || ! o1->req->cls || ! o2->req->cls);
216 if(bitset_contains(o1->regs, o2->regs))
217 bitset_copy(bs, o1->regs);
218 else if(bitset_contains(o2->regs, o1->regs))
219 bitset_copy(bs, o2->regs);
226 static be_insn_t *chordal_scan_insn(be_chordal_env_t *env, ir_node *irn)
230 ie.ignore_colors = env->ignore_colors;
231 ie.aenv = env->birg->main_env->arch_env;
234 return be_scan_insn(&ie, irn);
237 static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn)
239 const be_irg_t *birg = env->birg;
240 const arch_env_t *aenv = birg->main_env->arch_env;
241 bitset_t *tmp = bitset_alloca(env->cls->n_regs);
242 bitset_t *def_constr = bitset_alloca(env->cls->n_regs);
243 ir_node *bl = get_nodes_block(irn);
244 be_lv_t *lv = env->birg->lv;
249 for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
250 ir_node *op = get_irn_n(irn, i);
252 const arch_register_t *reg;
253 const arch_register_req_t *req;
255 if (arch_get_irn_reg_class(aenv, irn, i) != env->cls)
258 reg = arch_get_irn_register(aenv, op);
260 if (reg == NULL || !arch_register_type_is(reg, ignore))
262 if(arch_register_type_is(reg, joker))
265 req = arch_get_register_req(aenv, irn, i);
266 if (!arch_register_req_is(req, limited))
269 if (rbitset_is_set(req->limited, reg->index))
272 copy = be_new_Copy(env->cls, env->irg, bl, op);
273 be_stat_ev("constr_copy", 1);
275 sched_add_before(irn, copy);
276 set_irn_n(irn, i, copy);
277 DBG((dbg, LEVEL_3, "inserting ignore arg copy %+F for %+F pos %d\n", copy, irn, i));
280 insn = chordal_scan_insn(env, irn);
282 if(!insn->has_constraints)
285 /* insert copies for nodes that occur constrained more than once. */
286 for(i = insn->use_start; i < insn->n_ops; ++i) {
287 be_operand_t *op = &insn->ops[i];
289 if(!op->has_constraints)
292 for(j = i + 1; j < insn->n_ops; ++j) {
294 be_operand_t *a_op = &insn->ops[j];
296 if(a_op->carrier != op->carrier || !a_op->has_constraints)
299 if (be_is_Copy(get_irn_n(insn->irn, a_op->pos)))
302 copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
303 be_stat_ev("constr_copy", 1);
305 sched_add_before(insn->irn, copy);
306 set_irn_n(insn->irn, a_op->pos, copy);
307 DBG((dbg, LEVEL_3, "inserting multiple constr copy %+F for %+F pos %d\n", copy, insn->irn, a_op->pos));
311 /* collect all registers occuring in out constraints. */
312 for(i = 0; i < insn->use_start; ++i) {
313 be_operand_t *op = &insn->ops[i];
314 if(op->has_constraints)
315 bitset_or(def_constr, op->regs);
319 insert copies for all constrained arguments living through the node
320 and being constrained to a register which also occurs in out constraints.
322 for(i = insn->use_start; i < insn->n_ops; ++i) {
324 be_operand_t *op = &insn->ops[i];
326 bitset_copy(tmp, op->regs);
327 bitset_and(tmp, def_constr);
331 1) the operand is constrained.
332 2) lives through the node.
333 3) is constrained to a register occuring in out constraints.
335 if(!op->has_constraints ||
336 !values_interfere(birg, insn->irn, op->carrier) ||
337 bitset_popcnt(tmp) == 0)
341 only create the copy if the operand is no copy.
342 this is necessary since the assure constraints phase inserts
343 Copies and Keeps for operands which must be different from the
344 results. Additional copies here would destroy this.
346 if (be_is_Copy(get_irn_n(insn->irn, op->pos)))
349 copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
351 sched_add_before(insn->irn, copy);
352 set_irn_n(insn->irn, op->pos, copy);
353 DBG((dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n", copy, insn->irn, op->pos));
354 be_liveness_update(lv, op->carrier);
358 obstack_free(env->obst, insn);
359 return insn->next_insn;
362 static void pre_spill_prepare_constr_walker(ir_node *bl, void *data)
364 be_chordal_env_t *env = data;
366 for(irn = sched_first(bl); !sched_is_end(irn);) {
367 irn = prepare_constr_insn(env, irn);
371 void be_pre_spill_prepare_constr(be_chordal_env_t *cenv) {
372 irg_block_walk_graph(cenv->irg, pre_spill_prepare_constr_walker, NULL, (void *) cenv);
375 static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t *insn)
377 const be_chordal_env_t *env = alloc_env->chordal_env;
379 int n_uses = be_insn_n_uses(insn);
380 int n_defs = be_insn_n_defs(insn);
381 bitset_t *bs = bitset_alloca(env->cls->n_regs);
382 int *pairing = alloca(MAX(n_defs, n_uses) * sizeof(pairing[0]));
387 For each out operand, try to find an in operand which can be assigned the
388 same register as the out operand.
390 for (j = 0; j < insn->use_start; ++j) {
392 int smallest_n_regs = 2 * env->cls->n_regs + 1;
393 be_operand_t *out_op = &insn->ops[j];
395 /* Try to find an in operand which has ... */
396 for(i = insn->use_start; i < insn->n_ops; ++i) {
398 const be_operand_t *op = &insn->ops[i];
400 if (op->partner != NULL)
402 if (values_interfere(env->birg, op->irn, op->carrier))
405 bitset_clear_all(bs);
406 bitset_copy(bs, op->regs);
407 bitset_and(bs, out_op->regs);
408 n_total = bitset_popcnt(op->regs) + bitset_popcnt(out_op->regs);
410 if (bitset_popcnt(bs) > 0 && n_total < smallest_n_regs) {
412 smallest_n_regs = n_total;
417 be_operand_t *partner = &insn->ops[smallest];
419 for(i = insn->use_start; i < insn->n_ops; ++i) {
420 if(insn->ops[i].carrier == partner->carrier)
421 insn->ops[i].partner = out_op;
424 out_op->partner = partner;
425 partner->partner = out_op;
431 static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env,
432 be_insn_t **the_insn)
434 be_chordal_env_t *env = alloc_env->chordal_env;
435 const arch_env_t *aenv = env->birg->main_env->arch_env;
436 be_insn_t *insn = *the_insn;
437 ir_node *perm = NULL;
438 bitset_t *out_constr = bitset_alloca(env->cls->n_regs);
439 const ir_edge_t *edge;
442 assert(insn->has_constraints && "only do this for constrained nodes");
445 Collect all registers that occur in output constraints.
446 This is necessary, since if the insn has one of these as an input constraint
447 and the corresponding operand interferes with the insn, the operand must
450 for(i = 0; i < insn->use_start; ++i) {
451 be_operand_t *op = &insn->ops[i];
452 if(op->has_constraints)
453 bitset_or(out_constr, op->regs);
457 Make the Perm, recompute liveness and re-scan the insn since the
458 in operands are now the Projs of the Perm.
460 perm = insert_Perm_after(env->birg, env->cls, sched_prev(insn->irn));
462 /* Registers are propagated by insert_Perm_after(). Clean them here! */
466 be_stat_ev("constr_perm", get_irn_arity(perm));
467 foreach_out_edge(perm, edge) {
468 ir_node *proj = get_edge_src_irn(edge);
469 arch_set_irn_register(aenv, proj, NULL);
473 We also have to re-build the insn since the input operands are now the Projs of
474 the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since
475 the live sets may change.
477 // be_liveness_recompute(lv);
478 obstack_free(env->obst, insn);
479 *the_insn = insn = chordal_scan_insn(env, insn->irn);
482 Copy the input constraints of the insn to the Perm as output
483 constraints. Succeeding phases (coalescing) will need that.
485 for(i = insn->use_start; i < insn->n_ops; ++i) {
486 be_operand_t *op = &insn->ops[i];
487 ir_node *proj = op->carrier;
489 Note that the predecessor must not be a Proj of the Perm,
490 since ignore-nodes are not Perm'ed.
492 if(op->has_constraints && is_Proj(proj) && get_Proj_pred(proj) == perm) {
493 be_set_constr_limited(perm, BE_OUT_POS(get_Proj_proj(proj)), op->req);
500 static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env,
501 ir_node *irn, int *silent)
503 const arch_env_t *aenv;
506 ir_node **alloc_nodes;
507 //hungarian_problem_t *bp;
512 const ir_edge_t *edge;
513 ir_node *perm = NULL;
515 be_chordal_env_t *env = alloc_env->chordal_env;
516 void *base = obstack_base(env->obst);
517 be_insn_t *insn = chordal_scan_insn(env, irn);
518 ir_node *res = insn->next_insn;
519 int be_silent = *silent;
520 be_irg_t *birg = env->birg;
522 if(insn->pre_colored) {
524 for(i = 0; i < insn->use_start; ++i)
525 pset_insert_ptr(alloc_env->pre_colored, insn->ops[i].carrier);
529 If the current node is a barrier toggle the silent flag.
530 If we are in the start block, we are ought to be silent at the beginning,
531 so the toggling activates the constraint handling but skips the barrier.
532 If we are in the end block we handle the in requirements of the barrier
533 and set the rest to silent.
535 if(be_is_Barrier(irn))
542 Perms inserted before the constraint handling phase are considered to be
543 correctly precolored. These Perms arise during the ABI handling phase.
545 if(!insn->has_constraints)
548 aenv = env->birg->main_env->arch_env;
549 n_regs = env->cls->n_regs;
550 bs = bitset_alloca(n_regs);
551 alloc_nodes = alloca(n_regs * sizeof(alloc_nodes[0]));
552 //bp = hungarian_new(n_regs, n_regs, 2, HUNGARIAN_MATCH_PERFECT);
553 bipartite_t *bp = bipartite_new(n_regs, n_regs);
554 assignment = alloca(n_regs * sizeof(assignment[0]));
555 partners = pmap_create();
558 prepare the constraint handling of this node.
559 Perms are constructed and Copies are created for constrained values
560 interfering with the instruction.
562 perm = pre_process_constraints(alloc_env, &insn);
564 /* find suitable in operands to the out operands of the node. */
565 pair_up_operands(alloc_env, insn);
568 look at the in/out operands and add each operand (and its possible partner)
569 to a bipartite graph (left: nodes with partners, right: admissible colors).
571 for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) {
572 be_operand_t *op = &insn->ops[i];
575 If the operand has no partner or the partner has not been marked
576 for allocation, determine the admissible registers and mark it
577 for allocation by associating the node and its partner with the
578 set of admissible registers via a bipartite graph.
580 if(!op->partner || !pmap_contains(partners, op->partner->carrier)) {
581 ir_node *partner = op->partner ? op->partner->carrier : NULL;
584 pmap_insert(partners, op->carrier, partner);
586 pmap_insert(partners, partner, op->carrier);
588 /* don't insert a node twice */
589 for(i = 0; i < n_alloc; ++i) {
590 if(alloc_nodes[i] == op->carrier) {
597 alloc_nodes[n_alloc] = op->carrier;
599 DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier,
602 bitset_clear_all(bs);
603 get_decisive_partner_regs(bs, op, op->partner);
605 DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier,
608 bitset_foreach(bs, col) {
609 //hungarian_add(bp, n_alloc, col, 1);
610 bipartite_add(bp, n_alloc, col);
618 Put all nodes which live through the constrained instruction also to the
619 allocation bipartite graph. They are considered unconstrained.
622 foreach_out_edge(perm, edge) {
624 ir_node *proj = get_edge_src_irn(edge);
626 assert(is_Proj(proj));
628 if(!values_interfere(birg, proj, irn) || pmap_contains(partners, proj))
631 /* don't insert a node twice */
632 for(i = 0; i < n_alloc; ++i) {
633 if(alloc_nodes[i] == proj) {
641 assert(n_alloc < n_regs);
643 alloc_nodes[n_alloc] = proj;
644 pmap_insert(partners, proj, NULL);
646 bitset_clear_all(bs);
647 arch_put_non_ignore_regs(aenv, env->cls, bs);
648 bitset_andnot(bs, env->ignore_colors);
649 bitset_foreach(bs, col) {
650 //hungarian_add(bp, n_alloc, col, 1);
651 bipartite_add(bp, n_alloc, col);
658 /* Compute a valid register allocation. */
660 hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
661 match_res = hungarian_solve(bp, assignment, &cost, 1);
662 assert(match_res == 0 && "matching failed");
664 bipartite_matching(bp, assignment);
667 /* Assign colors obtained from the matching. */
668 for(i = 0; i < n_alloc; ++i) {
669 const arch_register_t *reg;
673 assert(assignment[i] >= 0 && "there must have been a register assigned");
674 reg = arch_register_for_index(env->cls, assignment[i]);
676 nodes[0] = alloc_nodes[i];
677 nodes[1] = pmap_get(partners, alloc_nodes[i]);
679 for(j = 0; j < 2; ++j) {
683 assert(! (reg->type & arch_register_type_ignore));
684 arch_set_irn_register(aenv, nodes[j], reg);
685 (void) pset_hinsert_ptr(alloc_env->pre_colored, nodes[j]);
686 DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", nodes[j], reg->name));
690 /* Allocate the non-constrained Projs of the Perm. */
692 bitset_clear_all(bs);
694 /* Put the colors of all Projs in a bitset. */
695 foreach_out_edge(perm, edge) {
696 ir_node *proj = get_edge_src_irn(edge);
697 const arch_register_t *reg = arch_get_irn_register(aenv, proj);
700 bitset_set(bs, reg->index);
703 /* Assign the not yet assigned Projs of the Perm a suitable color. */
704 foreach_out_edge(perm, edge) {
705 ir_node *proj = get_edge_src_irn(edge);
706 const arch_register_t *reg = arch_get_irn_register(aenv, proj);
708 DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "<none>"));
711 col = get_next_free_reg(alloc_env, bs);
712 reg = arch_register_for_index(env->cls, col);
713 bitset_set(bs, reg->index);
714 arch_set_irn_register(aenv, proj, reg);
715 pset_insert_ptr(alloc_env->pre_colored, proj);
716 DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name));
722 //hungarian_free(bp);
723 pmap_destroy(partners);
726 obstack_free(env->obst, base);
731 * Handle constraint nodes in each basic block.
732 * handle_constraints() inserts Perm nodes which perm
733 * over all values live at the constrained node right in front
734 * of the constrained node. These Perms signal a constrained node.
735 * For further comments, refer to handle_constraints().
737 static void constraints(ir_node *bl, void *data)
739 be_chordal_alloc_env_t *env = data;
742 Start silent in the start block.
743 The silence remains until the first barrier is seen.
744 Each other block is begun loud.
746 int silent = bl == get_irg_start_block(get_irn_irg(bl));
750 If the block is the start block search the barrier and
751 start handling constraints from there.
754 for(irn = sched_first(bl); !sched_is_end(irn);) {
755 irn = handle_constraints(env, irn, &silent);
760 * Annotate the register pressure to the nodes and compute
761 * the liveness intervals.
762 * @param block The block to do it for.
763 * @param env_ptr The environment.
765 static void pressure(ir_node *block, void *env_ptr)
767 /* Convenience macro for a def */
768 #define border_def(irn, step, real) \
769 border_add(env, head, irn, step, pressure--, 1, real)
771 /* Convenience macro for a use */
772 #define border_use(irn, step, real) \
773 border_add(env, head, irn, step, ++pressure, 0, real)
775 be_chordal_alloc_env_t *alloc_env = env_ptr;
776 be_chordal_env_t *env = alloc_env->chordal_env;
777 bitset_t *live = alloc_env->live;
779 be_lv_t *lv = env->birg->lv;
784 unsigned pressure = 0;
785 struct list_head *head;
787 DBG((dbg, LEVEL_1, "Computing pressure in block %+F\n", block));
788 bitset_clear_all(live);
790 /* Set up the border list in the block info */
791 head = obstack_alloc(env->obst, sizeof(*head));
792 INIT_LIST_HEAD(head);
793 assert(pmap_get(env->border_heads, block) == NULL);
794 pmap_insert(env->border_heads, block, head);
797 * Make final uses of all values live out of the block.
798 * They are necessary to build up real intervals.
800 be_lv_foreach(lv, block, be_lv_state_end, i) {
801 ir_node *irn = be_lv_get_irn(lv, block, i);
802 if(has_reg_class(env, irn)) {
803 DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_idx(irn)));
804 bitset_set(live, get_irn_idx(irn));
805 border_use(irn, step, 0);
811 * Determine the last uses of a value inside the block, since they are
812 * relevant for the interval borders.
814 sched_foreach_reverse(block, irn) {
815 DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure));
816 DBG((dbg, LEVEL_2, "\tlive: %B\n", live));
818 #ifndef SCHEDULE_PROJS
819 if (get_irn_mode(irn) == mode_T) {
820 const ir_edge_t *edge;
822 foreach_out_edge(irn, edge) {
823 ir_node *proj = get_edge_src_irn(edge);
826 * If the node defines some value, which can put into a
827 * register of the current class, make a border for it.
829 if(has_reg_class(env, proj)) {
830 int nr = get_irn_idx(proj);
832 bitset_clear(live, nr);
833 border_def(proj, step, 1);
839 * If the node defines some value, which can put into a
840 * register of the current class, make a border for it.
842 if(has_reg_class(env, irn)) {
843 int nr = get_irn_idx(irn);
845 bitset_clear(live, nr);
846 border_def(irn, step, 1);
850 * If the node is no phi node we can examine the uses.
853 for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
854 ir_node *op = get_irn_n(irn, i);
856 if(has_reg_class(env, op)) {
857 int nr = get_irn_idx(op);
858 const char *msg = "-";
860 if(!bitset_is_set(live, nr)) {
861 border_use(op, step, 1);
862 bitset_set(live, nr);
866 DBG((dbg, LEVEL_4, "\t\t%s pos: %d, use: %+F\n", msg, i, op));
873 bitset_foreach(live, elm) {
874 ir_node *irn = get_idx_irn(env->irg, elm);
875 if (be_is_live_in(lv, block, irn))
876 border_def(irn, step, 0);
880 static void assign(ir_node *block, void *env_ptr)
882 be_chordal_alloc_env_t *alloc_env = env_ptr;
883 be_chordal_env_t *env = alloc_env->chordal_env;
884 bitset_t *live = alloc_env->live;
885 bitset_t *colors = alloc_env->colors;
886 bitset_t *in_colors = alloc_env->in_colors;
887 const arch_env_t *arch_env = env->birg->main_env->arch_env;
888 struct list_head *head = get_block_border_head(env, block);
889 be_lv_t *lv = env->birg->lv;
890 pset *live_in = be_lv_pset_put_in(lv, block, pset_new_ptr_default());
895 bitset_clear_all(colors);
896 bitset_clear_all(live);
897 bitset_clear_all(in_colors);
899 DBG((dbg, LEVEL_4, "Assigning colors for block %+F\n", block));
900 DBG((dbg, LEVEL_4, "\tusedef chain for block\n"));
901 list_for_each_entry(border_t, b, head, list) {
902 DBG((dbg, LEVEL_4, "\t%s %+F/%d\n", b->is_def ? "def" : "use",
903 b->irn, get_irn_idx(b->irn)));
907 * Add initial defs for all values live in.
908 * Since their colors have already been assigned (The dominators were
909 * allocated before), we have to mark their colors as used also.
911 foreach_pset(live_in, irn) {
912 if(has_reg_class(env, irn)) {
913 const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
916 assert(reg && "Node must have been assigned a register");
917 col = arch_register_get_index(reg);
919 DBG((dbg, LEVEL_4, "%+F has reg %s\n", irn, reg->name));
921 /* Mark the color of the live in value as used. */
922 bitset_set(colors, col);
923 bitset_set(in_colors, col);
925 /* Mark the value live in. */
926 bitset_set(live, get_irn_idx(irn));
931 * Mind that the sequence of defs from back to front defines a perfect
932 * elimination order. So, coloring the definitions from first to last
935 list_for_each_entry_reverse(border_t, b, head, list) {
936 ir_node *irn = b->irn;
937 int nr = get_irn_idx(irn);
938 int ignore = arch_irn_is(arch_env, irn, ignore);
941 * Assign a color, if it is a local def. Global defs already have a
944 if(b->is_def && !be_is_live_in(lv, block, irn)) {
945 const arch_register_t *reg;
948 if(ignore || pset_find_ptr(alloc_env->pre_colored, irn)) {
949 reg = arch_get_irn_register(arch_env, irn);
951 assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
953 col = get_next_free_reg(alloc_env, colors);
954 reg = arch_register_for_index(env->cls, col);
955 assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet");
956 assert(!arch_register_type_is(reg, ignore) && "Must not assign ignore register");
959 bitset_set(colors, col);
960 arch_set_irn_register(arch_env, irn, reg);
962 DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", arch_register_get_name(reg), col, irn));
964 assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
965 bitset_set(live, nr);
968 /* Clear the color upon a use. */
969 else if(!b->is_def) {
970 const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
973 assert(reg && "Register must have been assigned");
975 col = arch_register_get_index(reg);
977 if(!arch_register_type_is(reg, ignore)) {
978 assert(bitset_is_set(live, nr) && "Cannot have a non live use");
982 bitset_clear(colors, col);
983 bitset_clear(live, nr);
993 static void assign_new(ir_node *block, be_chordal_alloc_env_t *alloc_env, bitset_t *live_end_dom)
995 be_chordal_env_t *env = alloc_env->chordal_env;
996 bitset_t *colors = alloc_env->colors;
997 bitset_t *in_colors = alloc_env->in_colors;
998 bitset_t *live = bitset_irg_malloc(env->irg);
999 const arch_env_t *arch_env = env->birg->main_env->arch_env;
1000 be_irg_t *birg = env->birg;
1005 bitset_clear_all(colors);
1006 bitset_clear_all(in_colors);
1009 * All variables which are live in to this block are live out
1010 * of the immediate dominator thanks to SSA properties. As we
1011 * have already visited the immediate dominator, we know these
1012 * variables. The only tjing left is to check wheather they are live
1013 * in here (they also could be phi arguments to some ohi not
1014 * in this block, hence we have to check).
1016 bitset_foreach (live_end_dom, elm) {
1017 ir_node *irn = get_idx_irn(env->irg, elm);
1018 if (be_is_live_in(birg->lv, block, irn)) {
1019 const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
1022 assert(be_is_live_in(env->birg->lv, block, irn));
1023 assert(reg && "Node must have been assigned a register");
1024 col = arch_register_get_index(reg);
1026 DBG((dbg, LEVEL_4, "%+F has reg %s\n", irn, reg->name));
1028 /* Mark the color of the live in value as used. */
1029 bitset_set(colors, col);
1030 bitset_set(in_colors, col);
1032 /* Mark the value live in. */
1033 bitset_set(live, elm);
1037 assert(!be_is_live_in(env->birg->lv, block, irn));
1042 * Mind that the sequence of defs from back to front defines a perfect
1043 * elimination order. So, coloring the definitions from first to last
1046 sched_foreach (block, irn) {
1047 int nr = get_irn_idx(irn);
1048 int ignore = arch_irn_is(arch_env, irn, ignore);
1050 /* Clear the color upon a last use. */
1053 for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
1054 ir_node *op = get_irn_n(irn, i);
1057 * If the reg class matches and the operand is not live after
1058 * the node, irn is a last use of op and the register can
1061 if (has_reg_class(env, op)) {
1062 if (!be_lv_chk_after_irn(birg, op, irn)) {
1063 const arch_register_t *reg = arch_get_irn_register(arch_env, op);
1066 assert(reg && "Register must have been assigned");
1067 col = arch_register_get_index(reg);
1068 bitset_clear(colors, col);
1069 bitset_clear(live, nr);
1075 if (has_reg_class(env, irn)) {
1076 const arch_register_t *reg;
1080 * Assign a color, if it is a local def. Global defs already have a
1083 if(ignore || pset_find_ptr(alloc_env->pre_colored, irn)) {
1084 reg = arch_get_irn_register(arch_env, irn);
1086 assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
1088 col = get_next_free_reg(alloc_env, colors);
1089 reg = arch_register_for_index(env->cls, col);
1090 assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet");
1091 assert(!arch_register_type_is(reg, ignore) && "Must not assign ignore register");
1094 bitset_set(colors, col);
1095 arch_set_irn_register(arch_env, irn, reg);
1097 DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", arch_register_get_name(reg), col, irn));
1099 assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
1100 bitset_set(live, nr);
1105 dominates_for_each (block, irn) {
1106 assign_new(irn, alloc_env, live);
1112 void be_ra_chordal_color(be_chordal_env_t *chordal_env)
1114 be_chordal_alloc_env_t env;
1117 be_irg_t *birg = chordal_env->birg;
1118 const arch_register_class_t *cls = chordal_env->cls;
1120 int colors_n = arch_register_class_n_regs(cls);
1121 ir_graph *irg = chordal_env->irg;
1122 int allocatable_regs = colors_n - be_put_ignore_regs(birg, cls, NULL);
1124 /* some special classes contain only ignore regs, no work to be done */
1125 if(allocatable_regs == 0)
1128 be_assure_dom_front(birg);
1129 lv = be_assure_liveness(birg);
1130 be_liveness_assure_sets(lv);
1131 be_liveness_assure_chk(lv);
1135 env.chordal_env = chordal_env;
1136 env.colors_n = colors_n;
1137 env.colors = bitset_alloca(colors_n);
1138 env.tmp_colors = bitset_alloca(colors_n);
1139 env.in_colors = bitset_alloca(colors_n);
1140 env.pre_colored = pset_new_ptr_default();
1142 /* Handle register targeting constraints */
1143 dom_tree_walk_irg(irg, constraints, NULL, &env);
1145 if(chordal_env->opts->dump_flags & BE_CH_DUMP_CONSTR) {
1146 snprintf(buf, sizeof(buf), "-%s-constr", chordal_env->cls->name);
1147 be_dump(chordal_env->irg, buf, dump_ir_block_graph_sched);
1150 env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg));
1152 /* First, determine the pressure */
1153 dom_tree_walk_irg(irg, pressure, NULL, &env);
1155 /* Assign the colors */
1156 #ifdef NEW_STYLE_ASSIGN
1157 assign_new(get_irg_start_block(irg), &env, env.live);
1159 dom_tree_walk_irg(irg, assign, NULL, &env);
1162 if(chordal_env->opts->dump_flags & BE_CH_DUMP_TREE_INTV) {
1164 ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", chordal_env->cls->name, irg);
1165 plotter = new_plotter_ps(buf);
1166 draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter);
1167 plotter_free(plotter);
1170 bitset_free(env.live);
1171 del_pset(env.pre_colored);
1174 void be_init_chordal(void)
1176 FIRM_DBG_REGISTER(dbg, "firm.be.chordal");
1179 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal);