2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Chordal register allocation.
23 * @author Sebastian Hack
35 #include "raw_bitset.h"
37 #include "bipartite.h"
38 #include "hungarian.h"
41 #include "irgraph_t.h"
42 #include "irprintf_t.h"
60 #include "bestatevent.h"
62 #include "beintlive_t.h"
64 #include "bechordal_t.h"
65 #include "bechordal_draw.h"
68 #include "bechordal_common.h"
70 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
74 #define DUMP_INTERVALS
76 typedef struct _be_chordal_alloc_env_t {
77 be_chordal_env_t *chordal_env;
79 pset *pre_colored; /**< Set of precolored nodes. */
80 bitset_t *live; /**< A liveness bitset. */
81 bitset_t *tmp_colors; /**< An auxiliary bitset which is as long as the number of colors in the class. */
82 bitset_t *colors; /**< The color mask. */
83 bitset_t *in_colors; /**< Colors used by live in values. */
84 int colors_n; /**< The number of colors. */
85 } be_chordal_alloc_env_t;
88 static void check_border_list(struct list_head *head)
91 list_for_each_entry(border_t, x, head, list) {
92 assert(x->magic == BORDER_FOURCC);
96 static void check_heads(be_chordal_env_t *env)
99 for (ent = pmap_first(env->border_heads); ent; ent = pmap_next(env->border_heads)) {
100 /* ir_printf("checking border list of block %+F\n", ent->key); */
101 check_border_list(ent->value);
107 // * Add an interval border to the list of a block's list
108 // * of interval border.
109 // * @note You always have to create the use before the def.
110 // * @param env The environment.
111 // * @param head The list head to enqueue the borders.
112 // * @param irn The node (value) the border belongs to.
113 // * @param pressure The pressure at this point in time.
114 // * @param step A time step for the border.
115 // * @param is_def Is the border a use or a def.
116 // * @return The created border.
118 //static inline border_t *border_add(be_chordal_env_t *env, struct list_head *head,
119 // ir_node *irn, unsigned step, unsigned pressure,
120 // unsigned is_def, unsigned is_real)
127 // b = OALLOC(env->obst, border_t);
129 // /* also allocate the def and tie it to the use. */
130 // def = OALLOCZ(env->obst, border_t);
131 // b->other_end = def;
132 // def->other_end = b;
135 // * Set the link field of the irn to the def.
136 // * This strongly relies on the fact, that the use is always
137 // * made before the def.
139 // set_irn_link(irn, def);
141 // DEBUG_ONLY(b->magic = BORDER_FOURCC);
142 // DEBUG_ONLY(def->magic = BORDER_FOURCC);
145 // * If the def is encountered, the use was made and so was the
146 // * the def node (see the code above). It was placed into the
147 // * link field of the irn, so we can get it there.
149 // b = get_irn_link(irn);
151 // DEBUG_ONLY(assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered"));
154 // b->pressure = pressure;
155 // b->is_def = is_def;
156 // b->is_real = is_real;
159 // list_add_tail(&b->list, head);
160 // DBG((dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step));
167 // * Check, if an irn is of the register class currently under processing.
168 // * @param env The chordal environment.
169 // * @param irn The node.
170 // * @return 1, if the node is of that register class, 0 if not.
172 //static inline int has_reg_class(const be_chordal_env_t *env, const ir_node *irn)
174 // return arch_irn_consider_in_reg_alloc(env->cls, irn);
177 static int get_next_free_reg(const be_chordal_alloc_env_t *alloc_env, bitset_t *colors)
179 bitset_t *tmp = alloc_env->tmp_colors;
180 bitset_copy(tmp, colors);
181 bitset_or(tmp, alloc_env->chordal_env->ignore_colors);
182 return bitset_next_clear(tmp, 0);
185 static bitset_t *get_decisive_partner_regs(bitset_t *bs, const be_operand_t *o1, const be_operand_t *o2)
190 bitset_copy(bs, o2->regs);
195 bitset_copy(bs, o1->regs);
199 assert(o1->req->cls == o2->req->cls || ! o1->req->cls || ! o2->req->cls);
201 if (bitset_contains(o1->regs, o2->regs)) {
202 bitset_copy(bs, o1->regs);
203 } else if (bitset_contains(o2->regs, o1->regs)) {
204 bitset_copy(bs, o2->regs);
212 static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t *insn)
214 const be_chordal_env_t *env = alloc_env->chordal_env;
215 bitset_t *bs = bitset_alloca(env->cls->n_regs);
220 * For each out operand, try to find an in operand which can be assigned the
221 * same register as the out operand.
223 for (j = 0; j < insn->use_start; ++j) {
225 int smallest_n_regs = 2 * env->cls->n_regs + 1;
226 be_operand_t *out_op = &insn->ops[j];
228 /* Try to find an in operand which has ... */
229 for (i = insn->use_start; i < insn->n_ops; ++i) {
231 const be_operand_t *op = &insn->ops[i];
233 if (op->partner != NULL)
235 if (be_values_interfere(env->birg->lv, op->irn, op->carrier))
238 bitset_clear_all(bs);
239 bitset_copy(bs, op->regs);
240 bitset_and(bs, out_op->regs);
241 n_total = bitset_popcnt(op->regs) + bitset_popcnt(out_op->regs);
243 if (!bitset_is_empty(bs) && n_total < smallest_n_regs) {
245 smallest_n_regs = n_total;
250 be_operand_t *partner = &insn->ops[smallest];
251 for (i = insn->use_start; i < insn->n_ops; ++i) {
252 if (insn->ops[i].carrier == partner->carrier)
253 insn->ops[i].partner = out_op;
256 out_op->partner = partner;
257 partner->partner = out_op;
262 static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env,
263 ir_node *irn, int *silent)
267 ir_node **alloc_nodes;
268 //hungarian_problem_t *bp;
273 const ir_edge_t *edge;
274 ir_node *perm = NULL;
275 //int match_res, cost;
276 be_chordal_env_t *env = alloc_env->chordal_env;
277 void *base = obstack_base(env->obst);
278 be_insn_t *insn = chordal_scan_insn(env, irn);
279 ir_node *res = insn->next_insn;
280 int be_silent = *silent;
283 if (insn->pre_colored) {
285 for (i = 0; i < insn->use_start; ++i)
286 pset_insert_ptr(alloc_env->pre_colored, insn->ops[i].carrier);
290 * If the current node is a barrier toggle the silent flag.
291 * If we are in the start block, we are ought to be silent at the beginning,
292 * so the toggling activates the constraint handling but skips the barrier.
293 * If we are in the end block we handle the in requirements of the barrier
294 * and set the rest to silent.
296 if (be_is_Barrier(irn))
303 * Perms inserted before the constraint handling phase are considered to be
304 * correctly precolored. These Perms arise during the ABI handling phase.
306 if (!insn->has_constraints)
309 n_regs = env->cls->n_regs;
310 bs = bitset_alloca(n_regs);
311 alloc_nodes = ALLOCAN(ir_node*, n_regs);
312 //bp = hungarian_new(n_regs, n_regs, 2, HUNGARIAN_MATCH_PERFECT);
313 bp = bipartite_new(n_regs, n_regs);
314 assignment = ALLOCAN(int, n_regs);
315 partners = pmap_create();
318 * prepare the constraint handling of this node.
319 * Perms are constructed and Copies are created for constrained values
320 * interfering with the instruction.
322 perm = pre_process_constraints(alloc_env->chordal_env, &insn);
324 /* find suitable in operands to the out operands of the node. */
325 pair_up_operands(alloc_env, insn);
328 * look at the in/out operands and add each operand (and its possible partner)
329 * to a bipartite graph (left: nodes with partners, right: admissible colors).
331 for (i = 0, n_alloc = 0; i < insn->n_ops; ++i) {
332 be_operand_t *op = &insn->ops[i];
335 * If the operand has no partner or the partner has not been marked
336 * for allocation, determine the admissible registers and mark it
337 * for allocation by associating the node and its partner with the
338 * set of admissible registers via a bipartite graph.
340 if (!op->partner || !pmap_contains(partners, op->partner->carrier)) {
341 ir_node *partner = op->partner ? op->partner->carrier : NULL;
344 pmap_insert(partners, op->carrier, partner);
346 pmap_insert(partners, partner, op->carrier);
348 /* don't insert a node twice */
349 for (i = 0; i < n_alloc; ++i) {
350 if (alloc_nodes[i] == op->carrier) {
357 alloc_nodes[n_alloc] = op->carrier;
359 DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier,
362 bitset_clear_all(bs);
363 get_decisive_partner_regs(bs, op, op->partner);
365 DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier,
368 bitset_foreach(bs, col) {
369 //hungarian_add(bp, n_alloc, col, 1);
370 bipartite_add(bp, n_alloc, col);
378 * Put all nodes which live through the constrained instruction also to the
379 * allocation bipartite graph. They are considered unconstrained.
382 foreach_out_edge(perm, edge) {
384 ir_node *proj = get_edge_src_irn(edge);
386 assert(is_Proj(proj));
388 if (!be_values_interfere(env->birg->lv, proj, irn)
389 || pmap_contains(partners, proj))
392 /* don't insert a node twice */
393 for (i = 0; i < n_alloc; ++i) {
394 if (alloc_nodes[i] == proj) {
402 assert(n_alloc < n_regs);
404 alloc_nodes[n_alloc] = proj;
405 pmap_insert(partners, proj, NULL);
407 bitset_clear_all(bs);
408 arch_put_non_ignore_regs(env->cls, bs);
409 bitset_andnot(bs, env->ignore_colors);
410 bitset_foreach(bs, col) {
411 //hungarian_add(bp, n_alloc, col, 1);
412 bipartite_add(bp, n_alloc, col);
419 /* Compute a valid register allocation. */
421 hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
422 match_res = hungarian_solve(bp, assignment, &cost, 1);
423 assert(match_res == 0 && "matching failed");
425 bipartite_matching(bp, assignment);
428 /* Assign colors obtained from the matching. */
429 for (i = 0; i < n_alloc; ++i) {
430 const arch_register_t *reg;
433 assert(assignment[i] >= 0 && "there must have been a register assigned");
434 reg = arch_register_for_index(env->cls, assignment[i]);
435 assert(! (reg->type & arch_register_type_ignore));
437 irn = alloc_nodes[i];
439 arch_set_irn_register(irn, reg);
440 (void) pset_hinsert_ptr(alloc_env->pre_colored, irn);
441 DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", irn, reg->name));
444 irn = pmap_get(partners, alloc_nodes[i]);
446 arch_set_irn_register(irn, reg);
447 (void) pset_hinsert_ptr(alloc_env->pre_colored, irn);
448 DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", irn, reg->name));
452 /* Allocate the non-constrained Projs of the Perm. */
454 bitset_clear_all(bs);
456 /* Put the colors of all Projs in a bitset. */
457 foreach_out_edge(perm, edge) {
458 ir_node *proj = get_edge_src_irn(edge);
459 const arch_register_t *reg = arch_get_irn_register(proj);
462 bitset_set(bs, reg->index);
465 /* Assign the not yet assigned Projs of the Perm a suitable color. */
466 foreach_out_edge(perm, edge) {
467 ir_node *proj = get_edge_src_irn(edge);
468 const arch_register_t *reg = arch_get_irn_register(proj);
470 DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "<none>"));
473 col = get_next_free_reg(alloc_env, bs);
474 reg = arch_register_for_index(env->cls, col);
475 bitset_set(bs, reg->index);
476 arch_set_irn_register(proj, reg);
477 pset_insert_ptr(alloc_env->pre_colored, proj);
478 DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name));
484 //hungarian_free(bp);
485 pmap_destroy(partners);
488 obstack_free(env->obst, base);
493 * Handle constraint nodes in each basic block.
494 * handle_constraints() inserts Perm nodes which perm
495 * over all values live at the constrained node right in front
496 * of the constrained node. These Perms signal a constrained node.
497 * For further comments, refer to handle_constraints().
499 static void constraints(ir_node *bl, void *data)
502 * Start silent in the start block.
503 * The silence remains until the first barrier is seen.
504 * Each other block is begun loud.
506 int silent = bl == get_irg_start_block(get_irn_irg(bl));
507 be_chordal_alloc_env_t *env = data;
511 * If the block is the start block search the barrier and
512 * start handling constraints from there.
514 for (irn = sched_first(bl); !sched_is_end(irn);) {
515 irn = handle_constraints(env, irn, &silent);
519 static void assign(ir_node *block, void *env_ptr)
521 be_chordal_alloc_env_t *alloc_env = env_ptr;
522 be_chordal_env_t *env = alloc_env->chordal_env;
523 bitset_t *live = alloc_env->live;
524 bitset_t *colors = alloc_env->colors;
525 bitset_t *in_colors = alloc_env->in_colors;
526 struct list_head *head = get_block_border_head(env, block);
527 be_lv_t *lv = env->birg->lv;
533 bitset_clear_all(colors);
534 bitset_clear_all(live);
535 bitset_clear_all(in_colors);
537 DBG((dbg, LEVEL_4, "Assigning colors for block %+F\n", block));
538 DBG((dbg, LEVEL_4, "\tusedef chain for block\n"));
539 list_for_each_entry(border_t, b, head, list) {
540 DBG((dbg, LEVEL_4, "\t%s %+F/%d\n", b->is_def ? "def" : "use",
541 b->irn, get_irn_idx(b->irn)));
545 * Add initial defs for all values live in.
546 * Since their colors have already been assigned (The dominators were
547 * allocated before), we have to mark their colors as used also.
549 be_lv_foreach(lv, block, be_lv_state_in, idx) {
550 irn = be_lv_get_irn(lv, block, idx);
551 if (has_reg_class(env, irn)) {
552 const arch_register_t *reg = arch_get_irn_register(irn);
555 assert(reg && "Node must have been assigned a register");
556 col = arch_register_get_index(reg);
558 DBG((dbg, LEVEL_4, "%+F has reg %s\n", irn, reg->name));
560 /* Mark the color of the live in value as used. */
561 bitset_set(colors, col);
562 bitset_set(in_colors, col);
564 /* Mark the value live in. */
565 bitset_set(live, get_irn_idx(irn));
570 * Mind that the sequence of defs from back to front defines a perfect
571 * elimination order. So, coloring the definitions from first to last
574 list_for_each_entry_reverse(border_t, b, head, list) {
575 ir_node *irn = b->irn;
576 int nr = get_irn_idx(irn);
577 int ignore = arch_irn_is_ignore(irn);
580 * Assign a color, if it is a local def. Global defs already have a
583 if (b->is_def && !be_is_live_in(lv, block, irn)) {
584 const arch_register_t *reg;
587 if (ignore || pset_find_ptr(alloc_env->pre_colored, irn)) {
588 reg = arch_get_irn_register(irn);
590 assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
592 col = get_next_free_reg(alloc_env, colors);
593 reg = arch_register_for_index(env->cls, col);
594 assert(arch_get_irn_register(irn) == NULL && "This node must not have been assigned a register yet");
595 assert(!arch_register_type_is(reg, ignore) && "Must not assign ignore register");
598 bitset_set(colors, col);
599 arch_set_irn_register(irn, reg);
601 DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", arch_register_get_name(reg), col, irn));
603 assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
604 bitset_set(live, nr);
605 } else if (!b->is_def) {
606 /* Clear the color upon a use. */
607 const arch_register_t *reg = arch_get_irn_register(irn);
610 assert(reg && "Register must have been assigned");
612 col = arch_register_get_index(reg);
614 if (!arch_register_type_is(reg, ignore)) {
615 assert(bitset_is_set(live, nr) && "Cannot have a non live use");
619 bitset_clear(colors, col);
620 bitset_clear(live, nr);
625 void be_ra_chordal_color(be_chordal_env_t *chordal_env)
627 be_chordal_alloc_env_t env;
630 be_irg_t *birg = chordal_env->birg;
631 const arch_register_class_t *cls = chordal_env->cls;
633 int colors_n = arch_register_class_n_regs(cls);
634 ir_graph *irg = chordal_env->irg;
636 lv = be_assure_liveness(birg);
637 be_liveness_assure_sets(lv);
638 be_liveness_assure_chk(lv);
642 env.chordal_env = chordal_env;
643 env.colors_n = colors_n;
644 env.colors = bitset_alloca(colors_n);
645 env.tmp_colors = bitset_alloca(colors_n);
646 env.in_colors = bitset_alloca(colors_n);
647 env.pre_colored = pset_new_ptr_default();
649 BE_TIMER_PUSH(t_constr);
651 /* Handle register targeting constraints */
652 dom_tree_walk_irg(irg, constraints, NULL, &env);
654 if (chordal_env->opts->dump_flags & BE_CH_DUMP_CONSTR) {
655 snprintf(buf, sizeof(buf), "-%s-constr", chordal_env->cls->name);
656 be_dump(chordal_env->irg, buf, dump_ir_block_graph_sched);
659 BE_TIMER_POP(t_constr);
661 env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg));
663 /* First, determine the pressure */
664 dom_tree_walk_irg(irg, pressure, NULL, env.chordal_env);
666 /* Assign the colors */
667 dom_tree_walk_irg(irg, assign, NULL, &env);
669 if (chordal_env->opts->dump_flags & BE_CH_DUMP_TREE_INTV) {
671 ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", chordal_env->cls->name, irg);
672 plotter = new_plotter_ps(buf);
673 draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter);
674 plotter_free(plotter);
677 bitset_free(env.live);
678 del_pset(env.pre_colored);
681 void be_init_chordal(void)
683 FIRM_DBG_REGISTER(dbg, "firm.be.chordal");
685 static be_ra_chordal_coloring_t coloring = {
689 be_register_chordal_coloring("default", &coloring);
692 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal);