2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Chordal register allocation.
23 * @author Sebastian Hack
34 #include "raw_bitset.h"
36 #include "bipartite.h"
37 #include "hungarian.h"
40 #include "irgraph_t.h"
41 #include "irprintf_t.h"
58 #include "bestatevent.h"
60 #include "beintlive_t.h"
62 #include "bechordal_t.h"
63 #include "bechordal_draw.h"
66 #include "bechordal_common.h"
68 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
70 #define DUMP_INTERVALS
72 typedef struct be_chordal_alloc_env_t {
73 be_chordal_env_t *chordal_env;
75 pset *pre_colored; /**< Set of precolored nodes. */
76 bitset_t *live; /**< A liveness bitset. */
77 bitset_t *tmp_colors; /**< An auxiliary bitset which is as long as the number of colors in the class. */
78 bitset_t *colors; /**< The color mask. */
79 bitset_t *in_colors; /**< Colors used by live in values. */
80 int colors_n; /**< The number of colors. */
81 } be_chordal_alloc_env_t;
83 static int get_next_free_reg(const be_chordal_alloc_env_t *alloc_env, bitset_t *colors)
85 bitset_t *tmp = alloc_env->tmp_colors;
86 bitset_copy(tmp, colors);
88 bitset_and(tmp, alloc_env->chordal_env->allocatable_regs);
89 return bitset_next_set(tmp, 0);
92 static bitset_t *get_decisive_partner_regs(bitset_t *bs, const be_operand_t *o1, const be_operand_t *o2)
97 bitset_copy(bs, o2->regs);
102 bitset_copy(bs, o1->regs);
106 assert(o1->req->cls == o2->req->cls || ! o1->req->cls || ! o2->req->cls);
108 if (bitset_contains(o1->regs, o2->regs)) {
109 bitset_copy(bs, o1->regs);
110 } else if (bitset_contains(o2->regs, o1->regs)) {
111 bitset_copy(bs, o2->regs);
119 static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t *insn)
121 const be_chordal_env_t *env = alloc_env->chordal_env;
122 bitset_t *bs = bitset_alloca(env->cls->n_regs);
127 * For each out operand, try to find an in operand which can be assigned the
128 * same register as the out operand.
130 for (j = 0; j < insn->use_start; ++j) {
131 be_operand_t *smallest = NULL;
132 int smallest_n_regs = env->cls->n_regs + 1;
133 be_operand_t *out_op = &insn->ops[j];
135 /* Try to find an in operand which has ... */
136 for (i = insn->use_start; i < insn->n_ops; ++i) {
138 be_operand_t *op = &insn->ops[i];
141 if (op->partner != NULL)
143 lv = be_get_irg_liveness(env->irg);
144 if (be_values_interfere(lv, op->irn, op->carrier))
147 bitset_copy(bs, op->regs);
148 bitset_and(bs, out_op->regs);
149 n_total = bitset_popcount(op->regs);
151 if (!bitset_is_empty(bs) && n_total < smallest_n_regs) {
153 smallest_n_regs = n_total;
157 if (smallest != NULL) {
158 for (i = insn->use_start; i < insn->n_ops; ++i) {
159 if (insn->ops[i].carrier == smallest->carrier)
160 insn->ops[i].partner = out_op;
163 out_op->partner = smallest;
164 smallest->partner = out_op;
169 static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env,
174 ir_node **alloc_nodes;
175 //hungarian_problem_t *bp;
180 ir_node *perm = NULL;
181 //int match_res, cost;
182 be_chordal_env_t *env = alloc_env->chordal_env;
183 void *base = obstack_base(env->obst);
184 be_insn_t *insn = chordal_scan_insn(env, irn);
185 ir_node *res = insn->next_insn;
188 if (insn->pre_colored) {
190 for (i = 0; i < insn->use_start; ++i)
191 pset_insert_ptr(alloc_env->pre_colored, insn->ops[i].carrier);
195 * Perms inserted before the constraint handling phase are considered to be
196 * correctly precolored. These Perms arise during the ABI handling phase.
198 if (!insn->has_constraints || is_Phi(irn))
201 n_regs = env->cls->n_regs;
202 bs = bitset_alloca(n_regs);
203 alloc_nodes = ALLOCAN(ir_node*, n_regs);
204 //bp = hungarian_new(n_regs, n_regs, 2, HUNGARIAN_MATCH_PERFECT);
205 bp = bipartite_new(n_regs, n_regs);
206 assignment = ALLOCAN(int, n_regs);
207 partners = pmap_create();
210 * prepare the constraint handling of this node.
211 * Perms are constructed and Copies are created for constrained values
212 * interfering with the instruction.
214 perm = pre_process_constraints(alloc_env->chordal_env, &insn);
216 /* find suitable in operands to the out operands of the node. */
217 pair_up_operands(alloc_env, insn);
220 * look at the in/out operands and add each operand (and its possible partner)
221 * to a bipartite graph (left: nodes with partners, right: admissible colors).
223 for (i = 0, n_alloc = 0; i < insn->n_ops; ++i) {
224 be_operand_t *op = &insn->ops[i];
227 * If the operand has no partner or the partner has not been marked
228 * for allocation, determine the admissible registers and mark it
229 * for allocation by associating the node and its partner with the
230 * set of admissible registers via a bipartite graph.
232 if (!op->partner || !pmap_contains(partners, op->partner->carrier)) {
233 ir_node *partner = op->partner ? op->partner->carrier : NULL;
236 pmap_insert(partners, op->carrier, partner);
238 pmap_insert(partners, partner, op->carrier);
240 /* don't insert a node twice */
241 for (i = 0; i < n_alloc; ++i) {
242 if (alloc_nodes[i] == op->carrier) {
249 alloc_nodes[n_alloc] = op->carrier;
251 DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier,
254 bitset_clear_all(bs);
255 get_decisive_partner_regs(bs, op, op->partner);
257 DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier,
260 bitset_foreach(bs, col) {
261 //hungarian_add(bp, n_alloc, col, 1);
262 bipartite_add(bp, n_alloc, col);
270 * Put all nodes which live through the constrained instruction also to the
271 * allocation bipartite graph. They are considered unconstrained.
274 foreach_out_edge(perm, edge) {
276 ir_node *proj = get_edge_src_irn(edge);
277 be_lv_t *lv = be_get_irg_liveness(env->irg);
279 assert(is_Proj(proj));
281 if (!be_values_interfere(lv, proj, irn)
282 || pmap_contains(partners, proj))
285 /* don't insert a node twice */
286 for (i = 0; i < n_alloc; ++i) {
287 if (alloc_nodes[i] == proj) {
295 assert(n_alloc < n_regs);
297 alloc_nodes[n_alloc] = proj;
298 pmap_insert(partners, proj, NULL);
300 bitset_foreach(env->allocatable_regs, col) {
301 //hungarian_add(bp, n_alloc, col, 1);
302 bipartite_add(bp, n_alloc, col);
309 /* Compute a valid register allocation. */
311 hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
312 match_res = hungarian_solve(bp, assignment, &cost, 1);
313 assert(match_res == 0 && "matching failed");
315 /*bipartite_dump_f(stderr, bp);*/
316 bipartite_matching(bp, assignment);
319 /* Assign colors obtained from the matching. */
320 for (i = 0; i < n_alloc; ++i) {
321 const arch_register_t *reg;
324 assert(assignment[i] >= 0 && "there must have been a register assigned (node not register pressure faithful?)");
325 reg = arch_register_for_index(env->cls, assignment[i]);
327 irn = alloc_nodes[i];
329 arch_set_irn_register(irn, reg);
330 (void) pset_hinsert_ptr(alloc_env->pre_colored, irn);
331 DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", irn, reg->name));
334 irn = pmap_get(ir_node, partners, alloc_nodes[i]);
336 arch_set_irn_register(irn, reg);
337 (void) pset_hinsert_ptr(alloc_env->pre_colored, irn);
338 DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", irn, reg->name));
342 /* Allocate the non-constrained Projs of the Perm. */
344 bitset_clear_all(bs);
346 /* Put the colors of all Projs in a bitset. */
347 foreach_out_edge(perm, edge) {
348 ir_node *proj = get_edge_src_irn(edge);
349 const arch_register_t *reg = arch_get_irn_register(proj);
352 bitset_set(bs, reg->index);
355 /* Assign the not yet assigned Projs of the Perm a suitable color. */
356 foreach_out_edge(perm, edge) {
357 ir_node *proj = get_edge_src_irn(edge);
358 const arch_register_t *reg = arch_get_irn_register(proj);
360 DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "<none>"));
363 col = get_next_free_reg(alloc_env, bs);
364 reg = arch_register_for_index(env->cls, col);
365 bitset_set(bs, reg->index);
366 arch_set_irn_register(proj, reg);
367 pset_insert_ptr(alloc_env->pre_colored, proj);
368 DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name));
374 //hungarian_free(bp);
375 pmap_destroy(partners);
378 obstack_free(env->obst, base);
383 * Handle constraint nodes in each basic block.
384 * handle_constraints() inserts Perm nodes which perm
385 * over all values live at the constrained node right in front
386 * of the constrained node. These Perms signal a constrained node.
387 * For further comments, refer to handle_constraints().
389 static void constraints(ir_node *bl, void *data)
391 be_chordal_alloc_env_t *env = (be_chordal_alloc_env_t*)data;
394 for (irn = sched_first(bl); !sched_is_end(irn);) {
395 irn = handle_constraints(env, irn);
399 static void assign(ir_node *block, void *env_ptr)
401 be_chordal_alloc_env_t *alloc_env = (be_chordal_alloc_env_t*)env_ptr;
402 be_chordal_env_t *env = alloc_env->chordal_env;
403 bitset_t *live = alloc_env->live;
404 bitset_t *colors = alloc_env->colors;
405 bitset_t *in_colors = alloc_env->in_colors;
406 struct list_head *head = get_block_border_head(env, block);
407 be_lv_t *lv = be_get_irg_liveness(env->irg);
413 bitset_clear_all(colors);
414 bitset_clear_all(live);
415 bitset_clear_all(in_colors);
417 DBG((dbg, LEVEL_4, "Assigning colors for block %+F\n", block));
418 DBG((dbg, LEVEL_4, "\tusedef chain for block\n"));
419 list_for_each_entry(border_t, b, head, list) {
420 DBG((dbg, LEVEL_4, "\t%s %+F/%d\n", b->is_def ? "def" : "use",
421 b->irn, get_irn_idx(b->irn)));
425 * Add initial defs for all values live in.
426 * Since their colors have already been assigned (The dominators were
427 * allocated before), we have to mark their colors as used also.
429 be_lv_foreach(lv, block, be_lv_state_in, idx) {
430 irn = be_lv_get_irn(lv, block, idx);
431 if (has_reg_class(env, irn)) {
432 const arch_register_t *reg = arch_get_irn_register(irn);
435 assert(reg && "Node must have been assigned a register");
436 col = arch_register_get_index(reg);
438 DBG((dbg, LEVEL_4, "%+F has reg %s\n", irn, reg->name));
440 /* Mark the color of the live in value as used. */
441 bitset_set(colors, col);
442 bitset_set(in_colors, col);
444 /* Mark the value live in. */
445 bitset_set(live, get_irn_idx(irn));
450 * Mind that the sequence of defs from back to front defines a perfect
451 * elimination order. So, coloring the definitions from first to last
454 list_for_each_entry_reverse(border_t, b, head, list) {
455 ir_node *irn = b->irn;
456 int nr = get_irn_idx(irn);
457 int ignore = arch_irn_is_ignore(irn);
460 * Assign a color, if it is a local def. Global defs already have a
463 if (b->is_def && !be_is_live_in(lv, block, irn)) {
464 const arch_register_t *reg;
467 if (ignore || pset_find_ptr(alloc_env->pre_colored, irn)) {
468 reg = arch_get_irn_register(irn);
470 assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
472 col = get_next_free_reg(alloc_env, colors);
473 reg = arch_register_for_index(env->cls, col);
474 assert(arch_get_irn_register(irn) == NULL && "This node must not have been assigned a register yet");
477 bitset_set(colors, col);
478 arch_set_irn_register(irn, reg);
480 DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", arch_register_get_name(reg), col, irn));
482 assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
483 bitset_set(live, nr);
484 } else if (!b->is_def) {
485 /* Clear the color upon a use. */
486 const arch_register_t *reg = arch_get_irn_register(irn);
489 assert(reg && "Register must have been assigned");
491 col = arch_register_get_index(reg);
493 bitset_clear(colors, col);
494 bitset_clear(live, nr);
499 void be_ra_chordal_color(be_chordal_env_t *chordal_env)
501 be_chordal_alloc_env_t env;
503 const arch_register_class_t *cls = chordal_env->cls;
505 int colors_n = arch_register_class_n_regs(cls);
506 ir_graph *irg = chordal_env->irg;
508 be_assure_live_sets(irg);
511 env.chordal_env = chordal_env;
512 env.colors_n = colors_n;
513 env.colors = bitset_alloca(colors_n);
514 env.tmp_colors = bitset_alloca(colors_n);
515 env.in_colors = bitset_alloca(colors_n);
516 env.pre_colored = pset_new_ptr_default();
518 be_timer_push(T_SPLIT);
520 if (chordal_env->opts->dump_flags & BE_CH_DUMP_SPLIT) {
521 snprintf(buf, sizeof(buf), "%s-split", chordal_env->cls->name);
522 dump_ir_graph(chordal_env->irg, buf);
525 be_timer_pop(T_SPLIT);
527 be_timer_push(T_CONSTR);
529 /* Handle register targeting constraints */
530 dom_tree_walk_irg(irg, constraints, NULL, &env);
532 if (chordal_env->opts->dump_flags & BE_CH_DUMP_CONSTR) {
533 snprintf(buf, sizeof(buf), "%s-constr", chordal_env->cls->name);
534 dump_ir_graph(chordal_env->irg, buf);
537 be_timer_pop(T_CONSTR);
539 env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg));
541 /* First, determine the pressure */
542 dom_tree_walk_irg(irg, create_borders, NULL, env.chordal_env);
544 /* Assign the colors */
545 dom_tree_walk_irg(irg, assign, NULL, &env);
547 if (chordal_env->opts->dump_flags & BE_CH_DUMP_TREE_INTV) {
549 ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", chordal_env->cls->name, irg);
550 plotter = new_plotter_ps(buf);
551 draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter);
552 plotter_free(plotter);
555 bitset_free(env.live);
556 del_pset(env.pre_colored);
559 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal)
560 void be_init_chordal(void)
562 static be_ra_chordal_coloring_t coloring = {
565 FIRM_DBG_REGISTER(dbg, "firm.be.chordal");
567 be_register_chordal_coloring("default", &coloring);