2 * Chordal register allocation.
3 * @author Sebastian Hack
6 * Copyright (C) Universitaet Karlsruhe
7 * Released under the GPL
31 #include "irgraph_t.h"
32 #include "irprintf_t.h"
42 #include "besched_t.h"
48 #include "bechordal_t.h"
49 #include "bechordal_draw.h"
51 #define DBG_LEVEL SET_LEVEL_0
52 #define DBG_LEVEL_CHECK SET_LEVEL_0
58 typedef struct _be_chordal_alloc_env_t {
59 be_chordal_env_t *chordal_env;
61 bitset_t *live; /**< A liveness bitset. */
62 bitset_t *colors; /**< The color mask. */
63 bitset_t *in_colors; /**< Colors used by live in values. */
64 int colors_n; /**< The number of colors. */
65 } be_chordal_alloc_env_t;
69 /* Make a fourcc for border checking. */
70 #define BORDER_FOURCC FOURCC('B', 'O', 'R', 'D')
72 static void check_border_list(struct list_head *head)
75 list_for_each_entry(border_t, x, head, list) {
76 assert(x->magic == BORDER_FOURCC);
80 static void check_heads(be_chordal_env_t *env)
83 for(ent = pmap_first(env->border_heads); ent; ent = pmap_next(env->border_heads)) {
84 /* ir_printf("checking border list of block %+F\n", ent->key); */
85 check_border_list(ent->value);
91 * Add an interval border to the list of a block's list
93 * @note You always have to create the use before the def.
94 * @param env The environment.
95 * @param head The list head to enqueue the borders.
96 * @param irn The node (value) the border belongs to.
97 * @param pressure The pressure at this point in time.
98 * @param step A time step for the border.
99 * @param is_def Is the border a use or a def.
100 * @return The created border.
102 static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head,
103 ir_node *irn, unsigned step, unsigned pressure,
104 unsigned is_def, unsigned is_real)
111 b = obstack_alloc(&env->obst, sizeof(*b));
113 /* also allocate the def and tie it to the use. */
114 def = obstack_alloc(&env->obst, sizeof(*def));
115 memset(def, 0, sizeof(*def));
120 * Set the link field of the irn to the def.
121 * This strongly relies on the fact, that the use is always
122 * made before the def.
124 set_irn_link(irn, def);
126 b->magic = BORDER_FOURCC;
127 def->magic = BORDER_FOURCC;
131 * If the def is encountered, the use was made and so was the
132 * the def node (see the code above). It was placed into the
133 * link field of the irn, so we can get it there.
136 b = get_irn_link(irn);
138 assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered");
141 b->pressure = pressure;
143 b->is_real = is_real;
146 list_add_tail(&b->list, head);
147 DBG((env->dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step));
154 * Check, if an irn is of the register class currently under processing.
155 * @param env The chordal environment.
156 * @param irn The node.
157 * @return 1, if the node is of that register class, 0 if not.
159 static INLINE int has_reg_class(const be_chordal_env_t *env, const ir_node *irn)
161 return arch_irn_has_reg_class(env->main_env->arch_env, irn, -1, env->cls);
164 static border_t *handle_constraint_perm(be_chordal_alloc_env_t *alloc_env, border_t *perm_border)
166 const arch_env_t *arch_env = alloc_env->chordal_env->main_env->arch_env;
167 bitset_t *bs = bitset_alloca(alloc_env->chordal_env->cls->n_regs);
168 ir_node *perm = perm_border->irn;
169 int n = get_irn_arity(perm_border->irn);
172 border_t *b, *next_border, *cnstr_border;
174 arch_register_req_t req;
179 assert(is_Perm(perm));
182 * After the Perm, there must be a sequence of Projs
183 * which extract the permuted values of the Perm.
185 for(b = perm_border; is_Proj(b->irn); b = border_next(b)) {
186 assert(is_Proj(b->irn));
192 next_border = border_next(b);
195 assert(n_projs == n && "There must be as many Projs as the Perm is wide");
197 /* The node after the last perm proj must be the constrained node. */
199 for(i = -1, m = get_irn_arity(cnstr); i < m; ++i) {
200 req.type = arch_register_req_type_normal;
201 if(arch_get_register_req(arch_env, &req, cnstr, i) && req.type == arch_register_req_type_limited) {
207 assert(has_cnstr && "The node must have a register constraint");
210 * Consider the code in beconstrperm.c
211 * We turned each input constraint of a node into an output
212 * constraint of the Perm's Proj. So we only have to
213 * consider output constraints here.
215 for(b = perm_border; b != next_border; b = border_next(b)) {
216 ir_node *irn = b->irn;
218 req.type = arch_register_req_type_normal;
219 if(arch_get_register_req(arch_env, &req, irn, -1) && req.type == arch_register_req_type_limited) {
220 const arch_register_t *reg;
223 bitset_clear_all(bs);
224 req.data.limited(irn, -1, bs);
225 col = bitset_next_set(bs, 0);
226 reg = arch_register_for_index(alloc_env->chordal_env->cls, col);
228 arch_set_irn_register(arch_env, irn, reg);
229 bitset_set(alloc_env->colors, col);
233 for(b = perm_border; b != next_border; b = border_next(b)) {
234 ir_node *irn = b->irn;
235 int nr = get_irn_graph_nr(irn);
237 bitset_set(alloc_env->live, nr);
239 if(arch_get_irn_register(arch_env, irn) == NULL) {
240 int col = bitset_next_clear(alloc_env->colors, 0);
241 const arch_register_t *reg = arch_register_for_index(alloc_env->chordal_env->cls, col);
243 arch_set_irn_register(arch_env, irn, reg);
251 * Annotate the register pressure to the nodes and compute
252 * the liveness intervals.
253 * @param block The block to do it for.
254 * @param env_ptr The environment.
256 static void pressure(ir_node *block, void *env_ptr)
258 /* Convenience macro for a def */
259 #define border_def(irn, step, real) \
260 border_add(env, head, irn, step, pressure--, 1, real)
262 /* Convenience macro for a use */
263 #define border_use(irn, step, real) \
264 border_add(env, head, irn, step, ++pressure, 0, real)
266 be_chordal_alloc_env_t *alloc_env = env_ptr;
267 be_chordal_env_t *env = alloc_env->chordal_env;
268 bitset_t *live = alloc_env->live;
269 firm_dbg_module_t *dbg = env->dbg;
274 unsigned pressure = 0;
275 struct list_head *head;
276 pset *live_in = put_live_in(block, pset_new_ptr_default());
277 pset *live_end = put_live_end(block, pset_new_ptr_default());
279 DBG((dbg, LEVEL_1, "Computing pressure in block %+F\n", block));
280 bitset_clear_all(live);
282 /* Set up the border list in the block info */
283 head = obstack_alloc(&env->obst, sizeof(*head));
284 INIT_LIST_HEAD(head);
285 assert(pmap_get(env->border_heads, block) == NULL);
286 pmap_insert(env->border_heads, block, head);
289 * Make final uses of all values live out of the block.
290 * They are necessary to build up real intervals.
292 for(irn = pset_first(live_end); irn; irn = pset_next(live_end)) {
293 if(has_reg_class(env, irn)) {
294 DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_graph_nr(irn)));
295 bitset_set(live, get_irn_graph_nr(irn));
296 border_use(irn, step, 0);
302 * Determine the last uses of a value inside the block, since they are
303 * relevant for the interval borders.
305 sched_foreach_reverse(block, irn) {
306 DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure));
307 DBG((dbg, LEVEL_2, "\tlive: %b\n", live));
310 * If the node defines some value, which can put into a
311 * register of the current class, make a border for it.
313 if(has_reg_class(env, irn)) {
314 int nr = get_irn_graph_nr(irn);
316 bitset_clear(live, nr);
317 border_def(irn, step, 1);
321 * If the node is no phi node we can examine the uses.
324 for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
325 ir_node *op = get_irn_n(irn, i);
327 if(has_reg_class(env, op)) {
328 int nr = get_irn_graph_nr(op);
330 DBG((dbg, LEVEL_4, "\t\tpos: %d, use: %+F\n", i, op));
332 if(!bitset_is_set(live, nr)) {
333 border_use(op, step, 1);
334 bitset_set(live, nr);
343 * Add initial defs for all values live in.
345 for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
346 if(has_reg_class(env, irn)) {
348 /* Mark the value live in. */
349 bitset_set(live, get_irn_graph_nr(irn));
352 border_def(irn, step, 0);
361 static void assign(ir_node *block, void *env_ptr)
363 be_chordal_alloc_env_t *alloc_env = env_ptr;
364 be_chordal_env_t *env = alloc_env->chordal_env;
365 firm_dbg_module_t *dbg = env->dbg;
366 bitset_t *live = alloc_env->live;
367 bitset_t *colors = alloc_env->colors;
368 bitset_t *in_colors = alloc_env->in_colors;
369 const arch_env_t *arch_env = env->main_env->arch_env;
373 struct list_head *head = get_block_border_head(env, block);
374 pset *live_in = put_live_in(block, pset_new_ptr_default());
376 bitset_clear_all(live);
377 bitset_clear_all(colors);
378 bitset_clear_all(in_colors);
380 DBG((dbg, LEVEL_4, "Assigning colors for block %+F\n", block));
381 DBG((dbg, LEVEL_4, "\tusedef chain for block\n"));
382 list_for_each_entry(border_t, b, head, list) {
383 DBG((dbg, LEVEL_4, "\t%s %+F/%d\n", b->is_def ? "def" : "use",
384 b->irn, get_irn_graph_nr(b->irn)));
388 * Add initial defs for all values live in.
389 * Since their colors have already been assigned (The dominators were
390 * allocated before), we have to mark their colors as used also.
392 for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
393 if(has_reg_class(env, irn)) {
394 const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
397 assert(reg && "Node must have been assigned a register");
398 col = arch_register_get_index(reg);
400 /* Mark the color of the live in value as used. */
401 bitset_set(colors, col);
402 bitset_set(in_colors, col);
404 /* Mark the value live in. */
405 bitset_set(live, get_irn_graph_nr(irn));
410 * Mind that the sequence of defs from back to front defines a perfect
411 * elimination order. So, coloring the definitions from first to last
414 list_for_each_entry_reverse(border_t, b, head, list) {
415 ir_node *irn = b->irn;
416 int nr = get_irn_graph_nr(irn);
419 * Assign a color, if it is a local def. Global defs already have a
422 if(b->is_def && !is_live_in(block, irn)) {
423 const arch_register_t *reg;
426 DBG((dbg, LEVEL_4, "\tcolors in use: %b\n", colors));
428 col = bitset_next_clear(colors, 0);
429 reg = arch_register_for_index(env->cls, col);
431 assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet");
432 assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
434 bitset_set(colors, col);
435 bitset_set(live, nr);
437 arch_set_irn_register(arch_env, irn, reg);
438 DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n",
439 arch_register_get_name(reg), col, irn));
442 /* Clear the color upon a use. */
443 else if(!b->is_def) {
444 const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
447 assert(reg && "Register must have been assigned");
449 col = arch_register_get_index(reg);
450 assert(bitset_is_set(live, nr) && "Cannot have a non live use");
452 bitset_clear(colors, col);
453 bitset_clear(live, nr);
456 * If we encounter a Perm, it is due to register constraints.
457 * To achieve a valid coloring in the presence of register
458 * constraints, we invoke a special function which takes care
459 * that all constraints are fulfilled.
460 * This function assigned valid colors to the projs of the
461 * Perm and the constrained node itself and skips these
462 * nodes in the border list.
465 b = handle_constraint_perm(alloc_env, border_next(b));
472 void be_ra_chordal_color(be_chordal_env_t *chordal_env)
474 int node_count = get_graph_node_count(chordal_env->irg);
475 int colors_n = arch_register_class_n_regs(chordal_env->cls);
476 ir_graph *irg = chordal_env->irg;
478 be_chordal_alloc_env_t env;
480 if(get_irg_dom_state(irg) != dom_consistent)
483 env.chordal_env = chordal_env;
484 env.live = bitset_malloc(node_count);
485 env.colors = bitset_malloc(colors_n);
486 env.in_colors = bitset_malloc(colors_n);
487 env.colors_n = colors_n;
489 /* First, determine the pressure */
490 dom_tree_walk_irg(irg, pressure, NULL, &env);
492 /* Assign the colors */
493 dom_tree_walk_irg(irg, assign, NULL, &env);
495 #ifdef DUMP_INTERVALS
500 ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", cls->name, irg);
501 plotter = new_plotter_ps(buf);
503 draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter, env->arch_env, cls);
504 plotter_free(plotter);