nsz Git - libfirm/blob - ir/be/bearch_t.h

   1
   2 #ifndef _FIRM_BEARCH_T_H
   3 #define _FIRM_BEARCH_T_H
   4
   5 #include "firm_config.h"
   6
   7 #include "irop_t.h"
   8 #include "irnode_t.h"
   9 #include "irmode_t.h"
  10
  11 #include "hashptr.h"
  12 #include "fourcc.h"
  13 #include "set.h"
  14 #include "list.h"
  15 #include "ident.h"
  16
  17 #include "bearch.h"
  18
  19 #define ARCH_IRN_FOURCC         FOURCC('A', 'R', 'C', 'H')
  20
  21 /**
  22  * Flags for registers.
  23  */
  24 enum {
  25
  26         /**
  27          * The register is invariant concerning writes.
  28          * Examples are the 0 registers in RISC architectures.
  29          */
  30         REG_WRITE_INVARIAT                              = 1
  31
  32 } arch_register_flags_t;
  33
  34 typedef enum {
  35 #define ARCH_OBJ(x,list)        arch_kind_##x,
  36 #include "bearch_obj.def"
  37 #undef ARCH_OBJ
  38         arch_kind_last
  39 } arch_kind_t;
  40
  41 /**
  42  * A header which each of the arch structs should posess.
  43  */
  44 typedef struct {
  45         arch_kind_t kind;
  46         arch_isa_t *isa;
  47         const char *name;
  48         struct list_head list;
  49         unsigned is_new : 1;
  50 } arch_header_t;
  51
  52
  53 /**
  54  * Get the architecture an arch object belongs to.
  55  * @param obj The object.
  56  * @return The architecture it belongs to.
  57  */
  58 static INLINE arch_isa_t *arch_obj_get_isa(const void *obj)
  59 {
  60         return ((const arch_header_t *) obj)->isa;
  61 }
  62
  63 typedef enum _arch_register_flag_t {
  64         arch_register_flag_none,
  65         arch_register_flag_caller_saved,                                                /**< The register must be saved by the caller
  66                                                                                                                                                                                                 upon a function call. It thus can be overwritten
  67                                                                                                                                                                                                 in the called function. */
  68         arch_register_flag_callee_saved,                                                /**< The register must be saved by the called function,
  69                                                                                                                                                                                                 it thus survives a function call. */
  70         arch_register_flag_ignore                                                                               /**< Do not consider this register when allocating. */
  71 } arch_register_flag_t;
  72
  73 /**
  74  * A register.
  75  */
  76 struct _arch_register_t {
  77         arch_header_t header;
  78         int index;                                                                                                                              /**< The index of the register in the class. */
  79         const arch_register_class_t *reg_class;         /**< The class the register belongs to. */
  80         arch_register_flag_t flags;                                                             /**< Flags describing several properties of
  81                                                                                                                                                                                         the register. */
  82 };
  83
  84 /**
  85  * A (sub-) set of registers.
  86  */
  87 struct _arch_register_set_t {
  88         arch_header_t header;
  89         const struct _arch_register_class_t *reg_class;         /**< The register class for this set. */
  90         char regs[1];                                                                                                                                                   /**< An array containing 0/1 at place i
  91                                                                                                                                                                                                                         whether the register with index i is
  92                                                                                                                                                                                                                         in the set or not. */
  93 };
  94
  95 static INLINE int _arch_register_in_set(const arch_register_set_t *set, const arch_register_t *reg)
  96 {
  97         if(reg->reg_class != set->reg_class)
  98                 return 0;
  99
 100         return set->regs[reg->index];
 101 }
 102
 103
 104 /**
 105  * A class of registers.
 106  * Like general purpose or floating point.
 107  */
 108 struct _arch_register_class_t {
 109         arch_header_t header;
 110         struct list_head list;          /**< list head to list up in the list of all
 111                                                                                                                         register classes in an isa. */
 112         arch_register_set_t *set; /**< A register set containing all registers
 113                                                                                                                         in this class. */
 114         int n_regs;                                                             /**< Number of registers in this class. */
 115         arch_register_t *regs[1]; /**< The array of registers. */
 116 };
 117
 118 static INLINE const arch_register_t *_arch_register_for_index(const arch_register_class_t *cls, int idx)
 119 {
 120         assert(0 <= idx && idx <= cls->n_regs);
 121         return cls->regs[idx];
 122 }
 123
 124 /**
 125  * Get the register set for a register class.
 126  * @param cls The register class.
 127  * @return The set containing all registers in the class.
 128  */
 129 static INLINE arch_register_set_t *_arch_get_register_set_for_class(const arch_register_class_t *cls)
 130 {
 131         return cls->set;
 132 }
 133
 134 /**
 135  * An immediate.
 136  */
 137 struct _arch_immediate_t {
 138         arch_header_t header;
 139         ir_mode *mode;                                          /**< The mode of the immediate. */
 140 };
 141
 142 /**
 143  * The member of an enum.
 144  */
 145 struct _arch_enum_member_t {
 146         arch_header_t header;           /**< The omnipresent header. */
 147         arch_enum_t *enm;                                       /**< The enum, this member belongs to. */
 148 };
 149
 150 /**
 151  * An enumeration operand type.
 152  *
 153  * Enumeration operand types can be used to describe the variants
 154  * of an instruction, like giving the cases for a compare (gt, lt,
 155  * eq, ...) some other special attributes of an instruction.
 156  */
 157 struct _arch_enum_t {
 158         arch_header_t header;
 159         int n_members;                                                                          /**< The number of members in this enum. */
 160         arch_enum_member_t *members[1];         /**< The array of members. */
 161 };
 162
 163 typedef enum _arch_operand_type_t {
 164 #define ARCH_OPERAND_TYPE(name,size_in_irn) arch_operand_type_ ## name,
 165 #include "bearch_operand_types.def"
 166 #undef ARCH_OPERAND_TYPE
 167         arch_operand_type_last
 168 } arch_operand_type_t;
 169
 170
 171
 172 /**
 173  * The data for the different flavours of operand types.
 174  */
 175 typedef union _arch_operand_data_t {
 176         arch_register_callback_t *callback;                             /**< The set of valid registers is determined
 177                                                                                                                                                                                         by a callback function. */
 178
 179         const arch_register_set_t *set;                                         /**< The set of valid registers is directly
 180                                                                                                                                                                                         given. Note, that if an insn has no constraints,
 181                                                                                                                                                                                         the set comprises all registers in the
 182                                                                                                                                                                                         register class. */
 183
 184         const arch_immediate_t *imm;                                                    /**< If the operand is an immediate
 185                                                                                                                                                                                         operand, this describes the kind of
 186                                                                                                                                                                                         immediate. */
 187
 188         const arch_enum_t *enm;                                                                         /**< Some enumeration value. */
 189
 190         int same_as_pos;                          /**< 'Same as' position for equals. */
 191 } arch_operand_data_t;
 192
 193 /**
 194  * An operand to an instruction.
 195  */
 196 struct _arch_operand_t {
 197         arch_operand_type_t type;                                                                       /**< The type of the operand. */
 198         arch_operand_data_t data;                                                                       /**< The payload. */
 199 };
 200
 201 /**
 202  * An instruction format.
 203  */
 204 struct _arch_insn_format_t {
 205         arch_header_t header;
 206         int n_in;                                                                                                                                       /**< Number of in operands. */
 207         int n_out;                                                                                                                              /**< Number of out operands. */
 208
 209         arch_operand_t operands[1];     /**< Array with operands. */
 210 };
 211
 212 /*
 213  * Transform the position into an offset which is suitable to
 214  * index the operands array in the format.
 215  *
 216  * The layout is:
 217  * operand:    in0 in1 in2 ... out0 out1 out2
 218  * position:   0   1   2       -1   -2   -3
 219  */
 220 #define arch_inout_to_index(fmt, pos)                           ((pos) >= 0 ? (pos) : -((pos) + 1) + (fmt)->n_in)
 221
 222 #define arch_get_in_operand(fmt, pos)                   (&((fmt)->operands[arch_inout_to_index(fmt, pos)]))
 223 #define arch_get_out_operand(fmt, pos)                  (&((fmt)->operands[arch_inout_to_index(fmt, -((pos) + 1))]))
 224
 225
 226 /**
 227  * An instruction.
 228  */
 229 struct _arch_insn_t {
 230         arch_header_t header;
 231         const arch_insn_format_t *format;                       /**< The format of the instruction. */
 232         ir_op *op;                                                                                                              /**< The firm opcode for this insn. */
 233 };
 234
 235 /**
 236  * This truct is placed into each ir_node which is made from an arch
 237  * insn (If the node is made via arch_new node).
 238  */
 239 typedef struct _arch_irn_data_t {
 240         unsigned magic;                                                                                         /**< A magic number to tell if node is an
 241                                                                                                                                                                         arch node. */
 242         const arch_insn_t *insn;                                                        /**< The insn this nodes instantiates. */
 243 } arch_irn_data_t;
 244
 245 #define _arch_get_irn_data(irn) ((const arch_irn_data_t *) &((irn)->attr))
 246
 247 /**
 248  * Check, if an ir node is made by the arch module.
 249  * @param irn An ir node.
 250  * @return 1 if the node was made via arch_new_node() or 0 otherwise.
 251  */
 252 static INLINE int _arch_is_irn(const ir_node *irn)
 253 {
 254         return _arch_get_irn_data(irn)->magic == ARCH_IRN_FOURCC;
 255 }
 256
 257 static INLINE const arch_insn_t *_arch_irn_get_insn(const ir_node *irn)
 258 {
 259         if(!_arch_is_irn(irn))
 260                 return NULL;
 261
 262         return _arch_get_irn_data(irn)->insn;
 263 }
 264
 265
 266 /**
 267  * An instruction set architecture.
 268  */
 269 struct _arch_isa_t {
 270         arch_header_t header;
 271         struct list_head heads[arch_kind_last];         /**< List heads to list objects created in the
 272                                                                                                                                                                                         context of this isa. Note: some of the list heads
 273                                                                                                                                                                                         remain unused. */
 274 };
 275
 276 struct _arch_implementation_t {
 277         const arch_isa_t *isa;
 278         const char *name;
 279 };
 280
 281
 282 #endif /* _FIRM_BEARCH_T_H */