2 * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Processor architecture specification.
23 * @author Sebastian Hack
26 #ifndef FIRM_BE_BEARCH_H
27 #define FIRM_BE_BEARCH_H
31 #include "firm_types.h"
34 #include "raw_bitset.h"
44 * this constant is returned by the get_sp_bias functions if the stack
45 * is reset (usually because the frame pointer is copied to the stack
48 #define SP_BIAS_RESET INT_MIN
50 typedef enum arch_register_class_flags_t {
51 arch_register_class_flag_none = 0,
52 /** don't do automatic register allocation for this class */
53 arch_register_class_flag_manual_ra = 1U << 0,
54 /** the register models an abstract state (example: fpu rounding mode) */
55 arch_register_class_flag_state = 1U << 1
56 } arch_register_class_flags_t;
57 ENUM_BITSET(arch_register_class_flags_t)
59 typedef enum arch_register_type_t {
60 arch_register_type_none = 0,
61 /** Do not consider this register when allocating. */
62 arch_register_type_ignore = 1U << 0,
63 /** The emitter can choose an arbitrary register. The register fulfills any
64 * register constraints as long as the register class matches */
65 arch_register_type_joker = 1U << 1,
66 /** This is just a virtual register. Virtual registers fulfill any register
67 * constraints as long as the register class matches. It is a allowed to
68 * have multiple definitions for the same virtual register at a point */
69 arch_register_type_virtual = 1U << 2,
70 /** The register represents a state that should be handled by bestate
72 arch_register_type_state = 1U << 3,
73 } arch_register_type_t;
74 ENUM_BITSET(arch_register_type_t)
77 * Different types of register allocation requirements.
79 typedef enum arch_register_req_type_t {
80 /** No register requirement. */
81 arch_register_req_type_none = 0,
82 /** All registers in the class are allowed. */
83 arch_register_req_type_normal = 1U << 0,
84 /** Only a real subset of the class is allowed. */
85 arch_register_req_type_limited = 1U << 1,
86 /** The register should be equal to another one at the node. */
87 arch_register_req_type_should_be_same = 1U << 2,
88 /** The register must be unequal from some other at the node. */
89 arch_register_req_type_must_be_different = 1U << 3,
90 /** The registernumber should be aligned (in case of multiregister values)*/
91 arch_register_req_type_aligned = 1U << 4,
92 /** ignore while allocating registers */
93 arch_register_req_type_ignore = 1U << 5,
94 /** the output produces a new value for the stack pointer
95 * (this is not really a constraint but a marker to guide the stackpointer
97 arch_register_req_type_produces_sp = 1U << 6,
98 } arch_register_req_type_t;
99 ENUM_BITSET(arch_register_req_type_t)
101 extern const arch_register_req_t *arch_no_register_req;
104 * Print information about a register requirement in human readable form
105 * @param F output stream/file
106 * @param req The requirements structure to format.
108 void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
109 const ir_node *node);
111 void arch_dump_register_reqs(FILE *F, const ir_node *node);
112 void arch_dump_reqs_and_registers(FILE *F, const ir_node *node);
115 * Node classification. Used for statistics and for detecting reload nodes.
117 typedef enum arch_irn_class_t {
118 arch_irn_class_none = 0,
119 arch_irn_class_spill = 1 << 0,
120 arch_irn_class_reload = 1 << 1,
121 arch_irn_class_remat = 1 << 2,
122 arch_irn_class_copy = 1 << 3,
123 arch_irn_class_perm = 1 << 4
125 ENUM_BITSET(arch_irn_class_t)
127 void arch_set_frame_offset(ir_node *irn, int bias);
129 ir_entity *arch_get_frame_entity(const ir_node *irn);
130 int arch_get_sp_bias(ir_node *irn);
132 int arch_get_op_estimated_cost(const ir_node *irn);
133 arch_inverse_t *arch_get_inverse(const ir_node *irn, int i,
134 arch_inverse_t *inverse,
135 struct obstack *obstack);
136 int arch_possible_memory_operand(const ir_node *irn,
138 void arch_perform_memory_operand(ir_node *irn, ir_node *spill,
142 * Get the register requirements for a node.
143 * @note Deprecated API! Preferably use
144 * arch_get_in_register_req and
145 * arch_get_out_register_req.
147 * @param irn The node.
148 * @param pos The position of the operand you're interested in.
149 * @return A pointer to the register requirements. If NULL is returned, the
150 * operand was no register operand.
152 const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos);
155 * Check, if a register is assignable to an operand of a node.
156 * @param irn The node.
157 * @param pos The position of the operand.
158 * @param reg The register.
159 * @return 1, if the register might be allocated to the operand 0 if not.
161 int arch_reg_is_allocatable(const ir_node *irn, int pos,
162 const arch_register_t *reg);
164 #define arch_reg_out_is_allocatable(irn, reg) arch_reg_is_allocatable(irn, -1, reg)
167 * Get the register class of an operand of a node.
168 * @param irn The node.
169 * @param pos The position of the operand, -1 for the output.
170 * @return The register class of the operand or NULL, if
171 * operand is a non-register operand.
173 const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn,
176 #define arch_get_irn_reg_class_out(irn) arch_get_irn_reg_class(irn, -1)
179 * Get the register allocated at a certain output operand of a node.
180 * @param irn The node.
181 * @return The register allocated for this operand
183 const arch_register_t *arch_get_irn_register(const ir_node *irn);
184 const arch_register_t *arch_irn_get_register(const ir_node *irn, int pos);
187 * Set the register for a certain output operand.
188 * @param irn The node.
189 * @param reg The register.
191 void arch_set_irn_register(ir_node *irn, const arch_register_t *reg);
192 void arch_irn_set_register(ir_node *irn, int pos, const arch_register_t *reg);
196 * @param irn The node.
197 * @return A classification of the node.
199 arch_irn_class_t arch_irn_classify(const ir_node *irn);
202 * Get the flags of a node.
203 * @param irn The node.
206 arch_irn_flags_t arch_irn_get_flags(const ir_node *irn);
208 void arch_irn_set_flags(ir_node *node, arch_irn_flags_t flags);
209 void arch_irn_add_flags(ir_node *node, arch_irn_flags_t flags);
211 #define arch_irn_is(irn, flag) ((arch_irn_get_flags(irn) & arch_irn_flags_ ## flag) != 0)
214 * Initialize the architecture environment struct.
215 * @param isa The isa which shall be put into the environment.
216 * @param file_handle The file handle
217 * @return The environment.
219 extern arch_env_t *arch_env_init(const arch_isa_if_t *isa,
220 FILE *file_handle, be_main_env_t *main_env);
223 * Register an instruction set architecture
225 void be_register_isa_if(const char *name, const arch_isa_if_t *isa);
230 struct arch_register_t {
231 const char *name; /**< The name of the register. */
232 const arch_register_class_t *reg_class; /**< The class of the register */
233 unsigned short index; /**< The index of the register in
235 unsigned short global_index; /** The global index this register
236 in the architecture. */
237 arch_register_type_t type; /**< The type of the register. */
238 /** register constraint allowing just this register */
239 const arch_register_req_t *single_req;
242 static inline const arch_register_class_t *arch_register_get_class(
243 const arch_register_t *reg)
245 return reg->reg_class;
248 static inline unsigned arch_register_get_index(const arch_register_t *reg)
253 static inline const char *arch_register_get_name(const arch_register_t *reg)
259 * A class of registers.
260 * Like general purpose or floating point.
262 struct arch_register_class_t {
263 unsigned index; /**< index of this register class */
264 const char *name; /**< The name of the register class.*/
265 unsigned n_regs; /**< Number of registers in this
267 ir_mode *mode; /**< The mode of the register class.*/
268 const arch_register_t *regs; /**< The array of registers. */
269 arch_register_class_flags_t flags; /**< register class flags. */
270 const arch_register_req_t *class_req;
273 /** return the number of registers in this register class */
274 #define arch_register_class_n_regs(cls) ((cls)->n_regs)
276 /** return the largest mode of this register class */
277 #define arch_register_class_mode(cls) ((cls)->mode)
279 /** return the name of this register class */
280 #define arch_register_class_name(cls) ((cls)->name)
282 /** return the index of this register class */
283 #define arch_register_class_index(cls) ((cls)->index)
285 /** return the register class flags */
286 #define arch_register_class_flags(cls) ((cls)->flags)
288 static inline const arch_register_t *arch_register_for_index(
289 const arch_register_class_t *cls, unsigned idx)
291 assert(idx < cls->n_regs);
292 return &cls->regs[idx];
296 * Convenience macro to check for set constraints.
297 * @param req A pointer to register requirements.
298 * @param kind The kind of constraint to check for
299 * (see arch_register_req_type_t).
300 * @return 1, If the kind of constraint is present, 0 if not.
302 #define arch_register_req_is(req, kind) \
303 (((req)->type & (arch_register_req_type_ ## kind)) != 0)
306 * Expresses requirements to register allocation for an operand.
308 struct arch_register_req_t {
309 arch_register_req_type_t type; /**< The type of the constraint. */
310 const arch_register_class_t *cls; /**< The register class this constraint
312 const unsigned *limited; /**< allowed register bitset */
313 unsigned other_same; /**< Bitmask of ins which should use the
314 same register (should_be_same). */
315 unsigned other_different; /**< Bitmask of ins which shall use a
317 (must_be_different) */
318 unsigned char width; /**< specifies how many sequential
319 registers are required */
322 static inline int reg_reqs_equal(const arch_register_req_t *req1,
323 const arch_register_req_t *req2)
328 if (req1->type != req2->type
329 || req1->cls != req2->cls
330 || req1->other_same != req2->other_same
331 || req1->other_different != req2->other_different)
334 if (req1->limited != NULL) {
337 if (req2->limited == NULL)
340 n_regs = arch_register_class_n_regs(req1->cls);
341 if (!rbitsets_equal(req1->limited, req2->limited, n_regs))
349 * An inverse operation returned by the backend
351 struct arch_inverse_t {
352 int n; /**< count of nodes returned in nodes array */
353 int costs; /**< costs of this remat */
355 /** nodes for this inverse operation. shall be in schedule order.
356 * last element is the target value */
360 struct arch_irn_ops_t {
364 * @param irn The node.
365 * @return A classification.
367 arch_irn_class_t (*classify)(const ir_node *irn);
370 * Get the entity on the stack frame this node depends on.
371 * @param irn The node in question.
372 * @return The entity on the stack frame or NULL, if the node does not have
373 * a stack frame entity.
375 ir_entity *(*get_frame_entity)(const ir_node *irn);
378 * Set the offset of a node carrying an entity on the stack frame.
379 * @param irn The node.
380 * @param offset The offset of the node's stack frame entity.
382 void (*set_frame_offset)(ir_node *irn, int offset);
385 * Returns the delta of the stackpointer for nodes that increment or
386 * decrement the stackpointer with a constant value. (push, pop
387 * nodes on most architectures).
388 * A positive value stands for an expanding stack area, a negative value for
391 * @param irn The node
392 * @return 0 if the stackpointer is not modified with a constant
393 * value, otherwise the increment/decrement value
395 int (*get_sp_bias)(const ir_node *irn);
398 * Returns an inverse operation which yields the i-th argument
399 * of the given node as result.
401 * @param irn The original operation
402 * @param i Index of the argument we want the inverse operation to
404 * @param inverse struct to be filled with the resulting inverse op
405 * @param obstack The obstack to use for allocation of the returned nodes
407 * @return The inverse operation or NULL if operation invertible
409 arch_inverse_t *(*get_inverse)(const ir_node *irn, int i,
410 arch_inverse_t *inverse,
411 struct obstack *obstack);
414 * Get the estimated cycle count for @p irn.
416 * @param irn The node.
417 * @return The estimated cycle count for this operation
419 int (*get_op_estimated_cost)(const ir_node *irn);
422 * Asks the backend whether operand @p i of @p irn can be loaded form memory
425 * @param irn The node.
426 * @param i Index of the argument we would like to know whether @p irn
427 * can load it form memory internally
428 * @return nonzero if argument can be loaded or zero otherwise
430 int (*possible_memory_operand)(const ir_node *irn, unsigned int i);
433 * Ask the backend to assimilate @p reload of operand @p i into @p irn.
435 * @param irn The node.
436 * @param spill The spill.
437 * @param i The position of the reload.
439 void (*perform_memory_operand)(ir_node *irn, ir_node *spill,
444 * Architecture interface.
446 struct arch_isa_if_t {
448 * Initialize the isa interface.
449 * @param file_handle the file handle to write the output to
450 * @return a new isa instance
452 arch_env_t *(*init)(FILE *file_handle);
455 * lowers current program for target. See the documentation for
456 * be_lower_for_target() for details.
458 void (*lower_for_target)(void);
461 * Free the isa instance.
463 void (*done)(void *self);
466 * Called directly after initialization. Backend should handle all
469 void (*handle_intrinsics)(void);
472 * Get the register class which shall be used to store a value of a given
474 * @param self The this pointer.
475 * @param mode The mode in question.
476 * @return A register class which can hold values of the given mode.
478 const arch_register_class_t *(*get_reg_class_for_mode)(const ir_mode *mode);
481 * Get the ABI restrictions for procedure calls.
482 * @param self The this pointer.
483 * @param call_type The call type of the method (procedure) in question.
484 * @param p The array of parameter locations to be filled.
486 void (*get_call_abi)(const void *self, ir_type *call_type,
490 * Get the necessary alignment for storing a register of given class.
491 * @param self The isa object.
492 * @param cls The register class.
493 * @return The alignment in bytes.
495 int (*get_reg_class_alignment)(const arch_register_class_t *cls);
498 * A "static" function, returns the frontend settings
499 * needed for this backend.
501 const backend_params *(*get_params)(void);
504 * Return an ordered list of irgs where code should be generated for.
505 * If NULL is returned, all irg will be taken into account and they will be
506 * generated in an arbitrary order.
507 * @param self The isa object.
508 * @param irgs A flexible array ARR_F of length 0 where the backend can
509 * append the desired irgs.
510 * @return A flexible array ARR_F containing all desired irgs in the
513 ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs);
516 * mark node as rematerialized
518 void (*mark_remat)(ir_node *node);
521 * parse an assembler constraint part and set flags according to its nature
522 * advances the *c pointer to point to the last parsed character (so if you
523 * parse a single character don't advance c)
525 asm_constraint_flags_t (*parse_asm_constraint)(const char **c);
528 * returns true if the string is a valid clobbered (register) in this
531 int (*is_valid_clobber)(const char *clobber);
534 * Initialize the code generator.
536 * @return A newly created code generator.
538 void (*init_graph)(ir_graph *irg);
541 * return node used as base in pic code addresses
543 ir_node* (*get_pic_base)(ir_graph *irg);
546 * Called before abi introduce.
548 void (*before_abi)(ir_graph *irg);
551 * Called, when the graph is being normalized.
553 void (*prepare_graph)(ir_graph *irg);
556 * Called before register allocation.
558 void (*before_ra)(ir_graph *irg);
561 * Called directly before done is called. This should be the last place
562 * where the irg is modified.
564 void (*finish)(ir_graph *irg);
567 * Called after everything happened. This call should emit the final
568 * assembly code but avoid changing the irg.
569 * The code generator must also be de-allocated here.
571 void (*emit)(ir_graph *irg);
574 * Checks if the given register is callee/caller saved.
576 int (*register_saved_by)(const arch_register_t *reg, int callee);
579 #define arch_env_done(env) ((env)->impl->done(env))
580 #define arch_env_handle_intrinsics(env) \
581 do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
582 #define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((mode)))
583 #define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((env), (tp), (abi)))
584 #define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((cls)))
585 #define arch_env_get_params(env) ((env)->impl->get_params())
586 #define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((irn)))
587 #define arch_env_get_machine(env) ((env)->impl->get_machine(env))
588 #define arch_env_get_backend_irg_list(env,irgs) ((env)->impl->get_backend_irg_list((env), (irgs)))
589 #define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((c))
590 #define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((clobber))
591 #define arch_env_mark_remat(env,node) \
592 do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0)
598 const arch_isa_if_t *impl;
599 unsigned n_registers; /**< number of registers */
600 const arch_register_t *registers; /**< register array */
601 unsigned n_register_classes; /**< number of register classes*/
602 const arch_register_class_t *register_classes; /**< register classes */
603 const arch_register_t *sp; /**< The stack pointer register. */
604 const arch_register_t *bp; /**< The base pointer register. */
605 const arch_register_class_t *link_class; /**< The static link pointer
607 int stack_alignment; /**< power of 2 stack alignment */
608 const be_main_env_t *main_env; /**< the be main environment */
609 int spill_cost; /**< cost for a be_Spill node */
610 int reload_cost; /**< cost for a be_Reload node */
611 bool custom_abi : 1; /**< backend does all abi handling
612 and does not need the generic
613 stuff from beabi.h/.c */
616 static inline unsigned arch_irn_get_n_outs(const ir_node *node)
618 backend_info_t *info = be_get_info(node);
619 if (info->out_infos == NULL)
622 return (unsigned)ARR_LEN(info->out_infos);
625 static inline const arch_irn_ops_t *get_irn_ops_simple(const ir_node *node)
627 const ir_op *ops = get_irn_op(node);
628 const arch_irn_ops_t *be_ops = get_op_ops(ops)->be_ops;
629 assert(!is_Proj(node));
633 static inline const arch_register_req_t *arch_get_register_req_out(
637 backend_info_t *info;
639 /* you have to query the Proj nodes for the constraints (or use
640 * arch_get_out_register_req. Querying a mode_T node and expecting
641 * arch_no_register_req is a bug in your code! */
642 assert(get_irn_mode(irn) != mode_T);
645 pos = get_Proj_proj(irn);
646 irn = get_Proj_pred(irn);
649 info = be_get_info(irn);
650 if (info->out_infos == NULL)
651 return arch_no_register_req;
653 return info->out_infos[pos].req;
656 static inline bool arch_irn_is_ignore(const ir_node *irn)
658 const arch_register_req_t *req = arch_get_register_req_out(irn);
659 return !!(req->type & arch_register_req_type_ignore);
662 static inline bool arch_irn_consider_in_reg_alloc(
663 const arch_register_class_t *cls, const ir_node *node)
665 const arch_register_req_t *req = arch_get_register_req_out(node);
668 !(req->type & arch_register_req_type_ignore);
672 * Get register constraints for an operand at position @p
674 static inline const arch_register_req_t *arch_get_in_register_req(
675 const ir_node *node, int pos)
677 const backend_info_t *info = be_get_info(node);
678 if (info->in_reqs == NULL)
679 return arch_no_register_req;
680 return info->in_reqs[pos];
684 * Get register constraint for a produced result (the @p pos result)
686 static inline const arch_register_req_t *arch_get_out_register_req(
687 const ir_node *node, int pos)
689 const backend_info_t *info = be_get_info(node);
690 if (info->out_infos == NULL)
691 return arch_no_register_req;
692 return info->out_infos[pos].req;
695 static inline void arch_set_out_register_req(ir_node *node, int pos,
696 const arch_register_req_t *req)
698 backend_info_t *info = be_get_info(node);
699 assert(pos < (int) arch_irn_get_n_outs(node));
700 info->out_infos[pos].req = req;
703 static inline void arch_set_in_register_reqs(ir_node *node,
704 const arch_register_req_t **in_reqs)
706 backend_info_t *info = be_get_info(node);
707 info->in_reqs = in_reqs;
710 static inline const arch_register_req_t **arch_get_in_register_reqs(
713 backend_info_t *info = be_get_info(node);
714 return info->in_reqs;
718 * Check if the given register is callee save, ie. will be save by the callee.
720 static inline bool arch_register_is_callee_save(
721 const arch_env_t *arch_env,
722 const arch_register_t *reg)
724 if (arch_env->impl->register_saved_by)
725 return arch_env->impl->register_saved_by(reg, /*callee=*/1);
730 * Check if the given register is caller save, ie. must be save by the caller.
732 static inline bool arch_register_is_caller_save(
733 const arch_env_t *arch_env,
734 const arch_register_t *reg)
736 if (arch_env->impl->register_saved_by)
737 return arch_env->impl->register_saved_by(reg, /*callee=*/0);
742 * Iterate over all values defined by an instruction.
743 * Only looks at values in a certain register class where the requirements
744 * are not marked as ignore.
745 * Executes @p code for each definition.
747 #define be_foreach_definition_(node, cls, value, code) \
749 if (get_irn_mode(node) == mode_T) { \
750 const ir_edge_t *edge_; \
751 foreach_out_edge(node, edge_) { \
752 const arch_register_req_t *req_; \
753 value = get_edge_src_irn(edge_); \
754 req_ = arch_get_register_req_out(value); \
755 if (req_->cls != cls) \
760 const arch_register_req_t *req_ = arch_get_register_req_out(node); \
762 if (req_->cls == cls) { \
768 #define be_foreach_definition(node, cls, value, code) \
769 be_foreach_definition_(node, cls, value, \
770 if (req_->type & arch_register_req_type_ignore) \