2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Processor architecture specification.
23 * @author Sebastian Hack
26 #ifndef FIRM_BE_BEARCH_H
27 #define FIRM_BE_BEARCH_H
31 #include "firm_types.h"
34 #include "raw_bitset.h"
42 typedef enum arch_register_class_flags_t {
43 arch_register_class_flag_none = 0,
44 arch_register_class_flag_manual_ra = 1, /**< don't do automatic register allocation for this class */
45 arch_register_class_flag_state = 2
46 } arch_register_class_flags_t;
48 typedef enum arch_register_type_t {
49 arch_register_type_none = 0,
50 arch_register_type_caller_save = 1, /**< The register must be saved by the caller
51 upon a function call. It thus can be overwritten
52 in the called function. */
53 arch_register_type_callee_save = 2, /**< The register must be saved by the caller
54 upon a function call. It thus can be overwritten
55 in the called function. */
56 arch_register_type_ignore = 4, /**< Do not consider this register when allocating. */
57 arch_register_type_joker = 8, /**< The emitter can choose an arbitrary register */
58 arch_register_type_virtual = 16, /**< This is just a virtual register.Virtual registers have
59 nearly no constraints, it is a allowed to have multiple
60 definition for the same register at a point) */
61 arch_register_type_state = 32, /**< The register represents a state that should be handled by
63 } arch_register_type_t;
66 * Different types of register allocation requirements.
68 typedef enum arch_register_req_type_t {
69 arch_register_req_type_none = 0, /**< No register requirement. */
70 arch_register_req_type_normal = 1U << 0, /**< All registers in the class are allowed. */
71 arch_register_req_type_limited = 1U << 1, /**< Only a real subset of the class is allowed. */
72 arch_register_req_type_should_be_same = 1U << 2, /**< The register should be equal to another one at the node. */
73 arch_register_req_type_must_be_different = 1U << 3, /**< The register must be unequal from some other at the node. */
74 arch_register_req_type_ignore = 1U << 4, /**< ignore while allocating registers */
75 arch_register_req_type_produces_sp = 1U << 5, /**< the output produces a new value for the stack pointer */
76 } arch_register_req_type_t;
78 extern const arch_register_req_t *arch_no_register_req;
81 * Print information about a register requirement in human readable form
82 * @param F output stream/file
83 * @param req The requirements structure to format.
85 void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
89 * Node classification. Mainly used for statistics.
91 typedef enum arch_irn_class_t {
92 arch_irn_class_spill = 1 << 0,
93 arch_irn_class_reload = 1 << 1,
94 arch_irn_class_remat = 1 << 2,
95 arch_irn_class_copy = 1 << 3,
96 arch_irn_class_perm = 1 << 4
99 void arch_set_frame_offset(ir_node *irn, int bias);
101 ir_entity *arch_get_frame_entity(const ir_node *irn);
102 void arch_set_frame_entity(ir_node *irn, ir_entity *ent);
103 int arch_get_sp_bias(ir_node *irn);
105 int arch_get_op_estimated_cost(const ir_node *irn);
106 arch_inverse_t *arch_get_inverse(const ir_node *irn, int i, arch_inverse_t *inverse, struct obstack *obstack);
107 int arch_possible_memory_operand(const ir_node *irn, unsigned int i);
108 void arch_perform_memory_operand(ir_node *irn, ir_node *spill, unsigned int i);
111 * Get the register requirements for a node.
112 * @note Deprecated API! Preferably use
113 * arch_get_in_register_req and
114 * arch_get_out_register_req.
116 * @param irn The node.
117 * @param pos The position of the operand you're interested in.
118 * @return A pointer to the register requirements. If NULL is returned, the
119 * operand was no register operand.
121 const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos);
124 * Put all registers which shall not be ignored by the register
125 * allocator in a bit set.
126 * @param cls The register class to consider.
127 * @param bs The bit set to put the registers to.
129 extern void arch_put_non_ignore_regs(const arch_register_class_t *cls, bitset_t *bs);
132 * Check, if a register is assignable to an operand of a node.
133 * @param irn The node.
134 * @param pos The position of the operand.
135 * @param reg The register.
136 * @return 1, if the register might be allocated to the operand 0 if not.
138 int arch_reg_is_allocatable(const ir_node *irn, int pos, const arch_register_t *reg);
140 #define arch_reg_out_is_allocatable(irn, reg) arch_reg_is_allocatable(irn, -1, reg)
143 * Get the register class of an operand of a node.
144 * @param irn The node.
145 * @param pos The position of the operand, -1 for the output.
146 * @return The register class of the operand or NULL, if
147 * operand is a non-register operand.
149 const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn, int pos);
151 #define arch_get_irn_reg_class_out(irn) arch_get_irn_reg_class(irn, -1)
154 * Get the register allocated at a certain output operand of a node.
155 * @param irn The node.
156 * @return The register allocated for this operand
158 const arch_register_t *arch_get_irn_register(const ir_node *irn);
159 const arch_register_t *arch_irn_get_register(const ir_node *irn, int pos);
162 * Set the register for a certain output operand.
163 * @param irn The node.
164 * @param reg The register.
166 void arch_set_irn_register(ir_node *irn, const arch_register_t *reg);
167 void arch_irn_set_register(ir_node *irn, int pos, const arch_register_t *reg);
171 * @param irn The node.
172 * @return A classification of the node.
174 arch_irn_class_t arch_irn_classify(const ir_node *irn);
176 #define arch_irn_class_is(irn, irn_class) ((arch_irn_classify(irn) & arch_irn_class_ ## irn_class) != 0)
179 * Get the flags of a node.
180 * @param irn The node.
183 arch_irn_flags_t arch_irn_get_flags(const ir_node *irn);
185 void arch_irn_set_flags(ir_node *node, arch_irn_flags_t flags);
186 void arch_irn_add_flags(ir_node *node, arch_irn_flags_t flags);
188 #define arch_irn_is(irn, flag) ((arch_irn_get_flags(irn) & arch_irn_flags_ ## flag) != 0)
191 * Get the operations of an irn.
192 * @param self The handler from which the method is invoked.
193 * @param irn Some node.
194 * @return Operations for that irn.
196 typedef const void *(arch_get_irn_ops_t)(const ir_node *irn);
199 * Initialize the architecture environment struct.
200 * @param isa The isa which shall be put into the environment.
201 * @param file_handle The file handle
202 * @return The environment.
204 extern arch_env_t *arch_env_init(const arch_isa_if_t *isa,
205 FILE *file_handle, be_main_env_t *main_env);
208 * Register an instruction set architecture
210 void be_register_isa_if(const char *name, const arch_isa_if_t *isa);
215 struct arch_register_t {
216 const char *name; /**< The name of the register. */
217 const arch_register_class_t *reg_class; /**< The class the register belongs to. */
218 unsigned index; /**< The index of the register in the class. */
219 arch_register_type_t type; /**< The type of the register. */
222 static inline const arch_register_class_t *
223 _arch_register_get_class(const arch_register_t *reg)
225 return reg->reg_class;
229 unsigned _arch_register_get_index(const arch_register_t *reg)
235 const char *_arch_register_get_name(const arch_register_t *reg)
240 #define arch_register_get_class(reg) _arch_register_get_class(reg)
241 #define arch_register_get_index(reg) _arch_register_get_index(reg)
242 #define arch_register_get_name(reg) _arch_register_get_name(reg)
245 * Convenience macro to check for register type.
246 * @param req A pointer to register.
247 * @param kind The kind of type to check for (see arch_register_type_t).
248 * @return 1, If register is of given kind, 0 if not.
250 #define arch_register_type_is(reg, kind) \
251 (((reg)->type & arch_register_type_ ## kind) != 0)
254 * A class of registers.
255 * Like general purpose or floating point.
257 struct arch_register_class_t {
258 unsigned index; /**< index of this register class */
259 const char *name; /**< The name of the register class.*/
260 unsigned n_regs; /**< Number of registers in this
262 ir_mode *mode; /**< The mode of the register class.*/
263 const arch_register_t *regs; /**< The array of registers. */
264 arch_register_class_flags_t flags; /**< register class flags. */
267 /** return the number of registers in this register class */
268 #define arch_register_class_n_regs(cls) ((cls)->n_regs)
270 /** return the largest mode of this register class */
271 #define arch_register_class_mode(cls) ((cls)->mode)
273 /** return the name of this register class */
274 #define arch_register_class_name(cls) ((cls)->name)
276 /** return the index of this register class */
277 #define arch_register_class_index(cls) ((cls)->index)
279 /** return the register class flags */
280 #define arch_register_class_flags(cls) ((cls)->flags)
282 static inline const arch_register_t *
283 _arch_register_for_index(const arch_register_class_t *cls, unsigned idx)
285 assert(idx < cls->n_regs);
286 return &cls->regs[idx];
289 #define arch_register_for_index(cls, idx) _arch_register_for_index(cls, idx)
292 * Convenience macro to check for set constraints.
293 * @param req A pointer to register requirements.
294 * @param kind The kind of constraint to check for (see arch_register_req_type_t).
295 * @return 1, If the kind of constraint is present, 0 if not.
297 #define arch_register_req_is(req, kind) \
298 (((req)->type & (arch_register_req_type_ ## kind)) != 0)
301 * Expresses requirements to register allocation for an operand.
303 struct arch_register_req_t {
304 arch_register_req_type_t type; /**< The type of the constraint. */
305 const arch_register_class_t *cls; /**< The register class this constraint belongs to. */
307 const unsigned *limited; /**< allowed register bitset */
309 unsigned other_same; /**< Bitmask of ins which should use the
310 same register (should_be_same). */
311 unsigned other_different; /**< Bitmask of ins which shall use a
313 (must_be_different) */
316 static inline int reg_reqs_equal(const arch_register_req_t *req1,
317 const arch_register_req_t *req2)
322 if (req1->type != req2->type
323 || req1->cls != req2->cls
324 || req1->other_same != req2->other_same
325 || req1->other_different != req2->other_different)
328 if (req1->limited != NULL) {
331 if (req2->limited == NULL)
334 n_regs = arch_register_class_n_regs(req1->cls);
335 if (!rbitset_equal(req1->limited, req2->limited, n_regs))
343 * An inverse operation returned by the backend
345 struct arch_inverse_t {
346 int n; /**< count of nodes returned in nodes array */
347 int costs; /**< costs of this remat */
349 /**< nodes for this inverse operation. shall be in
350 * schedule order. last element is the target value
355 struct arch_irn_ops_t {
358 * Get the register requirements for a given operand.
359 * @param irn The node.
360 * @param pos The operand's position
361 * @return The register requirements for the selected operand.
362 * The pointer returned is never NULL.
364 const arch_register_req_t *(*get_irn_reg_req_in)(const ir_node *irn, int pos);
367 * Get the register requirements for values produced by a node
368 * @param irn The node.
369 * @param pos The operand's position (0 for most nodes,
370 * 0..n for mode_T nodes)
371 * @return The register requirements for the selected operand.
372 * The pointer returned is never NULL.
374 const arch_register_req_t *(*get_irn_reg_req_out)(const ir_node *irn, int pos);
378 * @param irn The node.
379 * @return A classification.
381 arch_irn_class_t (*classify)(const ir_node *irn);
384 * Get the entity on the stack frame this node depends on.
385 * @param irn The node in question.
386 * @return The entity on the stack frame or NULL, if the node does not have a
387 * stack frame entity.
389 ir_entity *(*get_frame_entity)(const ir_node *irn);
392 * Set the entity on the stack frame this node depends on.
393 * @param irn The node in question.
394 * @param ent The entity to set
396 void (*set_frame_entity)(ir_node *irn, ir_entity *ent);
399 * Set the offset of a node carrying an entity on the stack frame.
400 * @param irn The node.
401 * @param offset The offset of the node's stack frame entity.
403 void (*set_frame_offset)(ir_node *irn, int offset);
406 * Returns the delta of the stackpointer for nodes that increment or
407 * decrement the stackpointer with a constant value. (push, pop
408 * nodes on most architectures).
409 * A positive value stands for an expanding stack area, a negative value for
412 * @param irn The node
413 * @return 0 if the stackpointer is not modified with a constant
414 * value, otherwise the increment/decrement value
416 int (*get_sp_bias)(const ir_node *irn);
419 * Returns an inverse operation which yields the i-th argument
420 * of the given node as result.
422 * @param irn The original operation
423 * @param i Index of the argument we want the inverse operation to yield
424 * @param inverse struct to be filled with the resulting inverse op
425 * @param obstack The obstack to use for allocation of the returned nodes array
426 * @return The inverse operation or NULL if operation invertible
428 arch_inverse_t *(*get_inverse)(const ir_node *irn, int i, arch_inverse_t *inverse, struct obstack *obstack);
431 * Get the estimated cycle count for @p irn.
433 * @param irn The node.
435 * @return The estimated cycle count for this operation
437 int (*get_op_estimated_cost)(const ir_node *irn);
440 * Asks the backend whether operand @p i of @p irn can be loaded form memory internally
442 * @param irn The node.
443 * @param i Index of the argument we would like to know whether @p irn can load it form memory internally
445 * @return nonzero if argument can be loaded or zero otherwise
447 int (*possible_memory_operand)(const ir_node *irn, unsigned int i);
450 * Ask the backend to assimilate @p reload of operand @p i into @p irn.
452 * @param irn The node.
453 * @param spill The spill.
454 * @param i The position of the reload.
456 void (*perform_memory_operand)(ir_node *irn, ir_node *spill, unsigned int i);
460 * The code generator interface.
462 struct arch_code_generator_if_t {
464 * Initialize the code generator.
465 * @param birg A backend IRG session.
466 * @return A newly created code generator.
468 void *(*init)(be_irg_t *birg);
471 * return node used as base in pic code addresses
473 ir_node* (*get_pic_base)(void *self);
476 * Called before abi introduce.
478 void (*before_abi)(void *self);
481 * Called, when the graph is being normalized.
483 void (*prepare_graph)(void *self);
486 * Backend may provide an own spiller.
487 * This spiller needs to spill all register classes.
489 void (*spill)(void *self, be_irg_t *birg);
492 * Called before register allocation.
494 void (*before_ra)(void *self);
497 * Called after register allocation.
499 void (*after_ra)(void *self);
502 * Called directly before done is called. This should be the last place
503 * where the irg is modified.
505 void (*finish)(void *self);
508 * Called after everything happened. This call should emit the final
509 * assembly code but avoid changing the irg.
510 * The code generator must also be de-allocated here.
512 void (*done)(void *self);
516 * helper macro: call function func from the code generator
517 * if it's implemented.
519 #define _arch_cg_call(cg, func) \
521 if((cg)->impl->func) \
522 (cg)->impl->func(cg); \
525 #define _arch_cg_call_env(cg, env, func) \
527 if((cg)->impl->func) \
528 (cg)->impl->func(cg, env); \
531 #define arch_code_generator_before_abi(cg) _arch_cg_call(cg, before_abi)
532 #define arch_code_generator_prepare_graph(cg) _arch_cg_call(cg, prepare_graph)
533 #define arch_code_generator_before_ra(cg) _arch_cg_call(cg, before_ra)
534 #define arch_code_generator_after_ra(cg) _arch_cg_call(cg, after_ra)
535 #define arch_code_generator_finish(cg) _arch_cg_call(cg, finish)
536 #define arch_code_generator_done(cg) _arch_cg_call(cg, done)
537 #define arch_code_generator_spill(cg, birg) _arch_cg_call_env(cg, birg, spill)
538 #define arch_code_generator_has_spiller(cg) ((cg)->impl->spill != NULL)
539 #define arch_code_generator_get_pic_base(cg) \
540 ((cg)->impl->get_pic_base != NULL ? (cg)->impl->get_pic_base(cg) : NULL)
543 * Code generator base class.
545 struct arch_code_generator_t {
546 const arch_code_generator_if_t *impl;
550 * Architecture interface.
552 struct arch_isa_if_t {
554 * Initialize the isa interface.
555 * @param file_handle the file handle to write the output to
556 * @return a new isa instance
558 arch_env_t *(*init)(FILE *file_handle);
561 * Free the isa instance.
563 void (*done)(void *self);
566 * Called directly after initialization. Backend should handle all
569 void (*handle_intrinsics)(void);
572 * Get the the number of register classes in the isa.
573 * @return The number of register classes.
575 unsigned (*get_n_reg_class)(const void *self);
578 * Get the i-th register class.
579 * @param i The number of the register class.
580 * @return The register class.
582 const arch_register_class_t *(*get_reg_class)(const void *self, unsigned i);
585 * Get the register class which shall be used to store a value of a given mode.
586 * @param self The this pointer.
587 * @param mode The mode in question.
588 * @return A register class which can hold values of the given mode.
590 const arch_register_class_t *(*get_reg_class_for_mode)(const void *self, const ir_mode *mode);
593 * Get the ABI restrictions for procedure calls.
594 * @param self The this pointer.
595 * @param call_type The call type of the method (procedure) in question.
596 * @param p The array of parameter locations to be filled.
598 void (*get_call_abi)(const void *self, ir_type *call_type, be_abi_call_t *abi);
601 * Get the code generator interface.
602 * @param self The this pointer.
603 * @return Some code generator interface.
605 const arch_code_generator_if_t *(*get_code_generator_if)(void *self);
608 * Get the list scheduler to use. There is already a selector given, the
609 * backend is free to modify and/or ignore it.
611 * @param self The isa object.
612 * @param selector The selector given by options.
613 * @return The list scheduler selector.
615 const list_sched_selector_t *(*get_list_sched_selector)(const void *self, list_sched_selector_t *selector);
618 * Get the ILP scheduler to use.
619 * @param self The isa object.
620 * @return The ILP scheduler selector
622 const ilp_sched_selector_t *(*get_ilp_sched_selector)(const void *self);
625 * Get the necessary alignment for storing a register of given class.
626 * @param self The isa object.
627 * @param cls The register class.
628 * @return The alignment in bytes.
630 int (*get_reg_class_alignment)(const void *self, const arch_register_class_t *cls);
633 * A "static" function, returns the frontend settings
634 * needed for this backend.
636 const backend_params *(*get_params)(void);
639 * Returns an 2-dim array of execution units, @p irn can be executed on.
640 * The first dimension is the type, the second the allowed units of this
642 * Each dimension is a NULL terminated list.
643 * @param self The isa object.
644 * @param irn The node.
645 * @return An array of allowed execution units.
647 * { unit1_of_tp1, ..., unitX1_of_tp1, NULL },
649 * { unit1_of_tpY, ..., unitXn_of_tpY, NULL },
653 const be_execution_unit_t ***(*get_allowed_execution_units)(const void *self, const ir_node *irn);
656 * Return the abstract machine for this isa.
657 * @param self The isa object.
659 const be_machine_t *(*get_machine)(const void *self);
662 * Return an ordered list of irgs where code should be generated for.
663 * If NULL is returned, all irg will be taken into account and they will be
664 * generated in an arbitrary order.
665 * @param self The isa object.
666 * @param irgs A flexible array ARR_F of length 0 where the backend can append the desired irgs.
667 * @return A flexible array ARR_F containing all desired irgs in the desired order.
669 ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs);
672 * mark node as rematerialized
674 void (*mark_remat)(const void *self, ir_node *node);
677 * parse an assembler constraint part and set flags according to its nature
678 * advances the *c pointer to point to the last parsed character (so if you
679 * parse a single character don't advance c)
681 asm_constraint_flags_t (*parse_asm_constraint)(const void *self, const char **c);
684 * returns true if the string is a valid clobbered (register) in this
687 int (*is_valid_clobber)(const void *self, const char *clobber);
690 #define arch_env_done(env) ((env)->impl->done(env))
691 #define arch_env_handle_intrinsics(env) \
692 do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
693 #define arch_env_get_n_reg_class(env) ((env)->impl->get_n_reg_class(env))
694 #define arch_env_get_reg_class(env,i) ((env)->impl->get_reg_class(env, i))
695 #define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((env), (mode)))
696 #define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((env), (tp), (abi)))
697 #define arch_env_get_code_generator_if(env) ((env)->impl->get_code_generator_if((env)))
698 #define arch_env_get_list_sched_selector(env,selector) ((env)->impl->get_list_sched_selector((env), (selector)))
699 #define arch_env_get_ilp_sched_selector(env) ((env)->impl->get_ilp_sched_selector(env))
700 #define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((env), (cls)))
701 #define arch_env_get_params(env) ((env)->impl->get_params())
702 #define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((env), (irn)))
703 #define arch_env_get_machine(env) ((env)->impl->get_machine(env))
704 #define arch_env_get_backend_irg_list(env,irgs) ((env)->impl->get_backend_irg_list((env), (irgs)))
705 #define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((env), (c))
706 #define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((env), (clobber))
707 #define arch_env_mark_remat(env,node) \
708 do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((env), (node)); } while(0)
714 const arch_isa_if_t *impl;
715 const arch_register_t *sp; /** The stack pointer register. */
716 const arch_register_t *bp; /** The base pointer register. */
717 const arch_register_class_t *link_class; /** The static link pointer register class. */
718 int stack_dir; /** -1 for decreasing, 1 for increasing. */
719 int stack_alignment; /** power of 2 stack alignment */
720 const be_main_env_t *main_env; /** the be main environment */
721 int spill_cost; /** cost for a be_Spill node */
722 int reload_cost; /** cost for a be_Reload node */
725 static inline unsigned arch_irn_get_n_outs(const ir_node *node)
727 backend_info_t *info = be_get_info(node);
728 if (info->out_infos == NULL)
731 return ARR_LEN(info->out_infos);
734 static inline const arch_irn_ops_t *get_irn_ops_simple(const ir_node *node)
736 const ir_op *ops = get_irn_op(node);
737 const arch_irn_ops_t *be_ops = get_op_ops(ops)->be_ops;
738 assert(!is_Proj(node));
742 static inline const arch_register_req_t *arch_get_register_req_out(
746 const arch_irn_ops_t *ops;
749 pos = get_Proj_proj(irn);
750 irn = get_Proj_pred(irn);
751 } else if (get_irn_mode(irn) == mode_T) {
752 return arch_no_register_req;
754 ops = get_irn_ops_simple(irn);
755 return ops->get_irn_reg_req_out(irn, pos);
758 static inline bool arch_irn_is_ignore(const ir_node *irn)
760 const arch_register_req_t *req = arch_get_register_req_out(irn);
761 return !!(req->type & arch_register_req_type_ignore);
764 static inline bool arch_irn_consider_in_reg_alloc(
765 const arch_register_class_t *cls, const ir_node *node)
767 const arch_register_req_t *req = arch_get_register_req_out(node);
770 !(req->type & arch_register_req_type_ignore);
774 * Get register constraints for an operand at position @p
776 static inline const arch_register_req_t *arch_get_in_register_req(
777 const ir_node *node, int pos)
779 const arch_irn_ops_t *ops = get_irn_ops_simple(node);
780 return ops->get_irn_reg_req_in(node, pos);
784 * Get register constraint for a produced result (the @p pos result)
786 static inline const arch_register_req_t *arch_get_out_register_req(
787 const ir_node *node, int pos)
789 const arch_irn_ops_t *ops = get_irn_ops_simple(node);
790 return ops->get_irn_reg_req_out(node, pos);
793 #endif /* FIRM_BE_BEARCH_H */