2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Processor architecture specification.
23 * @author Sebastian Hack
26 #ifndef FIRM_BE_BEARCH_H
27 #define FIRM_BE_BEARCH_H
31 #include "firm_types.h"
34 #include "raw_bitset.h"
43 typedef enum arch_register_class_flags_t {
44 arch_register_class_flag_none = 0,
45 /** don't do automatic register allocation for this class */
46 arch_register_class_flag_manual_ra = 1U << 0,
47 /** the register models an abstract state (example: fpu rounding mode) */
48 arch_register_class_flag_state = 1U << 1
49 } arch_register_class_flags_t;
50 ENUM_BITSET(arch_register_class_flags_t)
52 typedef enum arch_register_type_t {
53 arch_register_type_none = 0,
54 /** The register must be saved by the caller upon a function call. It thus
55 * can be overwritten in the called function. */
56 arch_register_type_caller_save = 1U << 0,
57 /** The register must be saved by the caller upon a function call. It thus
58 * can be overwritten in the called function. */
59 arch_register_type_callee_save = 1U << 1,
60 /** Do not consider this register when allocating. */
61 arch_register_type_ignore = 1U << 2,
62 /** The emitter can choose an arbitrary register. The register fulfills any
63 * register constraints as long as the register class matches */
64 arch_register_type_joker = 1U << 3,
65 /** This is just a virtual register. Virtual registers fulfill any register
66 * constraints as long as the register class matches. It is a allowed to
67 * have multiple definitions for the same virtual register at a point */
68 arch_register_type_virtual = 1U << 4,
69 /** The register represents a state that should be handled by bestate
71 arch_register_type_state = 1U << 5,
72 } arch_register_type_t;
73 ENUM_BITSET(arch_register_type_t)
76 * Different types of register allocation requirements.
78 typedef enum arch_register_req_type_t {
79 /** No register requirement. */
80 arch_register_req_type_none = 0,
81 /** All registers in the class are allowed. */
82 arch_register_req_type_normal = 1U << 0,
83 /** Only a real subset of the class is allowed. */
84 arch_register_req_type_limited = 1U << 1,
85 /** The register should be equal to another one at the node. */
86 arch_register_req_type_should_be_same = 1U << 2,
87 /** The register must be unequal from some other at the node. */
88 arch_register_req_type_must_be_different = 1U << 3,
89 /** The registernumber should be aligned (in case of multiregister values)*/
90 arch_register_req_type_aligned = 1U << 4,
91 /** ignore while allocating registers */
92 arch_register_req_type_ignore = 1U << 5,
93 /** the output produces a new value for the stack pointer
94 * (this is not really a constraint but a marker to guide the stackpointer
96 arch_register_req_type_produces_sp = 1U << 6,
97 } arch_register_req_type_t;
98 ENUM_BITSET(arch_register_req_type_t)
100 extern const arch_register_req_t *arch_no_register_req;
103 * Print information about a register requirement in human readable form
104 * @param F output stream/file
105 * @param req The requirements structure to format.
107 void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
108 const ir_node *node);
110 void arch_dump_register_reqs(FILE *F, const ir_node *node);
111 void arch_dump_reqs_and_registers(FILE *F, const ir_node *node);
114 * Node classification. Used for statistics and for detecting reload nodes.
116 typedef enum arch_irn_class_t {
117 arch_irn_class_none = 0,
118 arch_irn_class_spill = 1 << 0,
119 arch_irn_class_reload = 1 << 1,
120 arch_irn_class_remat = 1 << 2,
121 arch_irn_class_copy = 1 << 3,
122 arch_irn_class_perm = 1 << 4
124 ENUM_BITSET(arch_irn_class_t)
126 void arch_set_frame_offset(ir_node *irn, int bias);
128 ir_entity *arch_get_frame_entity(const ir_node *irn);
129 int arch_get_sp_bias(ir_node *irn);
131 int arch_get_op_estimated_cost(const ir_node *irn);
132 arch_inverse_t *arch_get_inverse(const ir_node *irn, int i,
133 arch_inverse_t *inverse,
134 struct obstack *obstack);
135 int arch_possible_memory_operand(const ir_node *irn,
137 void arch_perform_memory_operand(ir_node *irn, ir_node *spill,
141 * Get the register requirements for a node.
142 * @note Deprecated API! Preferably use
143 * arch_get_in_register_req and
144 * arch_get_out_register_req.
146 * @param irn The node.
147 * @param pos The position of the operand you're interested in.
148 * @return A pointer to the register requirements. If NULL is returned, the
149 * operand was no register operand.
151 const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos);
154 * Check, if a register is assignable to an operand of a node.
155 * @param irn The node.
156 * @param pos The position of the operand.
157 * @param reg The register.
158 * @return 1, if the register might be allocated to the operand 0 if not.
160 int arch_reg_is_allocatable(const ir_node *irn, int pos,
161 const arch_register_t *reg);
163 #define arch_reg_out_is_allocatable(irn, reg) arch_reg_is_allocatable(irn, -1, reg)
166 * Get the register class of an operand of a node.
167 * @param irn The node.
168 * @param pos The position of the operand, -1 for the output.
169 * @return The register class of the operand or NULL, if
170 * operand is a non-register operand.
172 const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn,
175 #define arch_get_irn_reg_class_out(irn) arch_get_irn_reg_class(irn, -1)
178 * Get the register allocated at a certain output operand of a node.
179 * @param irn The node.
180 * @return The register allocated for this operand
182 const arch_register_t *arch_get_irn_register(const ir_node *irn);
183 const arch_register_t *arch_irn_get_register(const ir_node *irn, int pos);
186 * Set the register for a certain output operand.
187 * @param irn The node.
188 * @param reg The register.
190 void arch_set_irn_register(ir_node *irn, const arch_register_t *reg);
191 void arch_irn_set_register(ir_node *irn, int pos, const arch_register_t *reg);
195 * @param irn The node.
196 * @return A classification of the node.
198 arch_irn_class_t arch_irn_classify(const ir_node *irn);
201 * Get the flags of a node.
202 * @param irn The node.
205 arch_irn_flags_t arch_irn_get_flags(const ir_node *irn);
207 void arch_irn_set_flags(ir_node *node, arch_irn_flags_t flags);
208 void arch_irn_add_flags(ir_node *node, arch_irn_flags_t flags);
210 #define arch_irn_is(irn, flag) ((arch_irn_get_flags(irn) & arch_irn_flags_ ## flag) != 0)
213 * Get the operations of an irn.
214 * @param self The handler from which the method is invoked.
215 * @param irn Some node.
216 * @return Operations for that irn.
218 typedef const void *(arch_get_irn_ops_t)(const ir_node *irn);
221 * Initialize the architecture environment struct.
222 * @param isa The isa which shall be put into the environment.
223 * @param file_handle The file handle
224 * @return The environment.
226 extern arch_env_t *arch_env_init(const arch_isa_if_t *isa,
227 FILE *file_handle, be_main_env_t *main_env);
230 * Register an instruction set architecture
232 void be_register_isa_if(const char *name, const arch_isa_if_t *isa);
237 struct arch_register_t {
238 const char *name; /**< The name of the register. */
239 const arch_register_class_t *reg_class; /**< The class of the register */
240 unsigned short index; /**< The index of the register in
242 unsigned short global_index; /** The global index this register
243 in the architecture. */
244 arch_register_type_t type; /**< The type of the register. */
245 /** register constraint allowing just this register */
246 const arch_register_req_t *single_req;
249 static inline const arch_register_class_t *arch_register_get_class(
250 const arch_register_t *reg)
252 return reg->reg_class;
255 static inline unsigned arch_register_get_index(const arch_register_t *reg)
260 static inline const char *arch_register_get_name(const arch_register_t *reg)
266 * A class of registers.
267 * Like general purpose or floating point.
269 struct arch_register_class_t {
270 unsigned index; /**< index of this register class */
271 const char *name; /**< The name of the register class.*/
272 unsigned n_regs; /**< Number of registers in this
274 ir_mode *mode; /**< The mode of the register class.*/
275 const arch_register_t *regs; /**< The array of registers. */
276 arch_register_class_flags_t flags; /**< register class flags. */
277 const arch_register_req_t *class_req;
280 /** return the number of registers in this register class */
281 #define arch_register_class_n_regs(cls) ((cls)->n_regs)
283 /** return the largest mode of this register class */
284 #define arch_register_class_mode(cls) ((cls)->mode)
286 /** return the name of this register class */
287 #define arch_register_class_name(cls) ((cls)->name)
289 /** return the index of this register class */
290 #define arch_register_class_index(cls) ((cls)->index)
292 /** return the register class flags */
293 #define arch_register_class_flags(cls) ((cls)->flags)
295 static inline const arch_register_t *arch_register_for_index(
296 const arch_register_class_t *cls, unsigned idx)
298 assert(idx < cls->n_regs);
299 return &cls->regs[idx];
303 * Convenience macro to check for set constraints.
304 * @param req A pointer to register requirements.
305 * @param kind The kind of constraint to check for
306 * (see arch_register_req_type_t).
307 * @return 1, If the kind of constraint is present, 0 if not.
309 #define arch_register_req_is(req, kind) \
310 (((req)->type & (arch_register_req_type_ ## kind)) != 0)
313 * Expresses requirements to register allocation for an operand.
315 struct arch_register_req_t {
316 arch_register_req_type_t type; /**< The type of the constraint. */
317 const arch_register_class_t *cls; /**< The register class this constraint
319 const unsigned *limited; /**< allowed register bitset */
320 unsigned other_same; /**< Bitmask of ins which should use the
321 same register (should_be_same). */
322 unsigned other_different; /**< Bitmask of ins which shall use a
324 (must_be_different) */
325 unsigned char width; /**< specifies how many sequential
326 registers are required */
329 static inline int reg_reqs_equal(const arch_register_req_t *req1,
330 const arch_register_req_t *req2)
335 if (req1->type != req2->type
336 || req1->cls != req2->cls
337 || req1->other_same != req2->other_same
338 || req1->other_different != req2->other_different)
341 if (req1->limited != NULL) {
344 if (req2->limited == NULL)
347 n_regs = arch_register_class_n_regs(req1->cls);
348 if (!rbitsets_equal(req1->limited, req2->limited, n_regs))
356 * An inverse operation returned by the backend
358 struct arch_inverse_t {
359 int n; /**< count of nodes returned in nodes array */
360 int costs; /**< costs of this remat */
362 /** nodes for this inverse operation. shall be in schedule order.
363 * last element is the target value */
367 struct arch_irn_ops_t {
371 * @param irn The node.
372 * @return A classification.
374 arch_irn_class_t (*classify)(const ir_node *irn);
377 * Get the entity on the stack frame this node depends on.
378 * @param irn The node in question.
379 * @return The entity on the stack frame or NULL, if the node does not have
380 * a stack frame entity.
382 ir_entity *(*get_frame_entity)(const ir_node *irn);
385 * Set the offset of a node carrying an entity on the stack frame.
386 * @param irn The node.
387 * @param offset The offset of the node's stack frame entity.
389 void (*set_frame_offset)(ir_node *irn, int offset);
392 * Returns the delta of the stackpointer for nodes that increment or
393 * decrement the stackpointer with a constant value. (push, pop
394 * nodes on most architectures).
395 * A positive value stands for an expanding stack area, a negative value for
398 * @param irn The node
399 * @return 0 if the stackpointer is not modified with a constant
400 * value, otherwise the increment/decrement value
402 int (*get_sp_bias)(const ir_node *irn);
405 * Returns an inverse operation which yields the i-th argument
406 * of the given node as result.
408 * @param irn The original operation
409 * @param i Index of the argument we want the inverse operation to
411 * @param inverse struct to be filled with the resulting inverse op
412 * @param obstack The obstack to use for allocation of the returned nodes
414 * @return The inverse operation or NULL if operation invertible
416 arch_inverse_t *(*get_inverse)(const ir_node *irn, int i,
417 arch_inverse_t *inverse,
418 struct obstack *obstack);
421 * Get the estimated cycle count for @p irn.
423 * @param irn The node.
424 * @return The estimated cycle count for this operation
426 int (*get_op_estimated_cost)(const ir_node *irn);
429 * Asks the backend whether operand @p i of @p irn can be loaded form memory
432 * @param irn The node.
433 * @param i Index of the argument we would like to know whether @p irn
434 * can load it form memory internally
435 * @return nonzero if argument can be loaded or zero otherwise
437 int (*possible_memory_operand)(const ir_node *irn, unsigned int i);
440 * Ask the backend to assimilate @p reload of operand @p i into @p irn.
442 * @param irn The node.
443 * @param spill The spill.
444 * @param i The position of the reload.
446 void (*perform_memory_operand)(ir_node *irn, ir_node *spill,
451 * Architecture interface.
453 struct arch_isa_if_t {
455 * Initialize the isa interface.
456 * @param file_handle the file handle to write the output to
457 * @return a new isa instance
459 arch_env_t *(*init)(FILE *file_handle);
462 * lowers current program for target. See the documentation for
463 * be_lower_for_target() for details.
465 void (*lower_for_target)(void);
468 * Free the isa instance.
470 void (*done)(void *self);
473 * Called directly after initialization. Backend should handle all
476 void (*handle_intrinsics)(void);
479 * Get the register class which shall be used to store a value of a given
481 * @param self The this pointer.
482 * @param mode The mode in question.
483 * @return A register class which can hold values of the given mode.
485 const arch_register_class_t *(*get_reg_class_for_mode)(const ir_mode *mode);
488 * Get the ABI restrictions for procedure calls.
489 * @param self The this pointer.
490 * @param call_type The call type of the method (procedure) in question.
491 * @param p The array of parameter locations to be filled.
493 void (*get_call_abi)(const void *self, ir_type *call_type,
497 * Get the necessary alignment for storing a register of given class.
498 * @param self The isa object.
499 * @param cls The register class.
500 * @return The alignment in bytes.
502 int (*get_reg_class_alignment)(const arch_register_class_t *cls);
505 * A "static" function, returns the frontend settings
506 * needed for this backend.
508 const backend_params *(*get_params)(void);
511 * Return an ordered list of irgs where code should be generated for.
512 * If NULL is returned, all irg will be taken into account and they will be
513 * generated in an arbitrary order.
514 * @param self The isa object.
515 * @param irgs A flexible array ARR_F of length 0 where the backend can
516 * append the desired irgs.
517 * @return A flexible array ARR_F containing all desired irgs in the
520 ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs);
523 * mark node as rematerialized
525 void (*mark_remat)(ir_node *node);
528 * parse an assembler constraint part and set flags according to its nature
529 * advances the *c pointer to point to the last parsed character (so if you
530 * parse a single character don't advance c)
532 asm_constraint_flags_t (*parse_asm_constraint)(const char **c);
535 * returns true if the string is a valid clobbered (register) in this
538 int (*is_valid_clobber)(const char *clobber);
541 * Initialize the code generator.
543 * @return A newly created code generator.
545 void (*init_graph)(ir_graph *irg);
548 * return node used as base in pic code addresses
550 ir_node* (*get_pic_base)(ir_graph *irg);
553 * Called before abi introduce.
555 void (*before_abi)(ir_graph *irg);
558 * Called, when the graph is being normalized.
560 void (*prepare_graph)(ir_graph *irg);
563 * Called before register allocation.
565 void (*before_ra)(ir_graph *irg);
568 * Called after register allocation.
570 void (*after_ra)(ir_graph *irg);
573 * Called directly before done is called. This should be the last place
574 * where the irg is modified.
576 void (*finish)(ir_graph *irg);
579 * Called after everything happened. This call should emit the final
580 * assembly code but avoid changing the irg.
581 * The code generator must also be de-allocated here.
583 void (*emit)(ir_graph *irg);
586 #define arch_env_done(env) ((env)->impl->done(env))
587 #define arch_env_handle_intrinsics(env) \
588 do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
589 #define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((mode)))
590 #define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((env), (tp), (abi)))
591 #define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((cls)))
592 #define arch_env_get_params(env) ((env)->impl->get_params())
593 #define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((irn)))
594 #define arch_env_get_machine(env) ((env)->impl->get_machine(env))
595 #define arch_env_get_backend_irg_list(env,irgs) ((env)->impl->get_backend_irg_list((env), (irgs)))
596 #define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((c))
597 #define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((clobber))
598 #define arch_env_mark_remat(env,node) \
599 do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0)
605 const arch_isa_if_t *impl;
606 unsigned n_registers; /**< number of registers */
607 const arch_register_t *registers; /**< register array */
608 unsigned n_register_classes; /**< number of register classes*/
609 const arch_register_class_t *register_classes; /**< register classes */
610 const arch_register_t *sp; /**< The stack pointer register. */
611 const arch_register_t *bp; /**< The base pointer register. */
612 const arch_register_class_t *link_class; /**< The static link pointer
614 int stack_dir; /**< -1 for decreasing, 1 for
616 int stack_alignment; /**< power of 2 stack alignment */
617 const be_main_env_t *main_env; /**< the be main environment */
618 int spill_cost; /**< cost for a be_Spill node */
619 int reload_cost; /**< cost for a be_Reload node */
620 bool custom_abi : 1; /**< backend does all abi handling
621 and does not need the generic
622 stuff from beabi.h/.c */
625 static inline unsigned arch_irn_get_n_outs(const ir_node *node)
627 backend_info_t *info = be_get_info(node);
628 if (info->out_infos == NULL)
631 return ARR_LEN(info->out_infos);
634 static inline const arch_irn_ops_t *get_irn_ops_simple(const ir_node *node)
636 const ir_op *ops = get_irn_op(node);
637 const arch_irn_ops_t *be_ops = get_op_ops(ops)->be_ops;
638 assert(!is_Proj(node));
642 static inline const arch_register_req_t *arch_get_register_req_out(
646 backend_info_t *info;
648 /* you have to query the Proj nodes for the constraints (or use
649 * arch_get_out_register_req. Querying a mode_T node and expecting
650 * arch_no_register_req is a bug in your code! */
651 assert(get_irn_mode(irn) != mode_T);
654 pos = get_Proj_proj(irn);
655 irn = get_Proj_pred(irn);
658 info = be_get_info(irn);
659 if (info->out_infos == NULL)
660 return arch_no_register_req;
662 return info->out_infos[pos].req;
665 static inline bool arch_irn_is_ignore(const ir_node *irn)
667 const arch_register_req_t *req = arch_get_register_req_out(irn);
668 return !!(req->type & arch_register_req_type_ignore);
671 static inline bool arch_irn_consider_in_reg_alloc(
672 const arch_register_class_t *cls, const ir_node *node)
674 const arch_register_req_t *req = arch_get_register_req_out(node);
677 !(req->type & arch_register_req_type_ignore);
681 * Get register constraints for an operand at position @p
683 static inline const arch_register_req_t *arch_get_in_register_req(
684 const ir_node *node, int pos)
686 const backend_info_t *info = be_get_info(node);
687 if (info->in_reqs == NULL)
688 return arch_no_register_req;
689 return info->in_reqs[pos];
693 * Get register constraint for a produced result (the @p pos result)
695 static inline const arch_register_req_t *arch_get_out_register_req(
696 const ir_node *node, int pos)
698 const backend_info_t *info = be_get_info(node);
699 if (info->out_infos == NULL)
700 return arch_no_register_req;
701 return info->out_infos[pos].req;
704 static inline void arch_set_out_register_req(ir_node *node, int pos,
705 const arch_register_req_t *req)
707 backend_info_t *info = be_get_info(node);
708 assert(pos < (int) arch_irn_get_n_outs(node));
709 info->out_infos[pos].req = req;
712 static inline void arch_set_in_register_reqs(ir_node *node,
713 const arch_register_req_t **in_reqs)
715 backend_info_t *info = be_get_info(node);
716 info->in_reqs = in_reqs;
719 static inline const arch_register_req_t **arch_get_in_register_reqs(
722 backend_info_t *info = be_get_info(node);
723 return info->in_reqs;
727 * Iterate over all values defined by an instruction.
728 * Only looks at values in a certain register class where the requirements
729 * are not marked as ignore.
730 * Executes @p code for each definition.
732 #define be_foreach_definition_(node, cls, value, code) \
734 if (get_irn_mode(node) == mode_T) { \
735 const ir_edge_t *edge_; \
736 foreach_out_edge(node, edge_) { \
737 const arch_register_req_t *req_; \
738 value = get_edge_src_irn(edge_); \
739 req_ = arch_get_register_req_out(value); \
740 if (req_->cls != cls) \
745 const arch_register_req_t *req_ = arch_get_register_req_out(node); \
747 if (req_->cls == cls) { \
753 #define be_foreach_definition(node, cls, value, code) \
754 be_foreach_definition_(node, cls, value, \
755 if (req_->type & arch_register_req_type_ignore) \