2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Processor architecture specification.
23 * @author Sebastian Hack
26 #ifndef FIRM_BE_BEARCH_H
27 #define FIRM_BE_BEARCH_H
31 #include "firm_types.h"
34 #include "raw_bitset.h"
42 typedef enum arch_register_class_flags_t {
43 arch_register_class_flag_none = 0,
44 arch_register_class_flag_manual_ra = 1, /**< don't do automatic register allocation for this class */
45 arch_register_class_flag_state = 2
46 } arch_register_class_flags_t;
48 typedef enum arch_register_type_t {
49 arch_register_type_none = 0,
50 arch_register_type_caller_save = 1, /**< The register must be saved by the caller
51 upon a function call. It thus can be overwritten
52 in the called function. */
53 arch_register_type_callee_save = 2, /**< The register must be saved by the caller
54 upon a function call. It thus can be overwritten
55 in the called function. */
56 arch_register_type_ignore = 4, /**< Do not consider this register when allocating. */
57 arch_register_type_joker = 8, /**< The emitter can choose an arbitrary register */
58 arch_register_type_virtual = 16, /**< This is just a virtual register.Virtual registers have
59 nearly no constraints, it is a allowed to have multiple
60 definition for the same register at a point) */
61 arch_register_type_state = 32, /**< The register represents a state that should be handled by
63 } arch_register_type_t;
66 * Different types of register allocation requirements.
68 typedef enum arch_register_req_type_t {
69 arch_register_req_type_none = 0, /**< No register requirement. */
70 arch_register_req_type_normal = 1U << 0, /**< All registers in the class are allowed. */
71 arch_register_req_type_limited = 1U << 1, /**< Only a real subset of the class is allowed. */
72 arch_register_req_type_should_be_same = 1U << 2, /**< The register should be equal to another one at the node. */
73 arch_register_req_type_must_be_different = 1U << 3, /**< The register must be unequal from some other at the node. */
74 arch_register_req_type_ignore = 1U << 4, /**< ignore while allocating registers */
75 arch_register_req_type_produces_sp = 1U << 5, /**< the output produces a new value for the stack pointer */
76 } arch_register_req_type_t;
78 extern const arch_register_req_t *arch_no_register_req;
81 * Print information about a register requirement in human readable form
82 * @param F output stream/file
83 * @param req The requirements structure to format.
85 void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
88 void arch_dump_register_reqs(FILE *F, const ir_node *node);
89 void arch_dump_reqs_and_registers(FILE *F, const ir_node *node);
92 * Node classification. Mainly used for statistics.
94 typedef enum arch_irn_class_t {
95 arch_irn_class_spill = 1 << 0,
96 arch_irn_class_reload = 1 << 1,
97 arch_irn_class_remat = 1 << 2,
98 arch_irn_class_copy = 1 << 3,
99 arch_irn_class_perm = 1 << 4
102 void arch_set_frame_offset(ir_node *irn, int bias);
104 ir_entity *arch_get_frame_entity(const ir_node *irn);
105 void arch_set_frame_entity(ir_node *irn, ir_entity *ent);
106 int arch_get_sp_bias(ir_node *irn);
108 int arch_get_op_estimated_cost(const ir_node *irn);
109 arch_inverse_t *arch_get_inverse(const ir_node *irn, int i, arch_inverse_t *inverse, struct obstack *obstack);
110 int arch_possible_memory_operand(const ir_node *irn, unsigned int i);
111 void arch_perform_memory_operand(ir_node *irn, ir_node *spill, unsigned int i);
114 * Get the register requirements for a node.
115 * @note Deprecated API! Preferably use
116 * arch_get_in_register_req and
117 * arch_get_out_register_req.
119 * @param irn The node.
120 * @param pos The position of the operand you're interested in.
121 * @return A pointer to the register requirements. If NULL is returned, the
122 * operand was no register operand.
124 const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos);
127 * Put all registers which shall not be ignored by the register
128 * allocator in a bit set.
129 * @param cls The register class to consider.
130 * @param bs The bit set to put the registers to.
132 extern void arch_put_non_ignore_regs(const arch_register_class_t *cls, bitset_t *bs);
135 * Check, if a register is assignable to an operand of a node.
136 * @param irn The node.
137 * @param pos The position of the operand.
138 * @param reg The register.
139 * @return 1, if the register might be allocated to the operand 0 if not.
141 int arch_reg_is_allocatable(const ir_node *irn, int pos, const arch_register_t *reg);
143 #define arch_reg_out_is_allocatable(irn, reg) arch_reg_is_allocatable(irn, -1, reg)
146 * Get the register class of an operand of a node.
147 * @param irn The node.
148 * @param pos The position of the operand, -1 for the output.
149 * @return The register class of the operand or NULL, if
150 * operand is a non-register operand.
152 const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn, int pos);
154 #define arch_get_irn_reg_class_out(irn) arch_get_irn_reg_class(irn, -1)
157 * Get the register allocated at a certain output operand of a node.
158 * @param irn The node.
159 * @return The register allocated for this operand
161 const arch_register_t *arch_get_irn_register(const ir_node *irn);
162 const arch_register_t *arch_irn_get_register(const ir_node *irn, int pos);
165 * Set the register for a certain output operand.
166 * @param irn The node.
167 * @param reg The register.
169 void arch_set_irn_register(ir_node *irn, const arch_register_t *reg);
170 void arch_irn_set_register(ir_node *irn, int pos, const arch_register_t *reg);
174 * @param irn The node.
175 * @return A classification of the node.
177 arch_irn_class_t arch_irn_classify(const ir_node *irn);
179 #define arch_irn_class_is(irn, irn_class) ((arch_irn_classify(irn) & arch_irn_class_ ## irn_class) != 0)
182 * Get the flags of a node.
183 * @param irn The node.
186 arch_irn_flags_t arch_irn_get_flags(const ir_node *irn);
188 void arch_irn_set_flags(ir_node *node, arch_irn_flags_t flags);
189 void arch_irn_add_flags(ir_node *node, arch_irn_flags_t flags);
191 #define arch_irn_is(irn, flag) ((arch_irn_get_flags(irn) & arch_irn_flags_ ## flag) != 0)
194 * Get the operations of an irn.
195 * @param self The handler from which the method is invoked.
196 * @param irn Some node.
197 * @return Operations for that irn.
199 typedef const void *(arch_get_irn_ops_t)(const ir_node *irn);
202 * Initialize the architecture environment struct.
203 * @param isa The isa which shall be put into the environment.
204 * @param file_handle The file handle
205 * @return The environment.
207 extern arch_env_t *arch_env_init(const arch_isa_if_t *isa,
208 FILE *file_handle, be_main_env_t *main_env);
211 * Register an instruction set architecture
213 void be_register_isa_if(const char *name, const arch_isa_if_t *isa);
218 struct arch_register_t {
219 const char *name; /**< The name of the register. */
220 const arch_register_class_t *reg_class; /**< The class the register belongs to. */
221 unsigned index; /**< The index of the register in the class. */
222 arch_register_type_t type; /**< The type of the register. */
223 const arch_register_req_t *single_req;
226 static inline const arch_register_class_t *_arch_register_get_class(const arch_register_t *reg)
228 return reg->reg_class;
231 static inline unsigned _arch_register_get_index(const arch_register_t *reg)
236 static inline const char *_arch_register_get_name(const arch_register_t *reg)
241 #define arch_register_get_class(reg) _arch_register_get_class(reg)
242 #define arch_register_get_index(reg) _arch_register_get_index(reg)
243 #define arch_register_get_name(reg) _arch_register_get_name(reg)
246 * Convenience macro to check for register type.
247 * @param req A pointer to register.
248 * @param kind The kind of type to check for (see arch_register_type_t).
249 * @return 1, If register is of given kind, 0 if not.
251 #define arch_register_type_is(reg, kind) \
252 (((reg)->type & arch_register_type_ ## kind) != 0)
255 * A class of registers.
256 * Like general purpose or floating point.
258 struct arch_register_class_t {
259 unsigned index; /**< index of this register class */
260 const char *name; /**< The name of the register class.*/
261 unsigned n_regs; /**< Number of registers in this
263 ir_mode *mode; /**< The mode of the register class.*/
264 const arch_register_t *regs; /**< The array of registers. */
265 arch_register_class_flags_t flags; /**< register class flags. */
266 const arch_register_req_t *class_req;
269 /** return the number of registers in this register class */
270 #define arch_register_class_n_regs(cls) ((cls)->n_regs)
272 /** return the largest mode of this register class */
273 #define arch_register_class_mode(cls) ((cls)->mode)
275 /** return the name of this register class */
276 #define arch_register_class_name(cls) ((cls)->name)
278 /** return the index of this register class */
279 #define arch_register_class_index(cls) ((cls)->index)
281 /** return the register class flags */
282 #define arch_register_class_flags(cls) ((cls)->flags)
284 static inline const arch_register_t *_arch_register_for_index(const arch_register_class_t *cls, unsigned idx)
286 assert(idx < cls->n_regs);
287 return &cls->regs[idx];
290 #define arch_register_for_index(cls, idx) _arch_register_for_index(cls, idx)
293 * Convenience macro to check for set constraints.
294 * @param req A pointer to register requirements.
295 * @param kind The kind of constraint to check for (see arch_register_req_type_t).
296 * @return 1, If the kind of constraint is present, 0 if not.
298 #define arch_register_req_is(req, kind) \
299 (((req)->type & (arch_register_req_type_ ## kind)) != 0)
302 * Expresses requirements to register allocation for an operand.
304 struct arch_register_req_t {
305 arch_register_req_type_t type; /**< The type of the constraint. */
306 const arch_register_class_t *cls; /**< The register class this constraint belongs to. */
308 const unsigned *limited; /**< allowed register bitset */
310 unsigned other_same; /**< Bitmask of ins which should use the
311 same register (should_be_same). */
312 unsigned other_different; /**< Bitmask of ins which shall use a
314 (must_be_different) */
317 static inline int reg_reqs_equal(const arch_register_req_t *req1,
318 const arch_register_req_t *req2)
323 if (req1->type != req2->type
324 || req1->cls != req2->cls
325 || req1->other_same != req2->other_same
326 || req1->other_different != req2->other_different)
329 if (req1->limited != NULL) {
332 if (req2->limited == NULL)
335 n_regs = arch_register_class_n_regs(req1->cls);
336 if (!rbitsets_equal(req1->limited, req2->limited, n_regs))
344 * An inverse operation returned by the backend
346 struct arch_inverse_t {
347 int n; /**< count of nodes returned in nodes array */
348 int costs; /**< costs of this remat */
350 /**< nodes for this inverse operation. shall be in
351 * schedule order. last element is the target value
356 struct arch_irn_ops_t {
359 * Get the register requirements for a given operand.
360 * @param irn The node.
361 * @param pos The operand's position
362 * @return The register requirements for the selected operand.
363 * The pointer returned is never NULL.
365 const arch_register_req_t *(*get_irn_reg_req_in)(const ir_node *irn, int pos);
369 * @param irn The node.
370 * @return A classification.
372 arch_irn_class_t (*classify)(const ir_node *irn);
375 * Get the entity on the stack frame this node depends on.
376 * @param irn The node in question.
377 * @return The entity on the stack frame or NULL, if the node does not have a
378 * stack frame entity.
380 ir_entity *(*get_frame_entity)(const ir_node *irn);
383 * Set the entity on the stack frame this node depends on.
384 * @param irn The node in question.
385 * @param ent The entity to set
387 void (*set_frame_entity)(ir_node *irn, ir_entity *ent);
390 * Set the offset of a node carrying an entity on the stack frame.
391 * @param irn The node.
392 * @param offset The offset of the node's stack frame entity.
394 void (*set_frame_offset)(ir_node *irn, int offset);
397 * Returns the delta of the stackpointer for nodes that increment or
398 * decrement the stackpointer with a constant value. (push, pop
399 * nodes on most architectures).
400 * A positive value stands for an expanding stack area, a negative value for
403 * @param irn The node
404 * @return 0 if the stackpointer is not modified with a constant
405 * value, otherwise the increment/decrement value
407 int (*get_sp_bias)(const ir_node *irn);
410 * Returns an inverse operation which yields the i-th argument
411 * of the given node as result.
413 * @param irn The original operation
414 * @param i Index of the argument we want the inverse operation to yield
415 * @param inverse struct to be filled with the resulting inverse op
416 * @param obstack The obstack to use for allocation of the returned nodes array
417 * @return The inverse operation or NULL if operation invertible
419 arch_inverse_t *(*get_inverse)(const ir_node *irn, int i, arch_inverse_t *inverse, struct obstack *obstack);
422 * Get the estimated cycle count for @p irn.
424 * @param irn The node.
426 * @return The estimated cycle count for this operation
428 int (*get_op_estimated_cost)(const ir_node *irn);
431 * Asks the backend whether operand @p i of @p irn can be loaded form memory internally
433 * @param irn The node.
434 * @param i Index of the argument we would like to know whether @p irn can load it form memory internally
436 * @return nonzero if argument can be loaded or zero otherwise
438 int (*possible_memory_operand)(const ir_node *irn, unsigned int i);
441 * Ask the backend to assimilate @p reload of operand @p i into @p irn.
443 * @param irn The node.
444 * @param spill The spill.
445 * @param i The position of the reload.
447 void (*perform_memory_operand)(ir_node *irn, ir_node *spill, unsigned int i);
451 * The code generator interface.
453 struct arch_code_generator_if_t {
455 * Initialize the code generator.
456 * @param birg A backend IRG session.
457 * @return A newly created code generator.
459 void *(*init)(be_irg_t *birg);
462 * return node used as base in pic code addresses
464 ir_node* (*get_pic_base)(void *self);
467 * Called before abi introduce.
469 void (*before_abi)(void *self);
472 * Called, when the graph is being normalized.
474 void (*prepare_graph)(void *self);
477 * Backend may provide an own spiller.
478 * This spiller needs to spill all register classes.
480 void (*spill)(void *self, be_irg_t *birg);
483 * Called before register allocation.
485 void (*before_ra)(void *self);
488 * Called after register allocation.
490 void (*after_ra)(void *self);
493 * Called directly before done is called. This should be the last place
494 * where the irg is modified.
496 void (*finish)(void *self);
499 * Called after everything happened. This call should emit the final
500 * assembly code but avoid changing the irg.
501 * The code generator must also be de-allocated here.
503 void (*done)(void *self);
507 * helper macro: call function func from the code generator
508 * if it's implemented.
510 #define _arch_cg_call(cg, func) \
512 if((cg)->impl->func) \
513 (cg)->impl->func(cg); \
516 #define _arch_cg_call_env(cg, env, func) \
518 if((cg)->impl->func) \
519 (cg)->impl->func(cg, env); \
522 #define arch_code_generator_before_abi(cg) _arch_cg_call(cg, before_abi)
523 #define arch_code_generator_prepare_graph(cg) _arch_cg_call(cg, prepare_graph)
524 #define arch_code_generator_before_ra(cg) _arch_cg_call(cg, before_ra)
525 #define arch_code_generator_after_ra(cg) _arch_cg_call(cg, after_ra)
526 #define arch_code_generator_finish(cg) _arch_cg_call(cg, finish)
527 #define arch_code_generator_done(cg) _arch_cg_call(cg, done)
528 #define arch_code_generator_spill(cg, birg) _arch_cg_call_env(cg, birg, spill)
529 #define arch_code_generator_has_spiller(cg) ((cg)->impl->spill != NULL)
530 #define arch_code_generator_get_pic_base(cg) \
531 ((cg)->impl->get_pic_base != NULL ? (cg)->impl->get_pic_base(cg) : NULL)
534 * Code generator base class.
536 struct arch_code_generator_t {
537 const arch_code_generator_if_t *impl;
541 * Architecture interface.
543 struct arch_isa_if_t {
545 * Initialize the isa interface.
546 * @param file_handle the file handle to write the output to
547 * @return a new isa instance
549 arch_env_t *(*init)(FILE *file_handle);
552 * Free the isa instance.
554 void (*done)(void *self);
557 * Called directly after initialization. Backend should handle all
560 void (*handle_intrinsics)(void);
563 * Get the the number of register classes in the isa.
564 * @return The number of register classes.
566 unsigned (*get_n_reg_class)(void);
569 * Get the i-th register class.
570 * @param i The number of the register class.
571 * @return The register class.
573 const arch_register_class_t *(*get_reg_class)(unsigned i);
576 * Get the register class which shall be used to store a value of a given mode.
577 * @param self The this pointer.
578 * @param mode The mode in question.
579 * @return A register class which can hold values of the given mode.
581 const arch_register_class_t *(*get_reg_class_for_mode)(const ir_mode *mode);
584 * Get the ABI restrictions for procedure calls.
585 * @param self The this pointer.
586 * @param call_type The call type of the method (procedure) in question.
587 * @param p The array of parameter locations to be filled.
589 void (*get_call_abi)(const void *self, ir_type *call_type, be_abi_call_t *abi);
592 * Get the code generator interface.
593 * @param self The this pointer.
594 * @return Some code generator interface.
596 const arch_code_generator_if_t *(*get_code_generator_if)(void *self);
599 * Get the list scheduler to use. There is already a selector given, the
600 * backend is free to modify and/or ignore it.
602 * @param self The isa object.
603 * @param selector The selector given by options.
604 * @return The list scheduler selector.
606 const list_sched_selector_t *(*get_list_sched_selector)(const void *self, list_sched_selector_t *selector);
609 * Get the ILP scheduler to use.
610 * @param self The isa object.
611 * @return The ILP scheduler selector
613 const ilp_sched_selector_t *(*get_ilp_sched_selector)(const void *self);
616 * Get the necessary alignment for storing a register of given class.
617 * @param self The isa object.
618 * @param cls The register class.
619 * @return The alignment in bytes.
621 int (*get_reg_class_alignment)(const arch_register_class_t *cls);
624 * A "static" function, returns the frontend settings
625 * needed for this backend.
627 const backend_params *(*get_params)(void);
630 * Returns an 2-dim array of execution units, @p irn can be executed on.
631 * The first dimension is the type, the second the allowed units of this
633 * Each dimension is a NULL terminated list.
634 * @param self The isa object.
635 * @param irn The node.
636 * @return An array of allowed execution units.
638 * { unit1_of_tp1, ..., unitX1_of_tp1, NULL },
640 * { unit1_of_tpY, ..., unitXn_of_tpY, NULL },
644 const be_execution_unit_t ***(*get_allowed_execution_units)(const ir_node *irn);
647 * Return the abstract machine for this isa.
648 * @param self The isa object.
650 const be_machine_t *(*get_machine)(const void *self);
653 * Return an ordered list of irgs where code should be generated for.
654 * If NULL is returned, all irg will be taken into account and they will be
655 * generated in an arbitrary order.
656 * @param self The isa object.
657 * @param irgs A flexible array ARR_F of length 0 where the backend can append the desired irgs.
658 * @return A flexible array ARR_F containing all desired irgs in the desired order.
660 ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs);
663 * mark node as rematerialized
665 void (*mark_remat)(ir_node *node);
668 * parse an assembler constraint part and set flags according to its nature
669 * advances the *c pointer to point to the last parsed character (so if you
670 * parse a single character don't advance c)
672 asm_constraint_flags_t (*parse_asm_constraint)(const char **c);
675 * returns true if the string is a valid clobbered (register) in this
678 int (*is_valid_clobber)(const char *clobber);
681 #define arch_env_done(env) ((env)->impl->done(env))
682 #define arch_env_handle_intrinsics(env) \
683 do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
684 #define arch_env_get_n_reg_class(env) ((env)->impl->get_n_reg_class())
685 #define arch_env_get_reg_class(env,i) ((env)->impl->get_reg_class(i))
686 #define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((mode)))
687 #define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((env), (tp), (abi)))
688 #define arch_env_get_code_generator_if(env) ((env)->impl->get_code_generator_if((env)))
689 #define arch_env_get_list_sched_selector(env,selector) ((env)->impl->get_list_sched_selector((env), (selector)))
690 #define arch_env_get_ilp_sched_selector(env) ((env)->impl->get_ilp_sched_selector(env))
691 #define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((cls)))
692 #define arch_env_get_params(env) ((env)->impl->get_params())
693 #define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((irn)))
694 #define arch_env_get_machine(env) ((env)->impl->get_machine(env))
695 #define arch_env_get_backend_irg_list(env,irgs) ((env)->impl->get_backend_irg_list((env), (irgs)))
696 #define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((c))
697 #define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((clobber))
698 #define arch_env_mark_remat(env,node) \
699 do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0)
705 const arch_isa_if_t *impl;
706 const arch_register_t *sp; /** The stack pointer register. */
707 const arch_register_t *bp; /** The base pointer register. */
708 const arch_register_class_t *link_class; /** The static link pointer register class. */
709 int stack_dir; /** -1 for decreasing, 1 for increasing. */
710 int stack_alignment; /** power of 2 stack alignment */
711 const be_main_env_t *main_env; /** the be main environment */
712 int spill_cost; /** cost for a be_Spill node */
713 int reload_cost; /** cost for a be_Reload node */
716 static inline unsigned arch_irn_get_n_outs(const ir_node *node)
718 backend_info_t *info = be_get_info(node);
719 if (info->out_infos == NULL)
722 return ARR_LEN(info->out_infos);
725 static inline const arch_irn_ops_t *get_irn_ops_simple(const ir_node *node)
727 const ir_op *ops = get_irn_op(node);
728 const arch_irn_ops_t *be_ops = get_op_ops(ops)->be_ops;
729 assert(!is_Proj(node));
733 static inline const arch_register_req_t *arch_get_register_req_out(
737 backend_info_t *info;
740 pos = get_Proj_proj(irn);
741 irn = get_Proj_pred(irn);
742 } else if (get_irn_mode(irn) == mode_T) {
743 /* TODO: find out who does this and fix the caller! */
744 return arch_no_register_req;
746 info = be_get_info(irn);
747 if (info->out_infos == NULL)
748 return arch_no_register_req;
750 return info->out_infos[pos].req;
753 static inline bool arch_irn_is_ignore(const ir_node *irn)
755 const arch_register_req_t *req = arch_get_register_req_out(irn);
756 return !!(req->type & arch_register_req_type_ignore);
759 static inline bool arch_irn_consider_in_reg_alloc(
760 const arch_register_class_t *cls, const ir_node *node)
762 const arch_register_req_t *req = arch_get_register_req_out(node);
765 !(req->type & arch_register_req_type_ignore);
769 * Get register constraints for an operand at position @p
771 static inline const arch_register_req_t *arch_get_in_register_req(
772 const ir_node *node, int pos)
774 const arch_irn_ops_t *ops = get_irn_ops_simple(node);
775 return ops->get_irn_reg_req_in(node, pos);
779 * Get register constraint for a produced result (the @p pos result)
781 static inline const arch_register_req_t *arch_get_out_register_req(
782 const ir_node *node, int pos)
784 const backend_info_t *info = be_get_info(node);
785 if (info->out_infos == NULL)
786 return arch_no_register_req;
787 return info->out_infos[pos].req;
790 static inline void arch_set_out_register_req(ir_node *node, int pos,
791 const arch_register_req_t *req)
793 backend_info_t *info = be_get_info(node);
794 assert(pos < (int) arch_irn_get_n_outs(node));
795 info->out_infos[pos].req = req;