2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Processor architecture specification.
23 * @author Sebastian Hack
26 #ifndef FIRM_BE_BEARCH_H
27 #define FIRM_BE_BEARCH_H
31 #include "firm_types.h"
34 #include "raw_bitset.h"
43 typedef enum arch_register_class_flags_t {
44 arch_register_class_flag_none = 0,
45 /** don't do automatic register allocation for this class */
46 arch_register_class_flag_manual_ra = 1U << 0,
47 /** the register models an abstract state (example: fpu rounding mode) */
48 arch_register_class_flag_state = 1U << 1
49 } arch_register_class_flags_t;
51 typedef enum arch_register_type_t {
52 arch_register_type_none = 0,
53 /** The register must be saved by the caller upon a function call. It thus
54 * can be overwritten in the called function. */
55 arch_register_type_caller_save = 1U << 0,
56 /** The register must be saved by the caller upon a function call. It thus
57 * can be overwritten in the called function. */
58 arch_register_type_callee_save = 1U << 1,
59 /** Do not consider this register when allocating. */
60 arch_register_type_ignore = 1U << 2,
61 /** The emitter can choose an arbitrary register. The register fulfills any
62 * register constraints as long as the register class matches */
63 arch_register_type_joker = 1U << 3,
64 /** This is just a virtual register. Virtual registers fulfill any register
65 * constraints as long as the register class matches. It is a allowed to
66 * have multiple definitions for the same virtual register at a point */
67 arch_register_type_virtual = 1U << 4,
68 /** The register represents a state that should be handled by bestate
70 arch_register_type_state = 1U << 5,
71 } arch_register_type_t;
74 * Different types of register allocation requirements.
76 typedef enum arch_register_req_type_t {
77 /** No register requirement. */
78 arch_register_req_type_none = 0,
79 /** All registers in the class are allowed. */
80 arch_register_req_type_normal = 1U << 0,
81 /** Only a real subset of the class is allowed. */
82 arch_register_req_type_limited = 1U << 1,
83 /** The register should be equal to another one at the node. */
84 arch_register_req_type_should_be_same = 1U << 2,
85 /** The register must be unequal from some other at the node. */
86 arch_register_req_type_must_be_different = 1U << 3,
87 /** ignore while allocating registers */
88 arch_register_req_type_ignore = 1U << 4,
89 /** the output produces a new value for the stack pointer
90 * (this is not really a constraint but a marker to guide the stackpointer
92 arch_register_req_type_produces_sp = 1U << 5,
93 } arch_register_req_type_t;
95 extern const arch_register_req_t *arch_no_register_req;
98 * Print information about a register requirement in human readable form
99 * @param F output stream/file
100 * @param req The requirements structure to format.
102 void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
103 const ir_node *node);
105 void arch_dump_register_reqs(FILE *F, const ir_node *node);
106 void arch_dump_reqs_and_registers(FILE *F, const ir_node *node);
109 * Node classification. Used for statistics and for detecting reload nodes.
111 typedef enum arch_irn_class_t {
112 arch_irn_class_spill = 1 << 0,
113 arch_irn_class_reload = 1 << 1,
114 arch_irn_class_remat = 1 << 2,
115 arch_irn_class_copy = 1 << 3,
116 arch_irn_class_perm = 1 << 4
119 void arch_set_frame_offset(ir_node *irn, int bias);
121 ir_entity *arch_get_frame_entity(const ir_node *irn);
122 int arch_get_sp_bias(ir_node *irn);
124 int arch_get_op_estimated_cost(const ir_node *irn);
125 arch_inverse_t *arch_get_inverse(const ir_node *irn, int i,
126 arch_inverse_t *inverse,
127 struct obstack *obstack);
128 int arch_possible_memory_operand(const ir_node *irn,
130 void arch_perform_memory_operand(ir_node *irn, ir_node *spill,
134 * Get the register requirements for a node.
135 * @note Deprecated API! Preferably use
136 * arch_get_in_register_req and
137 * arch_get_out_register_req.
139 * @param irn The node.
140 * @param pos The position of the operand you're interested in.
141 * @return A pointer to the register requirements. If NULL is returned, the
142 * operand was no register operand.
144 const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos);
147 * Put all registers which shall not be ignored by the register
148 * allocator in a bit set.
149 * @param cls The register class to consider.
150 * @param bs The bit set to put the registers to.
152 extern void arch_put_non_ignore_regs(const arch_register_class_t *cls,
156 * Check, if a register is assignable to an operand of a node.
157 * @param irn The node.
158 * @param pos The position of the operand.
159 * @param reg The register.
160 * @return 1, if the register might be allocated to the operand 0 if not.
162 int arch_reg_is_allocatable(const ir_node *irn, int pos,
163 const arch_register_t *reg);
165 #define arch_reg_out_is_allocatable(irn, reg) arch_reg_is_allocatable(irn, -1, reg)
168 * Get the register class of an operand of a node.
169 * @param irn The node.
170 * @param pos The position of the operand, -1 for the output.
171 * @return The register class of the operand or NULL, if
172 * operand is a non-register operand.
174 const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn,
177 #define arch_get_irn_reg_class_out(irn) arch_get_irn_reg_class(irn, -1)
180 * Get the register allocated at a certain output operand of a node.
181 * @param irn The node.
182 * @return The register allocated for this operand
184 const arch_register_t *arch_get_irn_register(const ir_node *irn);
185 const arch_register_t *arch_irn_get_register(const ir_node *irn, int pos);
188 * Set the register for a certain output operand.
189 * @param irn The node.
190 * @param reg The register.
192 void arch_set_irn_register(ir_node *irn, const arch_register_t *reg);
193 void arch_irn_set_register(ir_node *irn, int pos, const arch_register_t *reg);
197 * @param irn The node.
198 * @return A classification of the node.
200 arch_irn_class_t arch_irn_classify(const ir_node *irn);
203 * Get the flags of a node.
204 * @param irn The node.
207 arch_irn_flags_t arch_irn_get_flags(const ir_node *irn);
209 void arch_irn_set_flags(ir_node *node, arch_irn_flags_t flags);
210 void arch_irn_add_flags(ir_node *node, arch_irn_flags_t flags);
212 #define arch_irn_is(irn, flag) ((arch_irn_get_flags(irn) & arch_irn_flags_ ## flag) != 0)
215 * Get the operations of an irn.
216 * @param self The handler from which the method is invoked.
217 * @param irn Some node.
218 * @return Operations for that irn.
220 typedef const void *(arch_get_irn_ops_t)(const ir_node *irn);
223 * Initialize the architecture environment struct.
224 * @param isa The isa which shall be put into the environment.
225 * @param file_handle The file handle
226 * @return The environment.
228 extern arch_env_t *arch_env_init(const arch_isa_if_t *isa,
229 FILE *file_handle, be_main_env_t *main_env);
232 * Register an instruction set architecture
234 void be_register_isa_if(const char *name, const arch_isa_if_t *isa);
239 struct arch_register_t {
240 const char *name; /**< The name of the register. */
241 const arch_register_class_t *reg_class; /**< The class of the register */
242 unsigned index; /**< The index of the register in
244 arch_register_type_t type; /**< The type of the register. */
245 /** register constraint allowing just this register */
246 const arch_register_req_t *single_req;
249 static inline const arch_register_class_t *_arch_register_get_class(
250 const arch_register_t *reg)
252 return reg->reg_class;
255 static inline unsigned _arch_register_get_index(const arch_register_t *reg)
260 static inline const char *_arch_register_get_name(const arch_register_t *reg)
265 #define arch_register_get_class(reg) _arch_register_get_class(reg)
266 #define arch_register_get_index(reg) _arch_register_get_index(reg)
267 #define arch_register_get_name(reg) _arch_register_get_name(reg)
270 * Convenience macro to check for register type.
271 * @param req A pointer to register.
272 * @param kind The kind of type to check for (see arch_register_type_t).
273 * @return 1, If register is of given kind, 0 if not.
275 #define arch_register_type_is(reg, kind) \
276 (((reg)->type & arch_register_type_ ## kind) != 0)
279 * A class of registers.
280 * Like general purpose or floating point.
282 struct arch_register_class_t {
283 unsigned index; /**< index of this register class */
284 const char *name; /**< The name of the register class.*/
285 unsigned n_regs; /**< Number of registers in this
287 ir_mode *mode; /**< The mode of the register class.*/
288 const arch_register_t *regs; /**< The array of registers. */
289 arch_register_class_flags_t flags; /**< register class flags. */
290 const arch_register_req_t *class_req;
293 /** return the number of registers in this register class */
294 #define arch_register_class_n_regs(cls) ((cls)->n_regs)
296 /** return the largest mode of this register class */
297 #define arch_register_class_mode(cls) ((cls)->mode)
299 /** return the name of this register class */
300 #define arch_register_class_name(cls) ((cls)->name)
302 /** return the index of this register class */
303 #define arch_register_class_index(cls) ((cls)->index)
305 /** return the register class flags */
306 #define arch_register_class_flags(cls) ((cls)->flags)
308 static inline const arch_register_t *_arch_register_for_index(
309 const arch_register_class_t *cls, unsigned idx)
311 assert(idx < cls->n_regs);
312 return &cls->regs[idx];
315 #define arch_register_for_index(cls, idx) _arch_register_for_index(cls, idx)
318 * Convenience macro to check for set constraints.
319 * @param req A pointer to register requirements.
320 * @param kind The kind of constraint to check for
321 * (see arch_register_req_type_t).
322 * @return 1, If the kind of constraint is present, 0 if not.
324 #define arch_register_req_is(req, kind) \
325 (((req)->type & (arch_register_req_type_ ## kind)) != 0)
328 * Expresses requirements to register allocation for an operand.
330 struct arch_register_req_t {
331 arch_register_req_type_t type; /**< The type of the constraint. */
332 const arch_register_class_t *cls; /**< The register class this constraint
334 const unsigned *limited; /**< allowed register bitset */
335 unsigned other_same; /**< Bitmask of ins which should use the
336 same register (should_be_same). */
337 unsigned other_different; /**< Bitmask of ins which shall use a
339 (must_be_different) */
342 static inline int reg_reqs_equal(const arch_register_req_t *req1,
343 const arch_register_req_t *req2)
348 if (req1->type != req2->type
349 || req1->cls != req2->cls
350 || req1->other_same != req2->other_same
351 || req1->other_different != req2->other_different)
354 if (req1->limited != NULL) {
357 if (req2->limited == NULL)
360 n_regs = arch_register_class_n_regs(req1->cls);
361 if (!rbitsets_equal(req1->limited, req2->limited, n_regs))
369 * An inverse operation returned by the backend
371 struct arch_inverse_t {
372 int n; /**< count of nodes returned in nodes array */
373 int costs; /**< costs of this remat */
375 /** nodes for this inverse operation. shall be in schedule order.
376 * last element is the target value */
380 struct arch_irn_ops_t {
383 * Get the register requirements for a given operand.
384 * @param irn The node.
385 * @param pos The operand's position
386 * @return The register requirements for the selected operand.
387 * The pointer returned is never NULL.
389 const arch_register_req_t *(*get_irn_reg_req_in)(const ir_node *irn,
394 * @param irn The node.
395 * @return A classification.
397 arch_irn_class_t (*classify)(const ir_node *irn);
400 * Get the entity on the stack frame this node depends on.
401 * @param irn The node in question.
402 * @return The entity on the stack frame or NULL, if the node does not have
403 * a stack frame entity.
405 ir_entity *(*get_frame_entity)(const ir_node *irn);
408 * Set the offset of a node carrying an entity on the stack frame.
409 * @param irn The node.
410 * @param offset The offset of the node's stack frame entity.
412 void (*set_frame_offset)(ir_node *irn, int offset);
415 * Returns the delta of the stackpointer for nodes that increment or
416 * decrement the stackpointer with a constant value. (push, pop
417 * nodes on most architectures).
418 * A positive value stands for an expanding stack area, a negative value for
421 * @param irn The node
422 * @return 0 if the stackpointer is not modified with a constant
423 * value, otherwise the increment/decrement value
425 int (*get_sp_bias)(const ir_node *irn);
428 * Returns an inverse operation which yields the i-th argument
429 * of the given node as result.
431 * @param irn The original operation
432 * @param i Index of the argument we want the inverse operation to
434 * @param inverse struct to be filled with the resulting inverse op
435 * @param obstack The obstack to use for allocation of the returned nodes
437 * @return The inverse operation or NULL if operation invertible
439 arch_inverse_t *(*get_inverse)(const ir_node *irn, int i,
440 arch_inverse_t *inverse,
441 struct obstack *obstack);
444 * Get the estimated cycle count for @p irn.
446 * @param irn The node.
447 * @return The estimated cycle count for this operation
449 int (*get_op_estimated_cost)(const ir_node *irn);
452 * Asks the backend whether operand @p i of @p irn can be loaded form memory
455 * @param irn The node.
456 * @param i Index of the argument we would like to know whether @p irn
457 * can load it form memory internally
458 * @return nonzero if argument can be loaded or zero otherwise
460 int (*possible_memory_operand)(const ir_node *irn, unsigned int i);
463 * Ask the backend to assimilate @p reload of operand @p i into @p irn.
465 * @param irn The node.
466 * @param spill The spill.
467 * @param i The position of the reload.
469 void (*perform_memory_operand)(ir_node *irn, ir_node *spill,
474 * The code generator interface.
476 struct arch_code_generator_if_t {
478 * Initialize the code generator.
480 * @return A newly created code generator.
482 void *(*init)(ir_graph *irg);
485 * return node used as base in pic code addresses
487 ir_node* (*get_pic_base)(void *self);
490 * Called before abi introduce.
492 void (*before_abi)(void *self);
495 * Called, when the graph is being normalized.
497 void (*prepare_graph)(void *self);
500 * Backend may provide an own spiller.
501 * This spiller needs to spill all register classes.
503 void (*spill)(void *self, ir_graph *irg);
506 * Called before register allocation.
508 void (*before_ra)(void *self);
511 * Called after register allocation.
513 void (*after_ra)(void *self);
516 * Called directly before done is called. This should be the last place
517 * where the irg is modified.
519 void (*finish)(void *self);
522 * Called after everything happened. This call should emit the final
523 * assembly code but avoid changing the irg.
524 * The code generator must also be de-allocated here.
526 void (*done)(void *self);
530 * helper macro: call function func from the code generator
531 * if it's implemented.
533 #define _arch_cg_call(cg, func) \
535 if((cg)->impl->func) \
536 (cg)->impl->func(cg); \
539 #define _arch_cg_call_env(cg, env, func) \
541 if((cg)->impl->func) \
542 (cg)->impl->func(cg, env); \
545 #define arch_code_generator_before_abi(cg) _arch_cg_call(cg, before_abi)
546 #define arch_code_generator_prepare_graph(cg) _arch_cg_call(cg, prepare_graph)
547 #define arch_code_generator_before_ra(cg) _arch_cg_call(cg, before_ra)
548 #define arch_code_generator_after_ra(cg) _arch_cg_call(cg, after_ra)
549 #define arch_code_generator_finish(cg) _arch_cg_call(cg, finish)
550 #define arch_code_generator_done(cg) _arch_cg_call(cg, done)
551 #define arch_code_generator_spill(cg, irg) _arch_cg_call_env(cg, irg, spill)
552 #define arch_code_generator_has_spiller(cg) ((cg)->impl->spill != NULL)
553 #define arch_code_generator_get_pic_base(cg) \
554 ((cg)->impl->get_pic_base != NULL ? (cg)->impl->get_pic_base(cg) : NULL)
557 * Code generator base class.
559 struct arch_code_generator_t {
560 const arch_code_generator_if_t *impl;
564 * Architecture interface.
566 struct arch_isa_if_t {
568 * Initialize the isa interface.
569 * @param file_handle the file handle to write the output to
570 * @return a new isa instance
572 arch_env_t *(*init)(FILE *file_handle);
575 * Free the isa instance.
577 void (*done)(void *self);
580 * Called directly after initialization. Backend should handle all
583 void (*handle_intrinsics)(void);
586 * Get the the number of register classes in the isa.
587 * @return The number of register classes.
589 unsigned (*get_n_reg_class)(void);
592 * Get the i-th register class.
593 * @param i The number of the register class.
594 * @return The register class.
596 const arch_register_class_t *(*get_reg_class)(unsigned i);
599 * Get the register class which shall be used to store a value of a given
601 * @param self The this pointer.
602 * @param mode The mode in question.
603 * @return A register class which can hold values of the given mode.
605 const arch_register_class_t *(*get_reg_class_for_mode)(const ir_mode *mode);
608 * Get the ABI restrictions for procedure calls.
609 * @param self The this pointer.
610 * @param call_type The call type of the method (procedure) in question.
611 * @param p The array of parameter locations to be filled.
613 void (*get_call_abi)(const void *self, ir_type *call_type,
617 * Get the code generator interface.
618 * @param self The this pointer.
619 * @return Some code generator interface.
621 const arch_code_generator_if_t *(*get_code_generator_if)(void *self);
624 * Get the list scheduler to use. There is already a selector given, the
625 * backend is free to modify and/or ignore it.
627 * @param self The isa object.
628 * @param selector The selector given by options.
629 * @return The list scheduler selector.
631 const list_sched_selector_t *(*get_list_sched_selector)(const void *self,
632 list_sched_selector_t *selector);
635 * Get the ILP scheduler to use.
636 * @param self The isa object.
637 * @return The ILP scheduler selector
639 const ilp_sched_selector_t *(*get_ilp_sched_selector)(const void *self);
642 * Get the necessary alignment for storing a register of given class.
643 * @param self The isa object.
644 * @param cls The register class.
645 * @return The alignment in bytes.
647 int (*get_reg_class_alignment)(const arch_register_class_t *cls);
650 * A "static" function, returns the frontend settings
651 * needed for this backend.
653 const backend_params *(*get_params)(void);
656 * Returns an 2-dim array of execution units, @p irn can be executed on.
657 * The first dimension is the type, the second the allowed units of this
659 * Each dimension is a NULL terminated list.
660 * @param self The isa object.
661 * @param irn The node.
662 * @return An array of allowed execution units.
664 * { unit1_of_tp1, ..., unitX1_of_tp1, NULL },
666 * { unit1_of_tpY, ..., unitXn_of_tpY, NULL },
670 const be_execution_unit_t ***(*get_allowed_execution_units)(
674 * Return the abstract machine for this isa.
675 * @param self The isa object.
677 const be_machine_t *(*get_machine)(const void *self);
680 * Return an ordered list of irgs where code should be generated for.
681 * If NULL is returned, all irg will be taken into account and they will be
682 * generated in an arbitrary order.
683 * @param self The isa object.
684 * @param irgs A flexible array ARR_F of length 0 where the backend can
685 * append the desired irgs.
686 * @return A flexible array ARR_F containing all desired irgs in the
689 ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs);
692 * mark node as rematerialized
694 void (*mark_remat)(ir_node *node);
697 * parse an assembler constraint part and set flags according to its nature
698 * advances the *c pointer to point to the last parsed character (so if you
699 * parse a single character don't advance c)
701 asm_constraint_flags_t (*parse_asm_constraint)(const char **c);
704 * returns true if the string is a valid clobbered (register) in this
707 int (*is_valid_clobber)(const char *clobber);
710 #define arch_env_done(env) ((env)->impl->done(env))
711 #define arch_env_handle_intrinsics(env) \
712 do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
713 #define arch_env_get_n_reg_class(env) ((env)->impl->get_n_reg_class())
714 #define arch_env_get_reg_class(env,i) ((env)->impl->get_reg_class(i))
715 #define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((mode)))
716 #define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((env), (tp), (abi)))
717 #define arch_env_get_code_generator_if(env) ((env)->impl->get_code_generator_if((env)))
718 #define arch_env_get_list_sched_selector(env,selector) ((env)->impl->get_list_sched_selector((env), (selector)))
719 #define arch_env_get_ilp_sched_selector(env) ((env)->impl->get_ilp_sched_selector(env))
720 #define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((cls)))
721 #define arch_env_get_params(env) ((env)->impl->get_params())
722 #define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((irn)))
723 #define arch_env_get_machine(env) ((env)->impl->get_machine(env))
724 #define arch_env_get_backend_irg_list(env,irgs) ((env)->impl->get_backend_irg_list((env), (irgs)))
725 #define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((c))
726 #define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((clobber))
727 #define arch_env_mark_remat(env,node) \
728 do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0)
734 const arch_isa_if_t *impl;
735 const arch_register_t *sp; /**< The stack pointer register. */
736 const arch_register_t *bp; /**< The base pointer register. */
737 const arch_register_class_t *link_class; /**< The static link pointer
739 int stack_dir; /**< -1 for decreasing, 1 for
741 int stack_alignment; /**< power of 2 stack alignment */
742 const be_main_env_t *main_env; /**< the be main environment */
743 int spill_cost; /**< cost for a be_Spill node */
744 int reload_cost; /**< cost for a be_Reload node */
745 bool custom_abi : 1; /**< backend does all abi handling
746 and does not need the generic stuff
750 static inline unsigned arch_irn_get_n_outs(const ir_node *node)
752 backend_info_t *info = be_get_info(node);
753 if (info->out_infos == NULL)
756 return ARR_LEN(info->out_infos);
759 static inline const arch_irn_ops_t *get_irn_ops_simple(const ir_node *node)
761 const ir_op *ops = get_irn_op(node);
762 const arch_irn_ops_t *be_ops = get_op_ops(ops)->be_ops;
763 assert(!is_Proj(node));
767 static inline const arch_register_req_t *arch_get_register_req_out(
771 backend_info_t *info;
773 /* you have to query the Proj nodes for the constraints (or use
774 * arch_get_out_register_req. Querying a mode_T node and expecting
775 * arch_no_register_req is a bug in your code! */
776 assert(get_irn_mode(irn) != mode_T);
779 pos = get_Proj_proj(irn);
780 irn = get_Proj_pred(irn);
783 info = be_get_info(irn);
784 if (info->out_infos == NULL)
785 return arch_no_register_req;
787 return info->out_infos[pos].req;
790 static inline bool arch_irn_is_ignore(const ir_node *irn)
792 const arch_register_req_t *req = arch_get_register_req_out(irn);
793 return !!(req->type & arch_register_req_type_ignore);
796 static inline bool arch_irn_consider_in_reg_alloc(
797 const arch_register_class_t *cls, const ir_node *node)
799 const arch_register_req_t *req = arch_get_register_req_out(node);
802 !(req->type & arch_register_req_type_ignore);
806 * Get register constraints for an operand at position @p
808 static inline const arch_register_req_t *arch_get_in_register_req(
809 const ir_node *node, int pos)
811 const arch_irn_ops_t *ops = get_irn_ops_simple(node);
812 return ops->get_irn_reg_req_in(node, pos);
816 * Get register constraint for a produced result (the @p pos result)
818 static inline const arch_register_req_t *arch_get_out_register_req(
819 const ir_node *node, int pos)
821 const backend_info_t *info = be_get_info(node);
822 if (info->out_infos == NULL)
823 return arch_no_register_req;
824 return info->out_infos[pos].req;
827 static inline void arch_set_out_register_req(ir_node *node, int pos,
828 const arch_register_req_t *req)
830 backend_info_t *info = be_get_info(node);
831 assert(pos < (int) arch_irn_get_n_outs(node));
832 info->out_infos[pos].req = req;