2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Processor architecture specification.
23 * @author Sebastian Hack
26 #ifndef FIRM_BE_BEARCH_H
27 #define FIRM_BE_BEARCH_H
31 #include "firm_types.h"
34 #include "raw_bitset.h"
42 typedef enum arch_register_class_flags_t {
43 arch_register_class_flag_none = 0,
44 arch_register_class_flag_manual_ra = 1, /**< don't do automatic register allocation for this class */
45 arch_register_class_flag_state = 2
46 } arch_register_class_flags_t;
48 typedef enum arch_register_type_t {
49 arch_register_type_none = 0,
50 arch_register_type_caller_save = 1, /**< The register must be saved by the caller
51 upon a function call. It thus can be overwritten
52 in the called function. */
53 arch_register_type_callee_save = 2, /**< The register must be saved by the caller
54 upon a function call. It thus can be overwritten
55 in the called function. */
56 arch_register_type_ignore = 4, /**< Do not consider this register when allocating. */
57 arch_register_type_joker = 8, /**< The emitter can choose an arbitrary register */
58 arch_register_type_virtual = 16, /**< This is just a virtual register.Virtual registers have
59 nearly no constraints, it is a allowed to have multiple
60 definition for the same register at a point) */
61 arch_register_type_state = 32, /**< The register represents a state that should be handled by
63 } arch_register_type_t;
66 * Different types of register allocation requirements.
68 typedef enum arch_register_req_type_t {
69 arch_register_req_type_none = 0, /**< No register requirement. */
70 arch_register_req_type_normal = 1U << 0, /**< All registers in the class are allowed. */
71 arch_register_req_type_limited = 1U << 1, /**< Only a real subset of the class is allowed. */
72 arch_register_req_type_should_be_same = 1U << 2, /**< The register should be equal to another one at the node. */
73 arch_register_req_type_must_be_different = 1U << 3, /**< The register must be unequal from some other at the node. */
74 arch_register_req_type_ignore = 1U << 4, /**< ignore while allocating registers */
75 arch_register_req_type_produces_sp = 1U << 5, /**< the output produces a new value for the stack pointer */
76 } arch_register_req_type_t;
78 extern const arch_register_req_t *arch_no_register_req;
81 * Print information about a register requirement in human readable form
82 * @param F output stream/file
83 * @param req The requirements structure to format.
85 void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
88 void arch_dump_register_reqs(FILE *F, const ir_node *node);
89 void arch_dump_reqs_and_registers(FILE *F, const ir_node *node);
92 * Node classification. Mainly used for statistics.
94 typedef enum arch_irn_class_t {
95 arch_irn_class_spill = 1 << 0,
96 arch_irn_class_reload = 1 << 1,
97 arch_irn_class_remat = 1 << 2,
98 arch_irn_class_copy = 1 << 3,
99 arch_irn_class_perm = 1 << 4
102 void arch_set_frame_offset(ir_node *irn, int bias);
104 ir_entity *arch_get_frame_entity(const ir_node *irn);
105 void arch_set_frame_entity(ir_node *irn, ir_entity *ent);
106 int arch_get_sp_bias(ir_node *irn);
108 int arch_get_op_estimated_cost(const ir_node *irn);
109 arch_inverse_t *arch_get_inverse(const ir_node *irn, int i, arch_inverse_t *inverse, struct obstack *obstack);
110 int arch_possible_memory_operand(const ir_node *irn, unsigned int i);
111 void arch_perform_memory_operand(ir_node *irn, ir_node *spill, unsigned int i);
114 * Get the register requirements for a node.
115 * @note Deprecated API! Preferably use
116 * arch_get_in_register_req and
117 * arch_get_out_register_req.
119 * @param irn The node.
120 * @param pos The position of the operand you're interested in.
121 * @return A pointer to the register requirements. If NULL is returned, the
122 * operand was no register operand.
124 const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos);
127 * Put all registers which shall not be ignored by the register
128 * allocator in a bit set.
129 * @param cls The register class to consider.
130 * @param bs The bit set to put the registers to.
132 extern void arch_put_non_ignore_regs(const arch_register_class_t *cls, bitset_t *bs);
135 * Check, if a register is assignable to an operand of a node.
136 * @param irn The node.
137 * @param pos The position of the operand.
138 * @param reg The register.
139 * @return 1, if the register might be allocated to the operand 0 if not.
141 int arch_reg_is_allocatable(const ir_node *irn, int pos, const arch_register_t *reg);
143 #define arch_reg_out_is_allocatable(irn, reg) arch_reg_is_allocatable(irn, -1, reg)
146 * Get the register class of an operand of a node.
147 * @param irn The node.
148 * @param pos The position of the operand, -1 for the output.
149 * @return The register class of the operand or NULL, if
150 * operand is a non-register operand.
152 const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn, int pos);
154 #define arch_get_irn_reg_class_out(irn) arch_get_irn_reg_class(irn, -1)
157 * Get the register allocated at a certain output operand of a node.
158 * @param irn The node.
159 * @return The register allocated for this operand
161 const arch_register_t *arch_get_irn_register(const ir_node *irn);
162 const arch_register_t *arch_irn_get_register(const ir_node *irn, int pos);
165 * Set the register for a certain output operand.
166 * @param irn The node.
167 * @param reg The register.
169 void arch_set_irn_register(ir_node *irn, const arch_register_t *reg);
170 void arch_irn_set_register(ir_node *irn, int pos, const arch_register_t *reg);
174 * @param irn The node.
175 * @return A classification of the node.
177 arch_irn_class_t arch_irn_classify(const ir_node *irn);
179 #define arch_irn_class_is(irn, irn_class) ((arch_irn_classify(irn) & arch_irn_class_ ## irn_class) != 0)
182 * Get the flags of a node.
183 * @param irn The node.
186 arch_irn_flags_t arch_irn_get_flags(const ir_node *irn);
188 void arch_irn_set_flags(ir_node *node, arch_irn_flags_t flags);
189 void arch_irn_add_flags(ir_node *node, arch_irn_flags_t flags);
191 #define arch_irn_is(irn, flag) ((arch_irn_get_flags(irn) & arch_irn_flags_ ## flag) != 0)
194 * Get the operations of an irn.
195 * @param self The handler from which the method is invoked.
196 * @param irn Some node.
197 * @return Operations for that irn.
199 typedef const void *(arch_get_irn_ops_t)(const ir_node *irn);
202 * Initialize the architecture environment struct.
203 * @param isa The isa which shall be put into the environment.
204 * @param file_handle The file handle
205 * @return The environment.
207 extern arch_env_t *arch_env_init(const arch_isa_if_t *isa,
208 FILE *file_handle, be_main_env_t *main_env);
211 * Register an instruction set architecture
213 void be_register_isa_if(const char *name, const arch_isa_if_t *isa);
218 struct arch_register_t {
219 const char *name; /**< The name of the register. */
220 const arch_register_class_t *reg_class; /**< The class the register belongs to. */
221 unsigned index; /**< The index of the register in the class. */
222 arch_register_type_t type; /**< The type of the register. */
223 const arch_register_req_t *single_req;
226 static inline const arch_register_class_t *
227 _arch_register_get_class(const arch_register_t *reg)
229 return reg->reg_class;
233 unsigned _arch_register_get_index(const arch_register_t *reg)
239 const char *_arch_register_get_name(const arch_register_t *reg)
244 #define arch_register_get_class(reg) _arch_register_get_class(reg)
245 #define arch_register_get_index(reg) _arch_register_get_index(reg)
246 #define arch_register_get_name(reg) _arch_register_get_name(reg)
249 * Convenience macro to check for register type.
250 * @param req A pointer to register.
251 * @param kind The kind of type to check for (see arch_register_type_t).
252 * @return 1, If register is of given kind, 0 if not.
254 #define arch_register_type_is(reg, kind) \
255 (((reg)->type & arch_register_type_ ## kind) != 0)
258 * A class of registers.
259 * Like general purpose or floating point.
261 struct arch_register_class_t {
262 unsigned index; /**< index of this register class */
263 const char *name; /**< The name of the register class.*/
264 unsigned n_regs; /**< Number of registers in this
266 ir_mode *mode; /**< The mode of the register class.*/
267 const arch_register_t *regs; /**< The array of registers. */
268 arch_register_class_flags_t flags; /**< register class flags. */
269 const arch_register_req_t *class_req;
272 /** return the number of registers in this register class */
273 #define arch_register_class_n_regs(cls) ((cls)->n_regs)
275 /** return the largest mode of this register class */
276 #define arch_register_class_mode(cls) ((cls)->mode)
278 /** return the name of this register class */
279 #define arch_register_class_name(cls) ((cls)->name)
281 /** return the index of this register class */
282 #define arch_register_class_index(cls) ((cls)->index)
284 /** return the register class flags */
285 #define arch_register_class_flags(cls) ((cls)->flags)
287 static inline const arch_register_t *
288 _arch_register_for_index(const arch_register_class_t *cls, unsigned idx)
290 assert(idx < cls->n_regs);
291 return &cls->regs[idx];
294 #define arch_register_for_index(cls, idx) _arch_register_for_index(cls, idx)
297 * Convenience macro to check for set constraints.
298 * @param req A pointer to register requirements.
299 * @param kind The kind of constraint to check for (see arch_register_req_type_t).
300 * @return 1, If the kind of constraint is present, 0 if not.
302 #define arch_register_req_is(req, kind) \
303 (((req)->type & (arch_register_req_type_ ## kind)) != 0)
306 * Expresses requirements to register allocation for an operand.
308 struct arch_register_req_t {
309 arch_register_req_type_t type; /**< The type of the constraint. */
310 const arch_register_class_t *cls; /**< The register class this constraint belongs to. */
312 const unsigned *limited; /**< allowed register bitset */
314 unsigned other_same; /**< Bitmask of ins which should use the
315 same register (should_be_same). */
316 unsigned other_different; /**< Bitmask of ins which shall use a
318 (must_be_different) */
321 static inline int reg_reqs_equal(const arch_register_req_t *req1,
322 const arch_register_req_t *req2)
327 if (req1->type != req2->type
328 || req1->cls != req2->cls
329 || req1->other_same != req2->other_same
330 || req1->other_different != req2->other_different)
333 if (req1->limited != NULL) {
336 if (req2->limited == NULL)
339 n_regs = arch_register_class_n_regs(req1->cls);
340 if (!rbitset_equal(req1->limited, req2->limited, n_regs))
348 * An inverse operation returned by the backend
350 struct arch_inverse_t {
351 int n; /**< count of nodes returned in nodes array */
352 int costs; /**< costs of this remat */
354 /**< nodes for this inverse operation. shall be in
355 * schedule order. last element is the target value
360 struct arch_irn_ops_t {
363 * Get the register requirements for a given operand.
364 * @param irn The node.
365 * @param pos The operand's position
366 * @return The register requirements for the selected operand.
367 * The pointer returned is never NULL.
369 const arch_register_req_t *(*get_irn_reg_req_in)(const ir_node *irn, int pos);
373 * @param irn The node.
374 * @return A classification.
376 arch_irn_class_t (*classify)(const ir_node *irn);
379 * Get the entity on the stack frame this node depends on.
380 * @param irn The node in question.
381 * @return The entity on the stack frame or NULL, if the node does not have a
382 * stack frame entity.
384 ir_entity *(*get_frame_entity)(const ir_node *irn);
387 * Set the entity on the stack frame this node depends on.
388 * @param irn The node in question.
389 * @param ent The entity to set
391 void (*set_frame_entity)(ir_node *irn, ir_entity *ent);
394 * Set the offset of a node carrying an entity on the stack frame.
395 * @param irn The node.
396 * @param offset The offset of the node's stack frame entity.
398 void (*set_frame_offset)(ir_node *irn, int offset);
401 * Returns the delta of the stackpointer for nodes that increment or
402 * decrement the stackpointer with a constant value. (push, pop
403 * nodes on most architectures).
404 * A positive value stands for an expanding stack area, a negative value for
407 * @param irn The node
408 * @return 0 if the stackpointer is not modified with a constant
409 * value, otherwise the increment/decrement value
411 int (*get_sp_bias)(const ir_node *irn);
414 * Returns an inverse operation which yields the i-th argument
415 * of the given node as result.
417 * @param irn The original operation
418 * @param i Index of the argument we want the inverse operation to yield
419 * @param inverse struct to be filled with the resulting inverse op
420 * @param obstack The obstack to use for allocation of the returned nodes array
421 * @return The inverse operation or NULL if operation invertible
423 arch_inverse_t *(*get_inverse)(const ir_node *irn, int i, arch_inverse_t *inverse, struct obstack *obstack);
426 * Get the estimated cycle count for @p irn.
428 * @param irn The node.
430 * @return The estimated cycle count for this operation
432 int (*get_op_estimated_cost)(const ir_node *irn);
435 * Asks the backend whether operand @p i of @p irn can be loaded form memory internally
437 * @param irn The node.
438 * @param i Index of the argument we would like to know whether @p irn can load it form memory internally
440 * @return nonzero if argument can be loaded or zero otherwise
442 int (*possible_memory_operand)(const ir_node *irn, unsigned int i);
445 * Ask the backend to assimilate @p reload of operand @p i into @p irn.
447 * @param irn The node.
448 * @param spill The spill.
449 * @param i The position of the reload.
451 void (*perform_memory_operand)(ir_node *irn, ir_node *spill, unsigned int i);
455 * The code generator interface.
457 struct arch_code_generator_if_t {
459 * Initialize the code generator.
460 * @param birg A backend IRG session.
461 * @return A newly created code generator.
463 void *(*init)(be_irg_t *birg);
466 * return node used as base in pic code addresses
468 ir_node* (*get_pic_base)(void *self);
471 * Called before abi introduce.
473 void (*before_abi)(void *self);
476 * Called, when the graph is being normalized.
478 void (*prepare_graph)(void *self);
481 * Backend may provide an own spiller.
482 * This spiller needs to spill all register classes.
484 void (*spill)(void *self, be_irg_t *birg);
487 * Called before register allocation.
489 void (*before_ra)(void *self);
492 * Called after register allocation.
494 void (*after_ra)(void *self);
497 * Called directly before done is called. This should be the last place
498 * where the irg is modified.
500 void (*finish)(void *self);
503 * Called after everything happened. This call should emit the final
504 * assembly code but avoid changing the irg.
505 * The code generator must also be de-allocated here.
507 void (*done)(void *self);
511 * helper macro: call function func from the code generator
512 * if it's implemented.
514 #define _arch_cg_call(cg, func) \
516 if((cg)->impl->func) \
517 (cg)->impl->func(cg); \
520 #define _arch_cg_call_env(cg, env, func) \
522 if((cg)->impl->func) \
523 (cg)->impl->func(cg, env); \
526 #define arch_code_generator_before_abi(cg) _arch_cg_call(cg, before_abi)
527 #define arch_code_generator_prepare_graph(cg) _arch_cg_call(cg, prepare_graph)
528 #define arch_code_generator_before_ra(cg) _arch_cg_call(cg, before_ra)
529 #define arch_code_generator_after_ra(cg) _arch_cg_call(cg, after_ra)
530 #define arch_code_generator_finish(cg) _arch_cg_call(cg, finish)
531 #define arch_code_generator_done(cg) _arch_cg_call(cg, done)
532 #define arch_code_generator_spill(cg, birg) _arch_cg_call_env(cg, birg, spill)
533 #define arch_code_generator_has_spiller(cg) ((cg)->impl->spill != NULL)
534 #define arch_code_generator_get_pic_base(cg) \
535 ((cg)->impl->get_pic_base != NULL ? (cg)->impl->get_pic_base(cg) : NULL)
538 * Code generator base class.
540 struct arch_code_generator_t {
541 const arch_code_generator_if_t *impl;
545 * Architecture interface.
547 struct arch_isa_if_t {
549 * Initialize the isa interface.
550 * @param file_handle the file handle to write the output to
551 * @return a new isa instance
553 arch_env_t *(*init)(FILE *file_handle);
556 * Free the isa instance.
558 void (*done)(void *self);
561 * Called directly after initialization. Backend should handle all
564 void (*handle_intrinsics)(void);
567 * Get the the number of register classes in the isa.
568 * @return The number of register classes.
570 unsigned (*get_n_reg_class)(void);
573 * Get the i-th register class.
574 * @param i The number of the register class.
575 * @return The register class.
577 const arch_register_class_t *(*get_reg_class)(unsigned i);
580 * Get the register class which shall be used to store a value of a given mode.
581 * @param self The this pointer.
582 * @param mode The mode in question.
583 * @return A register class which can hold values of the given mode.
585 const arch_register_class_t *(*get_reg_class_for_mode)(const ir_mode *mode);
588 * Get the ABI restrictions for procedure calls.
589 * @param self The this pointer.
590 * @param call_type The call type of the method (procedure) in question.
591 * @param p The array of parameter locations to be filled.
593 void (*get_call_abi)(const void *self, ir_type *call_type, be_abi_call_t *abi);
596 * Get the code generator interface.
597 * @param self The this pointer.
598 * @return Some code generator interface.
600 const arch_code_generator_if_t *(*get_code_generator_if)(void *self);
603 * Get the list scheduler to use. There is already a selector given, the
604 * backend is free to modify and/or ignore it.
606 * @param self The isa object.
607 * @param selector The selector given by options.
608 * @return The list scheduler selector.
610 const list_sched_selector_t *(*get_list_sched_selector)(const void *self, list_sched_selector_t *selector);
613 * Get the ILP scheduler to use.
614 * @param self The isa object.
615 * @return The ILP scheduler selector
617 const ilp_sched_selector_t *(*get_ilp_sched_selector)(const void *self);
620 * Get the necessary alignment for storing a register of given class.
621 * @param self The isa object.
622 * @param cls The register class.
623 * @return The alignment in bytes.
625 int (*get_reg_class_alignment)(const arch_register_class_t *cls);
628 * A "static" function, returns the frontend settings
629 * needed for this backend.
631 const backend_params *(*get_params)(void);
634 * Returns an 2-dim array of execution units, @p irn can be executed on.
635 * The first dimension is the type, the second the allowed units of this
637 * Each dimension is a NULL terminated list.
638 * @param self The isa object.
639 * @param irn The node.
640 * @return An array of allowed execution units.
642 * { unit1_of_tp1, ..., unitX1_of_tp1, NULL },
644 * { unit1_of_tpY, ..., unitXn_of_tpY, NULL },
648 const be_execution_unit_t ***(*get_allowed_execution_units)(const ir_node *irn);
651 * Return the abstract machine for this isa.
652 * @param self The isa object.
654 const be_machine_t *(*get_machine)(const void *self);
657 * Return an ordered list of irgs where code should be generated for.
658 * If NULL is returned, all irg will be taken into account and they will be
659 * generated in an arbitrary order.
660 * @param self The isa object.
661 * @param irgs A flexible array ARR_F of length 0 where the backend can append the desired irgs.
662 * @return A flexible array ARR_F containing all desired irgs in the desired order.
664 ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs);
667 * mark node as rematerialized
669 void (*mark_remat)(ir_node *node);
672 * parse an assembler constraint part and set flags according to its nature
673 * advances the *c pointer to point to the last parsed character (so if you
674 * parse a single character don't advance c)
676 asm_constraint_flags_t (*parse_asm_constraint)(const char **c);
679 * returns true if the string is a valid clobbered (register) in this
682 int (*is_valid_clobber)(const char *clobber);
685 #define arch_env_done(env) ((env)->impl->done(env))
686 #define arch_env_handle_intrinsics(env) \
687 do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
688 #define arch_env_get_n_reg_class(env) ((env)->impl->get_n_reg_class())
689 #define arch_env_get_reg_class(env,i) ((env)->impl->get_reg_class(i))
690 #define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((mode)))
691 #define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((env), (tp), (abi)))
692 #define arch_env_get_code_generator_if(env) ((env)->impl->get_code_generator_if((env)))
693 #define arch_env_get_list_sched_selector(env,selector) ((env)->impl->get_list_sched_selector((env), (selector)))
694 #define arch_env_get_ilp_sched_selector(env) ((env)->impl->get_ilp_sched_selector(env))
695 #define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((cls)))
696 #define arch_env_get_params(env) ((env)->impl->get_params())
697 #define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((irn)))
698 #define arch_env_get_machine(env) ((env)->impl->get_machine(env))
699 #define arch_env_get_backend_irg_list(env,irgs) ((env)->impl->get_backend_irg_list((env), (irgs)))
700 #define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((c))
701 #define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((clobber))
702 #define arch_env_mark_remat(env,node) \
703 do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0)
709 const arch_isa_if_t *impl;
710 const arch_register_t *sp; /** The stack pointer register. */
711 const arch_register_t *bp; /** The base pointer register. */
712 const arch_register_class_t *link_class; /** The static link pointer register class. */
713 int stack_dir; /** -1 for decreasing, 1 for increasing. */
714 int stack_alignment; /** power of 2 stack alignment */
715 const be_main_env_t *main_env; /** the be main environment */
716 int spill_cost; /** cost for a be_Spill node */
717 int reload_cost; /** cost for a be_Reload node */
720 static inline unsigned arch_irn_get_n_outs(const ir_node *node)
722 backend_info_t *info = be_get_info(node);
723 if (info->out_infos == NULL)
726 return ARR_LEN(info->out_infos);
729 static inline const arch_irn_ops_t *get_irn_ops_simple(const ir_node *node)
731 const ir_op *ops = get_irn_op(node);
732 const arch_irn_ops_t *be_ops = get_op_ops(ops)->be_ops;
733 assert(!is_Proj(node));
737 static inline const arch_register_req_t *arch_get_register_req_out(
741 backend_info_t *info;
744 pos = get_Proj_proj(irn);
745 irn = get_Proj_pred(irn);
746 } else if (get_irn_mode(irn) == mode_T) {
747 /* TODO: find out who does this and fix the caller! */
748 return arch_no_register_req;
750 info = be_get_info(irn);
751 if (info->out_infos == NULL)
752 return arch_no_register_req;
754 return info->out_infos[pos].req;
757 static inline bool arch_irn_is_ignore(const ir_node *irn)
759 const arch_register_req_t *req = arch_get_register_req_out(irn);
760 return !!(req->type & arch_register_req_type_ignore);
763 static inline bool arch_irn_consider_in_reg_alloc(
764 const arch_register_class_t *cls, const ir_node *node)
766 const arch_register_req_t *req = arch_get_register_req_out(node);
769 !(req->type & arch_register_req_type_ignore);
773 * Get register constraints for an operand at position @p
775 static inline const arch_register_req_t *arch_get_in_register_req(
776 const ir_node *node, int pos)
778 const arch_irn_ops_t *ops = get_irn_ops_simple(node);
779 return ops->get_irn_reg_req_in(node, pos);
783 * Get register constraint for a produced result (the @p pos result)
785 static inline const arch_register_req_t *arch_get_out_register_req(
786 const ir_node *node, int pos)
788 const backend_info_t *info = be_get_info(node);
789 if (info->out_infos == NULL)
790 return arch_no_register_req;
791 return info->out_infos[pos].req;
794 static inline void arch_set_out_register_req(ir_node *node, int pos,
795 const arch_register_req_t *req)
797 backend_info_t *info = be_get_info(node);
798 assert(pos < (int) arch_irn_get_n_outs(node));
799 info->out_infos[pos].req = req;