2 * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Processor architecture specification.
23 * @author Sebastian Hack
26 #ifndef FIRM_BE_BEARCH_H
27 #define FIRM_BE_BEARCH_H
31 #include "firm_types.h"
34 #include "raw_bitset.h"
44 * this constant is returned by the get_sp_bias functions if the stack
45 * is reset (usually because the frame pointer is copied to the stack
48 #define SP_BIAS_RESET INT_MIN
50 typedef enum arch_register_class_flags_t {
51 arch_register_class_flag_none = 0,
52 /** don't do automatic register allocation for this class */
53 arch_register_class_flag_manual_ra = 1U << 0,
54 /** the register models an abstract state (example: fpu rounding mode) */
55 arch_register_class_flag_state = 1U << 1
56 } arch_register_class_flags_t;
57 ENUM_BITSET(arch_register_class_flags_t)
59 typedef enum arch_register_type_t {
60 arch_register_type_none = 0,
61 /** Do not consider this register when allocating. */
62 arch_register_type_ignore = 1U << 0,
63 /** The emitter can choose an arbitrary register. The register fulfills any
64 * register constraints as long as the register class matches */
65 arch_register_type_joker = 1U << 1,
66 /** This is just a virtual register. Virtual registers fulfill any register
67 * constraints as long as the register class matches. It is a allowed to
68 * have multiple definitions for the same virtual register at a point */
69 arch_register_type_virtual = 1U << 2,
70 /** The register represents a state that should be handled by bestate
72 arch_register_type_state = 1U << 3,
73 } arch_register_type_t;
74 ENUM_BITSET(arch_register_type_t)
77 * Different types of register allocation requirements.
79 typedef enum arch_register_req_type_t {
80 /** No register requirement. */
81 arch_register_req_type_none = 0,
82 /** All registers in the class are allowed. */
83 arch_register_req_type_normal = 1U << 0,
84 /** Only a real subset of the class is allowed. */
85 arch_register_req_type_limited = 1U << 1,
86 /** The register should be equal to another one at the node. */
87 arch_register_req_type_should_be_same = 1U << 2,
88 /** The register must be unequal from some other at the node. */
89 arch_register_req_type_must_be_different = 1U << 3,
90 /** The registernumber should be aligned (in case of multiregister values)*/
91 arch_register_req_type_aligned = 1U << 4,
92 /** ignore while allocating registers */
93 arch_register_req_type_ignore = 1U << 5,
94 /** the output produces a new value for the stack pointer
95 * (this is not really a constraint but a marker to guide the stackpointer
97 arch_register_req_type_produces_sp = 1U << 6,
98 } arch_register_req_type_t;
99 ENUM_BITSET(arch_register_req_type_t)
101 extern const arch_register_req_t *arch_no_register_req;
104 * Print information about a register requirement in human readable form
105 * @param F output stream/file
106 * @param req The requirements structure to format.
108 void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
109 const ir_node *node);
111 void arch_dump_register_reqs(FILE *F, const ir_node *node);
112 void arch_dump_reqs_and_registers(FILE *F, const ir_node *node);
115 * Node classification. Used for statistics and for detecting reload nodes.
117 typedef enum arch_irn_class_t {
118 arch_irn_class_none = 0,
119 arch_irn_class_spill = 1 << 0,
120 arch_irn_class_reload = 1 << 1,
121 arch_irn_class_remat = 1 << 2,
122 arch_irn_class_copy = 1 << 3,
123 arch_irn_class_perm = 1 << 4
125 ENUM_BITSET(arch_irn_class_t)
127 void arch_set_frame_offset(ir_node *irn, int bias);
129 ir_entity *arch_get_frame_entity(const ir_node *irn);
130 int arch_get_sp_bias(ir_node *irn);
132 int arch_get_op_estimated_cost(const ir_node *irn);
133 arch_inverse_t *arch_get_inverse(const ir_node *irn, int i,
134 arch_inverse_t *inverse,
135 struct obstack *obstack);
136 int arch_possible_memory_operand(const ir_node *irn,
138 void arch_perform_memory_operand(ir_node *irn, ir_node *spill,
142 * Get the register requirements for a node.
143 * @note Deprecated API! Preferably use
144 * arch_get_in_register_req and
145 * arch_get_out_register_req.
147 * @param irn The node.
148 * @param pos The position of the operand you're interested in.
149 * @return A pointer to the register requirements. If NULL is returned, the
150 * operand was no register operand.
152 const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos);
155 * Check, if a register is assignable to an operand of a node.
156 * @param irn The node.
157 * @param pos The position of the operand.
158 * @param reg The register.
159 * @return 1, if the register might be allocated to the operand 0 if not.
161 int arch_reg_is_allocatable(const ir_node *irn, int pos,
162 const arch_register_t *reg);
164 #define arch_reg_out_is_allocatable(irn, reg) arch_reg_is_allocatable(irn, -1, reg)
167 * Get the register class of an operand of a node.
168 * @param irn The node.
169 * @param pos The position of the operand, -1 for the output.
170 * @return The register class of the operand or NULL, if
171 * operand is a non-register operand.
173 const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn,
176 #define arch_get_irn_reg_class_out(irn) arch_get_irn_reg_class(irn, -1)
179 * Get the register allocated at a certain output operand of a node.
180 * @param irn The node.
181 * @return The register allocated for this operand
183 const arch_register_t *arch_get_irn_register(const ir_node *irn);
184 const arch_register_t *arch_irn_get_register(const ir_node *irn, int pos);
187 * Set the register for a certain output operand.
188 * @param irn The node.
189 * @param reg The register.
191 void arch_set_irn_register(ir_node *irn, const arch_register_t *reg);
192 void arch_irn_set_register(ir_node *irn, int pos, const arch_register_t *reg);
196 * @param irn The node.
197 * @return A classification of the node.
199 arch_irn_class_t arch_irn_classify(const ir_node *irn);
202 * Get the flags of a node.
203 * @param irn The node.
206 arch_irn_flags_t arch_irn_get_flags(const ir_node *irn);
208 void arch_irn_set_flags(ir_node *node, arch_irn_flags_t flags);
209 void arch_irn_add_flags(ir_node *node, arch_irn_flags_t flags);
211 #define arch_irn_is(irn, flag) ((arch_irn_get_flags(irn) & arch_irn_flags_ ## flag) != 0)
214 * Get the operations of an irn.
215 * @param self The handler from which the method is invoked.
216 * @param irn Some node.
217 * @return Operations for that irn.
219 typedef const void *(arch_get_irn_ops_t)(const ir_node *irn);
222 * Initialize the architecture environment struct.
223 * @param isa The isa which shall be put into the environment.
224 * @param file_handle The file handle
225 * @return The environment.
227 extern arch_env_t *arch_env_init(const arch_isa_if_t *isa,
228 FILE *file_handle, be_main_env_t *main_env);
231 * Register an instruction set architecture
233 void be_register_isa_if(const char *name, const arch_isa_if_t *isa);
238 struct arch_register_t {
239 const char *name; /**< The name of the register. */
240 const arch_register_class_t *reg_class; /**< The class of the register */
241 unsigned short index; /**< The index of the register in
243 unsigned short global_index; /** The global index this register
244 in the architecture. */
245 arch_register_type_t type; /**< The type of the register. */
246 /** register constraint allowing just this register */
247 const arch_register_req_t *single_req;
250 static inline const arch_register_class_t *arch_register_get_class(
251 const arch_register_t *reg)
253 return reg->reg_class;
256 static inline unsigned arch_register_get_index(const arch_register_t *reg)
261 static inline const char *arch_register_get_name(const arch_register_t *reg)
267 * A class of registers.
268 * Like general purpose or floating point.
270 struct arch_register_class_t {
271 unsigned index; /**< index of this register class */
272 const char *name; /**< The name of the register class.*/
273 unsigned n_regs; /**< Number of registers in this
275 ir_mode *mode; /**< The mode of the register class.*/
276 const arch_register_t *regs; /**< The array of registers. */
277 arch_register_class_flags_t flags; /**< register class flags. */
278 const arch_register_req_t *class_req;
281 /** return the number of registers in this register class */
282 #define arch_register_class_n_regs(cls) ((cls)->n_regs)
284 /** return the largest mode of this register class */
285 #define arch_register_class_mode(cls) ((cls)->mode)
287 /** return the name of this register class */
288 #define arch_register_class_name(cls) ((cls)->name)
290 /** return the index of this register class */
291 #define arch_register_class_index(cls) ((cls)->index)
293 /** return the register class flags */
294 #define arch_register_class_flags(cls) ((cls)->flags)
296 static inline const arch_register_t *arch_register_for_index(
297 const arch_register_class_t *cls, unsigned idx)
299 assert(idx < cls->n_regs);
300 return &cls->regs[idx];
304 * Convenience macro to check for set constraints.
305 * @param req A pointer to register requirements.
306 * @param kind The kind of constraint to check for
307 * (see arch_register_req_type_t).
308 * @return 1, If the kind of constraint is present, 0 if not.
310 #define arch_register_req_is(req, kind) \
311 (((req)->type & (arch_register_req_type_ ## kind)) != 0)
314 * Expresses requirements to register allocation for an operand.
316 struct arch_register_req_t {
317 arch_register_req_type_t type; /**< The type of the constraint. */
318 const arch_register_class_t *cls; /**< The register class this constraint
320 const unsigned *limited; /**< allowed register bitset */
321 unsigned other_same; /**< Bitmask of ins which should use the
322 same register (should_be_same). */
323 unsigned other_different; /**< Bitmask of ins which shall use a
325 (must_be_different) */
326 unsigned char width; /**< specifies how many sequential
327 registers are required */
330 static inline int reg_reqs_equal(const arch_register_req_t *req1,
331 const arch_register_req_t *req2)
336 if (req1->type != req2->type
337 || req1->cls != req2->cls
338 || req1->other_same != req2->other_same
339 || req1->other_different != req2->other_different)
342 if (req1->limited != NULL) {
345 if (req2->limited == NULL)
348 n_regs = arch_register_class_n_regs(req1->cls);
349 if (!rbitsets_equal(req1->limited, req2->limited, n_regs))
357 * An inverse operation returned by the backend
359 struct arch_inverse_t {
360 int n; /**< count of nodes returned in nodes array */
361 int costs; /**< costs of this remat */
363 /** nodes for this inverse operation. shall be in schedule order.
364 * last element is the target value */
368 struct arch_irn_ops_t {
372 * @param irn The node.
373 * @return A classification.
375 arch_irn_class_t (*classify)(const ir_node *irn);
378 * Get the entity on the stack frame this node depends on.
379 * @param irn The node in question.
380 * @return The entity on the stack frame or NULL, if the node does not have
381 * a stack frame entity.
383 ir_entity *(*get_frame_entity)(const ir_node *irn);
386 * Set the offset of a node carrying an entity on the stack frame.
387 * @param irn The node.
388 * @param offset The offset of the node's stack frame entity.
390 void (*set_frame_offset)(ir_node *irn, int offset);
393 * Returns the delta of the stackpointer for nodes that increment or
394 * decrement the stackpointer with a constant value. (push, pop
395 * nodes on most architectures).
396 * A positive value stands for an expanding stack area, a negative value for
399 * @param irn The node
400 * @return 0 if the stackpointer is not modified with a constant
401 * value, otherwise the increment/decrement value
403 int (*get_sp_bias)(const ir_node *irn);
406 * Returns an inverse operation which yields the i-th argument
407 * of the given node as result.
409 * @param irn The original operation
410 * @param i Index of the argument we want the inverse operation to
412 * @param inverse struct to be filled with the resulting inverse op
413 * @param obstack The obstack to use for allocation of the returned nodes
415 * @return The inverse operation or NULL if operation invertible
417 arch_inverse_t *(*get_inverse)(const ir_node *irn, int i,
418 arch_inverse_t *inverse,
419 struct obstack *obstack);
422 * Get the estimated cycle count for @p irn.
424 * @param irn The node.
425 * @return The estimated cycle count for this operation
427 int (*get_op_estimated_cost)(const ir_node *irn);
430 * Asks the backend whether operand @p i of @p irn can be loaded form memory
433 * @param irn The node.
434 * @param i Index of the argument we would like to know whether @p irn
435 * can load it form memory internally
436 * @return nonzero if argument can be loaded or zero otherwise
438 int (*possible_memory_operand)(const ir_node *irn, unsigned int i);
441 * Ask the backend to assimilate @p reload of operand @p i into @p irn.
443 * @param irn The node.
444 * @param spill The spill.
445 * @param i The position of the reload.
447 void (*perform_memory_operand)(ir_node *irn, ir_node *spill,
452 * Architecture interface.
454 struct arch_isa_if_t {
456 * Initialize the isa interface.
457 * @param file_handle the file handle to write the output to
458 * @return a new isa instance
460 arch_env_t *(*init)(FILE *file_handle);
463 * lowers current program for target. See the documentation for
464 * be_lower_for_target() for details.
466 void (*lower_for_target)(void);
469 * Free the isa instance.
471 void (*done)(void *self);
474 * Called directly after initialization. Backend should handle all
477 void (*handle_intrinsics)(void);
480 * Get the register class which shall be used to store a value of a given
482 * @param self The this pointer.
483 * @param mode The mode in question.
484 * @return A register class which can hold values of the given mode.
486 const arch_register_class_t *(*get_reg_class_for_mode)(const ir_mode *mode);
489 * Get the ABI restrictions for procedure calls.
490 * @param self The this pointer.
491 * @param call_type The call type of the method (procedure) in question.
492 * @param p The array of parameter locations to be filled.
494 void (*get_call_abi)(const void *self, ir_type *call_type,
498 * Get the necessary alignment for storing a register of given class.
499 * @param self The isa object.
500 * @param cls The register class.
501 * @return The alignment in bytes.
503 int (*get_reg_class_alignment)(const arch_register_class_t *cls);
506 * A "static" function, returns the frontend settings
507 * needed for this backend.
509 const backend_params *(*get_params)(void);
512 * Return an ordered list of irgs where code should be generated for.
513 * If NULL is returned, all irg will be taken into account and they will be
514 * generated in an arbitrary order.
515 * @param self The isa object.
516 * @param irgs A flexible array ARR_F of length 0 where the backend can
517 * append the desired irgs.
518 * @return A flexible array ARR_F containing all desired irgs in the
521 ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs);
524 * mark node as rematerialized
526 void (*mark_remat)(ir_node *node);
529 * parse an assembler constraint part and set flags according to its nature
530 * advances the *c pointer to point to the last parsed character (so if you
531 * parse a single character don't advance c)
533 asm_constraint_flags_t (*parse_asm_constraint)(const char **c);
536 * returns true if the string is a valid clobbered (register) in this
539 int (*is_valid_clobber)(const char *clobber);
542 * Initialize the code generator.
544 * @return A newly created code generator.
546 void (*init_graph)(ir_graph *irg);
549 * return node used as base in pic code addresses
551 ir_node* (*get_pic_base)(ir_graph *irg);
554 * Called before abi introduce.
556 void (*before_abi)(ir_graph *irg);
559 * Called, when the graph is being normalized.
561 void (*prepare_graph)(ir_graph *irg);
564 * Called before register allocation.
566 void (*before_ra)(ir_graph *irg);
569 * Called after register allocation.
571 void (*after_ra)(ir_graph *irg);
574 * Called directly before done is called. This should be the last place
575 * where the irg is modified.
577 void (*finish)(ir_graph *irg);
580 * Called after everything happened. This call should emit the final
581 * assembly code but avoid changing the irg.
582 * The code generator must also be de-allocated here.
584 void (*emit)(ir_graph *irg);
587 * Checks if the given register is callee/caller saved.
589 int (*register_saved_by)(const arch_register_t *reg, int callee);
592 #define arch_env_done(env) ((env)->impl->done(env))
593 #define arch_env_handle_intrinsics(env) \
594 do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
595 #define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((mode)))
596 #define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((env), (tp), (abi)))
597 #define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((cls)))
598 #define arch_env_get_params(env) ((env)->impl->get_params())
599 #define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((irn)))
600 #define arch_env_get_machine(env) ((env)->impl->get_machine(env))
601 #define arch_env_get_backend_irg_list(env,irgs) ((env)->impl->get_backend_irg_list((env), (irgs)))
602 #define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((c))
603 #define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((clobber))
604 #define arch_env_mark_remat(env,node) \
605 do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0)
611 const arch_isa_if_t *impl;
612 unsigned n_registers; /**< number of registers */
613 const arch_register_t *registers; /**< register array */
614 unsigned n_register_classes; /**< number of register classes*/
615 const arch_register_class_t *register_classes; /**< register classes */
616 const arch_register_t *sp; /**< The stack pointer register. */
617 const arch_register_t *bp; /**< The base pointer register. */
618 const arch_register_class_t *link_class; /**< The static link pointer
620 int stack_alignment; /**< power of 2 stack alignment */
621 const be_main_env_t *main_env; /**< the be main environment */
622 int spill_cost; /**< cost for a be_Spill node */
623 int reload_cost; /**< cost for a be_Reload node */
624 bool custom_abi : 1; /**< backend does all abi handling
625 and does not need the generic
626 stuff from beabi.h/.c */
629 static inline unsigned arch_irn_get_n_outs(const ir_node *node)
631 backend_info_t *info = be_get_info(node);
632 if (info->out_infos == NULL)
635 return (unsigned)ARR_LEN(info->out_infos);
638 static inline const arch_irn_ops_t *get_irn_ops_simple(const ir_node *node)
640 const ir_op *ops = get_irn_op(node);
641 const arch_irn_ops_t *be_ops = get_op_ops(ops)->be_ops;
642 assert(!is_Proj(node));
646 static inline const arch_register_req_t *arch_get_register_req_out(
650 backend_info_t *info;
652 /* you have to query the Proj nodes for the constraints (or use
653 * arch_get_out_register_req. Querying a mode_T node and expecting
654 * arch_no_register_req is a bug in your code! */
655 assert(get_irn_mode(irn) != mode_T);
658 pos = get_Proj_proj(irn);
659 irn = get_Proj_pred(irn);
662 info = be_get_info(irn);
663 if (info->out_infos == NULL)
664 return arch_no_register_req;
666 return info->out_infos[pos].req;
669 static inline bool arch_irn_is_ignore(const ir_node *irn)
671 const arch_register_req_t *req = arch_get_register_req_out(irn);
672 return !!(req->type & arch_register_req_type_ignore);
675 static inline bool arch_irn_consider_in_reg_alloc(
676 const arch_register_class_t *cls, const ir_node *node)
678 const arch_register_req_t *req = arch_get_register_req_out(node);
681 !(req->type & arch_register_req_type_ignore);
685 * Get register constraints for an operand at position @p
687 static inline const arch_register_req_t *arch_get_in_register_req(
688 const ir_node *node, int pos)
690 const backend_info_t *info = be_get_info(node);
691 if (info->in_reqs == NULL)
692 return arch_no_register_req;
693 return info->in_reqs[pos];
697 * Get register constraint for a produced result (the @p pos result)
699 static inline const arch_register_req_t *arch_get_out_register_req(
700 const ir_node *node, int pos)
702 const backend_info_t *info = be_get_info(node);
703 if (info->out_infos == NULL)
704 return arch_no_register_req;
705 return info->out_infos[pos].req;
708 static inline void arch_set_out_register_req(ir_node *node, int pos,
709 const arch_register_req_t *req)
711 backend_info_t *info = be_get_info(node);
712 assert(pos < (int) arch_irn_get_n_outs(node));
713 info->out_infos[pos].req = req;
716 static inline void arch_set_in_register_reqs(ir_node *node,
717 const arch_register_req_t **in_reqs)
719 backend_info_t *info = be_get_info(node);
720 info->in_reqs = in_reqs;
723 static inline const arch_register_req_t **arch_get_in_register_reqs(
726 backend_info_t *info = be_get_info(node);
727 return info->in_reqs;
731 * Check if the given register is callee save, ie. will be save by the callee.
733 static inline bool arch_register_is_callee_save(
734 const arch_env_t *arch_env,
735 const arch_register_t *reg)
737 if (arch_env->impl->register_saved_by)
738 return arch_env->impl->register_saved_by(reg, /*callee=*/1);
743 * Check if the given register is caller save, ie. must be save by the caller.
745 static inline bool arch_register_is_caller_save(
746 const arch_env_t *arch_env,
747 const arch_register_t *reg)
749 if (arch_env->impl->register_saved_by)
750 return arch_env->impl->register_saved_by(reg, /*callee=*/0);
755 * Iterate over all values defined by an instruction.
756 * Only looks at values in a certain register class where the requirements
757 * are not marked as ignore.
758 * Executes @p code for each definition.
760 #define be_foreach_definition_(node, cls, value, code) \
762 if (get_irn_mode(node) == mode_T) { \
763 const ir_edge_t *edge_; \
764 foreach_out_edge(node, edge_) { \
765 const arch_register_req_t *req_; \
766 value = get_edge_src_irn(edge_); \
767 req_ = arch_get_register_req_out(value); \
768 if (req_->cls != cls) \
773 const arch_register_req_t *req_ = arch_get_register_req_out(node); \
775 if (req_->cls == cls) { \
781 #define be_foreach_definition(node, cls, value, code) \
782 be_foreach_definition_(node, cls, value, \
783 if (req_->type & arch_register_req_type_ignore) \