2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Processor architecture specification.
23 * @author Sebastian Hack
26 #ifndef FIRM_BE_BEARCH_H
27 #define FIRM_BE_BEARCH_H
31 #include "firm_types.h"
34 #include "raw_bitset.h"
43 typedef enum arch_register_class_flags_t {
44 arch_register_class_flag_none = 0,
45 /** don't do automatic register allocation for this class */
46 arch_register_class_flag_manual_ra = 1U << 0,
47 /** the register models an abstract state (example: fpu rounding mode) */
48 arch_register_class_flag_state = 1U << 1
49 } arch_register_class_flags_t;
51 typedef enum arch_register_type_t {
52 arch_register_type_none = 0,
53 /** The register must be saved by the caller upon a function call. It thus
54 * can be overwritten in the called function. */
55 arch_register_type_caller_save = 1U << 0,
56 /** The register must be saved by the caller upon a function call. It thus
57 * can be overwritten in the called function. */
58 arch_register_type_callee_save = 1U << 1,
59 /** Do not consider this register when allocating. */
60 arch_register_type_ignore = 1U << 2,
61 /** The emitter can choose an arbitrary register. The register fulfills any
62 * register constraints as long as the register class matches */
63 arch_register_type_joker = 1U << 3,
64 /** This is just a virtual register. Virtual registers fulfill any register
65 * constraints as long as the register class matches. It is a allowed to
66 * have multiple definitions for the same virtual register at a point */
67 arch_register_type_virtual = 1U << 4,
68 /** The register represents a state that should be handled by bestate
70 arch_register_type_state = 1U << 5,
71 } arch_register_type_t;
74 * Different types of register allocation requirements.
76 typedef enum arch_register_req_type_t {
77 /** No register requirement. */
78 arch_register_req_type_none = 0,
79 /** All registers in the class are allowed. */
80 arch_register_req_type_normal = 1U << 0,
81 /** Only a real subset of the class is allowed. */
82 arch_register_req_type_limited = 1U << 1,
83 /** The register should be equal to another one at the node. */
84 arch_register_req_type_should_be_same = 1U << 2,
85 /** The register must be unequal from some other at the node. */
86 arch_register_req_type_must_be_different = 1U << 3,
87 /** ignore while allocating registers */
88 arch_register_req_type_ignore = 1U << 4,
89 /** the output produces a new value for the stack pointer
90 * (this is not really a constraint but a marker to guide the stackpointer
92 arch_register_req_type_produces_sp = 1U << 5,
93 } arch_register_req_type_t;
95 extern const arch_register_req_t *arch_no_register_req;
98 * Print information about a register requirement in human readable form
99 * @param F output stream/file
100 * @param req The requirements structure to format.
102 void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
103 const ir_node *node);
105 void arch_dump_register_reqs(FILE *F, const ir_node *node);
106 void arch_dump_reqs_and_registers(FILE *F, const ir_node *node);
109 * Node classification. Used for statistics and for detecting reload nodes.
111 typedef enum arch_irn_class_t {
112 arch_irn_class_spill = 1 << 0,
113 arch_irn_class_reload = 1 << 1,
114 arch_irn_class_remat = 1 << 2,
115 arch_irn_class_copy = 1 << 3,
116 arch_irn_class_perm = 1 << 4
119 void arch_set_frame_offset(ir_node *irn, int bias);
121 ir_entity *arch_get_frame_entity(const ir_node *irn);
122 void arch_set_frame_entity(ir_node *irn, ir_entity *ent);
123 int arch_get_sp_bias(ir_node *irn);
125 int arch_get_op_estimated_cost(const ir_node *irn);
126 arch_inverse_t *arch_get_inverse(const ir_node *irn, int i,
127 arch_inverse_t *inverse,
128 struct obstack *obstack);
129 int arch_possible_memory_operand(const ir_node *irn,
131 void arch_perform_memory_operand(ir_node *irn, ir_node *spill,
135 * Get the register requirements for a node.
136 * @note Deprecated API! Preferably use
137 * arch_get_in_register_req and
138 * arch_get_out_register_req.
140 * @param irn The node.
141 * @param pos The position of the operand you're interested in.
142 * @return A pointer to the register requirements. If NULL is returned, the
143 * operand was no register operand.
145 const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos);
148 * Put all registers which shall not be ignored by the register
149 * allocator in a bit set.
150 * @param cls The register class to consider.
151 * @param bs The bit set to put the registers to.
153 extern void arch_put_non_ignore_regs(const arch_register_class_t *cls,
157 * Check, if a register is assignable to an operand of a node.
158 * @param irn The node.
159 * @param pos The position of the operand.
160 * @param reg The register.
161 * @return 1, if the register might be allocated to the operand 0 if not.
163 int arch_reg_is_allocatable(const ir_node *irn, int pos,
164 const arch_register_t *reg);
166 #define arch_reg_out_is_allocatable(irn, reg) arch_reg_is_allocatable(irn, -1, reg)
169 * Get the register class of an operand of a node.
170 * @param irn The node.
171 * @param pos The position of the operand, -1 for the output.
172 * @return The register class of the operand or NULL, if
173 * operand is a non-register operand.
175 const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn,
178 #define arch_get_irn_reg_class_out(irn) arch_get_irn_reg_class(irn, -1)
181 * Get the register allocated at a certain output operand of a node.
182 * @param irn The node.
183 * @return The register allocated for this operand
185 const arch_register_t *arch_get_irn_register(const ir_node *irn);
186 const arch_register_t *arch_irn_get_register(const ir_node *irn, int pos);
189 * Set the register for a certain output operand.
190 * @param irn The node.
191 * @param reg The register.
193 void arch_set_irn_register(ir_node *irn, const arch_register_t *reg);
194 void arch_irn_set_register(ir_node *irn, int pos, const arch_register_t *reg);
198 * @param irn The node.
199 * @return A classification of the node.
201 arch_irn_class_t arch_irn_classify(const ir_node *irn);
204 * Get the flags of a node.
205 * @param irn The node.
208 arch_irn_flags_t arch_irn_get_flags(const ir_node *irn);
210 void arch_irn_set_flags(ir_node *node, arch_irn_flags_t flags);
211 void arch_irn_add_flags(ir_node *node, arch_irn_flags_t flags);
213 #define arch_irn_is(irn, flag) ((arch_irn_get_flags(irn) & arch_irn_flags_ ## flag) != 0)
216 * Get the operations of an irn.
217 * @param self The handler from which the method is invoked.
218 * @param irn Some node.
219 * @return Operations for that irn.
221 typedef const void *(arch_get_irn_ops_t)(const ir_node *irn);
224 * Initialize the architecture environment struct.
225 * @param isa The isa which shall be put into the environment.
226 * @param file_handle The file handle
227 * @return The environment.
229 extern arch_env_t *arch_env_init(const arch_isa_if_t *isa,
230 FILE *file_handle, be_main_env_t *main_env);
233 * Register an instruction set architecture
235 void be_register_isa_if(const char *name, const arch_isa_if_t *isa);
240 struct arch_register_t {
241 const char *name; /**< The name of the register. */
242 const arch_register_class_t *reg_class; /**< The class of the register */
243 unsigned index; /**< The index of the register in
245 arch_register_type_t type; /**< The type of the register. */
246 /** register constraint allowing just this register */
247 const arch_register_req_t *single_req;
250 static inline const arch_register_class_t *_arch_register_get_class(
251 const arch_register_t *reg)
253 return reg->reg_class;
256 static inline unsigned _arch_register_get_index(const arch_register_t *reg)
261 static inline const char *_arch_register_get_name(const arch_register_t *reg)
266 #define arch_register_get_class(reg) _arch_register_get_class(reg)
267 #define arch_register_get_index(reg) _arch_register_get_index(reg)
268 #define arch_register_get_name(reg) _arch_register_get_name(reg)
271 * Convenience macro to check for register type.
272 * @param req A pointer to register.
273 * @param kind The kind of type to check for (see arch_register_type_t).
274 * @return 1, If register is of given kind, 0 if not.
276 #define arch_register_type_is(reg, kind) \
277 (((reg)->type & arch_register_type_ ## kind) != 0)
280 * A class of registers.
281 * Like general purpose or floating point.
283 struct arch_register_class_t {
284 unsigned index; /**< index of this register class */
285 const char *name; /**< The name of the register class.*/
286 unsigned n_regs; /**< Number of registers in this
288 ir_mode *mode; /**< The mode of the register class.*/
289 const arch_register_t *regs; /**< The array of registers. */
290 arch_register_class_flags_t flags; /**< register class flags. */
291 const arch_register_req_t *class_req;
294 /** return the number of registers in this register class */
295 #define arch_register_class_n_regs(cls) ((cls)->n_regs)
297 /** return the largest mode of this register class */
298 #define arch_register_class_mode(cls) ((cls)->mode)
300 /** return the name of this register class */
301 #define arch_register_class_name(cls) ((cls)->name)
303 /** return the index of this register class */
304 #define arch_register_class_index(cls) ((cls)->index)
306 /** return the register class flags */
307 #define arch_register_class_flags(cls) ((cls)->flags)
309 static inline const arch_register_t *_arch_register_for_index(
310 const arch_register_class_t *cls, unsigned idx)
312 assert(idx < cls->n_regs);
313 return &cls->regs[idx];
316 #define arch_register_for_index(cls, idx) _arch_register_for_index(cls, idx)
319 * Convenience macro to check for set constraints.
320 * @param req A pointer to register requirements.
321 * @param kind The kind of constraint to check for
322 * (see arch_register_req_type_t).
323 * @return 1, If the kind of constraint is present, 0 if not.
325 #define arch_register_req_is(req, kind) \
326 (((req)->type & (arch_register_req_type_ ## kind)) != 0)
329 * Expresses requirements to register allocation for an operand.
331 struct arch_register_req_t {
332 arch_register_req_type_t type; /**< The type of the constraint. */
333 const arch_register_class_t *cls; /**< The register class this constraint
335 const unsigned *limited; /**< allowed register bitset */
336 unsigned other_same; /**< Bitmask of ins which should use the
337 same register (should_be_same). */
338 unsigned other_different; /**< Bitmask of ins which shall use a
340 (must_be_different) */
343 static inline int reg_reqs_equal(const arch_register_req_t *req1,
344 const arch_register_req_t *req2)
349 if (req1->type != req2->type
350 || req1->cls != req2->cls
351 || req1->other_same != req2->other_same
352 || req1->other_different != req2->other_different)
355 if (req1->limited != NULL) {
358 if (req2->limited == NULL)
361 n_regs = arch_register_class_n_regs(req1->cls);
362 if (!rbitsets_equal(req1->limited, req2->limited, n_regs))
370 * An inverse operation returned by the backend
372 struct arch_inverse_t {
373 int n; /**< count of nodes returned in nodes array */
374 int costs; /**< costs of this remat */
376 /** nodes for this inverse operation. shall be in schedule order.
377 * last element is the target value */
381 struct arch_irn_ops_t {
384 * Get the register requirements for a given operand.
385 * @param irn The node.
386 * @param pos The operand's position
387 * @return The register requirements for the selected operand.
388 * The pointer returned is never NULL.
390 const arch_register_req_t *(*get_irn_reg_req_in)(const ir_node *irn,
395 * @param irn The node.
396 * @return A classification.
398 arch_irn_class_t (*classify)(const ir_node *irn);
401 * Get the entity on the stack frame this node depends on.
402 * @param irn The node in question.
403 * @return The entity on the stack frame or NULL, if the node does not have
404 * a stack frame entity.
406 ir_entity *(*get_frame_entity)(const ir_node *irn);
409 * Set the entity on the stack frame this node depends on.
410 * @param irn The node in question.
411 * @param ent The entity to set
413 void (*set_frame_entity)(ir_node *irn, ir_entity *ent);
416 * Set the offset of a node carrying an entity on the stack frame.
417 * @param irn The node.
418 * @param offset The offset of the node's stack frame entity.
420 void (*set_frame_offset)(ir_node *irn, int offset);
423 * Returns the delta of the stackpointer for nodes that increment or
424 * decrement the stackpointer with a constant value. (push, pop
425 * nodes on most architectures).
426 * A positive value stands for an expanding stack area, a negative value for
429 * @param irn The node
430 * @return 0 if the stackpointer is not modified with a constant
431 * value, otherwise the increment/decrement value
433 int (*get_sp_bias)(const ir_node *irn);
436 * Returns an inverse operation which yields the i-th argument
437 * of the given node as result.
439 * @param irn The original operation
440 * @param i Index of the argument we want the inverse operation to
442 * @param inverse struct to be filled with the resulting inverse op
443 * @param obstack The obstack to use for allocation of the returned nodes
445 * @return The inverse operation or NULL if operation invertible
447 arch_inverse_t *(*get_inverse)(const ir_node *irn, int i,
448 arch_inverse_t *inverse,
449 struct obstack *obstack);
452 * Get the estimated cycle count for @p irn.
454 * @param irn The node.
455 * @return The estimated cycle count for this operation
457 int (*get_op_estimated_cost)(const ir_node *irn);
460 * Asks the backend whether operand @p i of @p irn can be loaded form memory
463 * @param irn The node.
464 * @param i Index of the argument we would like to know whether @p irn
465 * can load it form memory internally
466 * @return nonzero if argument can be loaded or zero otherwise
468 int (*possible_memory_operand)(const ir_node *irn, unsigned int i);
471 * Ask the backend to assimilate @p reload of operand @p i into @p irn.
473 * @param irn The node.
474 * @param spill The spill.
475 * @param i The position of the reload.
477 void (*perform_memory_operand)(ir_node *irn, ir_node *spill,
482 * The code generator interface.
484 struct arch_code_generator_if_t {
486 * Initialize the code generator.
488 * @return A newly created code generator.
490 void *(*init)(ir_graph *irg);
493 * return node used as base in pic code addresses
495 ir_node* (*get_pic_base)(void *self);
498 * Called before abi introduce.
500 void (*before_abi)(void *self);
503 * Called, when the graph is being normalized.
505 void (*prepare_graph)(void *self);
508 * Backend may provide an own spiller.
509 * This spiller needs to spill all register classes.
511 void (*spill)(void *self, ir_graph *irg);
514 * Called before register allocation.
516 void (*before_ra)(void *self);
519 * Called after register allocation.
521 void (*after_ra)(void *self);
524 * Called directly before done is called. This should be the last place
525 * where the irg is modified.
527 void (*finish)(void *self);
530 * Called after everything happened. This call should emit the final
531 * assembly code but avoid changing the irg.
532 * The code generator must also be de-allocated here.
534 void (*done)(void *self);
538 * helper macro: call function func from the code generator
539 * if it's implemented.
541 #define _arch_cg_call(cg, func) \
543 if((cg)->impl->func) \
544 (cg)->impl->func(cg); \
547 #define _arch_cg_call_env(cg, env, func) \
549 if((cg)->impl->func) \
550 (cg)->impl->func(cg, env); \
553 #define arch_code_generator_before_abi(cg) _arch_cg_call(cg, before_abi)
554 #define arch_code_generator_prepare_graph(cg) _arch_cg_call(cg, prepare_graph)
555 #define arch_code_generator_before_ra(cg) _arch_cg_call(cg, before_ra)
556 #define arch_code_generator_after_ra(cg) _arch_cg_call(cg, after_ra)
557 #define arch_code_generator_finish(cg) _arch_cg_call(cg, finish)
558 #define arch_code_generator_done(cg) _arch_cg_call(cg, done)
559 #define arch_code_generator_spill(cg, irg) _arch_cg_call_env(cg, irg, spill)
560 #define arch_code_generator_has_spiller(cg) ((cg)->impl->spill != NULL)
561 #define arch_code_generator_get_pic_base(cg) \
562 ((cg)->impl->get_pic_base != NULL ? (cg)->impl->get_pic_base(cg) : NULL)
565 * Code generator base class.
567 struct arch_code_generator_t {
568 const arch_code_generator_if_t *impl;
572 * Architecture interface.
574 struct arch_isa_if_t {
576 * Initialize the isa interface.
577 * @param file_handle the file handle to write the output to
578 * @return a new isa instance
580 arch_env_t *(*init)(FILE *file_handle);
583 * Free the isa instance.
585 void (*done)(void *self);
588 * Called directly after initialization. Backend should handle all
591 void (*handle_intrinsics)(void);
594 * Get the the number of register classes in the isa.
595 * @return The number of register classes.
597 unsigned (*get_n_reg_class)(void);
600 * Get the i-th register class.
601 * @param i The number of the register class.
602 * @return The register class.
604 const arch_register_class_t *(*get_reg_class)(unsigned i);
607 * Get the register class which shall be used to store a value of a given
609 * @param self The this pointer.
610 * @param mode The mode in question.
611 * @return A register class which can hold values of the given mode.
613 const arch_register_class_t *(*get_reg_class_for_mode)(const ir_mode *mode);
616 * Get the ABI restrictions for procedure calls.
617 * @param self The this pointer.
618 * @param call_type The call type of the method (procedure) in question.
619 * @param p The array of parameter locations to be filled.
621 void (*get_call_abi)(const void *self, ir_type *call_type,
625 * Get the code generator interface.
626 * @param self The this pointer.
627 * @return Some code generator interface.
629 const arch_code_generator_if_t *(*get_code_generator_if)(void *self);
632 * Get the list scheduler to use. There is already a selector given, the
633 * backend is free to modify and/or ignore it.
635 * @param self The isa object.
636 * @param selector The selector given by options.
637 * @return The list scheduler selector.
639 const list_sched_selector_t *(*get_list_sched_selector)(const void *self,
640 list_sched_selector_t *selector);
643 * Get the ILP scheduler to use.
644 * @param self The isa object.
645 * @return The ILP scheduler selector
647 const ilp_sched_selector_t *(*get_ilp_sched_selector)(const void *self);
650 * Get the necessary alignment for storing a register of given class.
651 * @param self The isa object.
652 * @param cls The register class.
653 * @return The alignment in bytes.
655 int (*get_reg_class_alignment)(const arch_register_class_t *cls);
658 * A "static" function, returns the frontend settings
659 * needed for this backend.
661 const backend_params *(*get_params)(void);
664 * Returns an 2-dim array of execution units, @p irn can be executed on.
665 * The first dimension is the type, the second the allowed units of this
667 * Each dimension is a NULL terminated list.
668 * @param self The isa object.
669 * @param irn The node.
670 * @return An array of allowed execution units.
672 * { unit1_of_tp1, ..., unitX1_of_tp1, NULL },
674 * { unit1_of_tpY, ..., unitXn_of_tpY, NULL },
678 const be_execution_unit_t ***(*get_allowed_execution_units)(
682 * Return the abstract machine for this isa.
683 * @param self The isa object.
685 const be_machine_t *(*get_machine)(const void *self);
688 * Return an ordered list of irgs where code should be generated for.
689 * If NULL is returned, all irg will be taken into account and they will be
690 * generated in an arbitrary order.
691 * @param self The isa object.
692 * @param irgs A flexible array ARR_F of length 0 where the backend can
693 * append the desired irgs.
694 * @return A flexible array ARR_F containing all desired irgs in the
697 ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs);
700 * mark node as rematerialized
702 void (*mark_remat)(ir_node *node);
705 * parse an assembler constraint part and set flags according to its nature
706 * advances the *c pointer to point to the last parsed character (so if you
707 * parse a single character don't advance c)
709 asm_constraint_flags_t (*parse_asm_constraint)(const char **c);
712 * returns true if the string is a valid clobbered (register) in this
715 int (*is_valid_clobber)(const char *clobber);
718 #define arch_env_done(env) ((env)->impl->done(env))
719 #define arch_env_handle_intrinsics(env) \
720 do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
721 #define arch_env_get_n_reg_class(env) ((env)->impl->get_n_reg_class())
722 #define arch_env_get_reg_class(env,i) ((env)->impl->get_reg_class(i))
723 #define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((mode)))
724 #define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((env), (tp), (abi)))
725 #define arch_env_get_code_generator_if(env) ((env)->impl->get_code_generator_if((env)))
726 #define arch_env_get_list_sched_selector(env,selector) ((env)->impl->get_list_sched_selector((env), (selector)))
727 #define arch_env_get_ilp_sched_selector(env) ((env)->impl->get_ilp_sched_selector(env))
728 #define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((cls)))
729 #define arch_env_get_params(env) ((env)->impl->get_params())
730 #define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((irn)))
731 #define arch_env_get_machine(env) ((env)->impl->get_machine(env))
732 #define arch_env_get_backend_irg_list(env,irgs) ((env)->impl->get_backend_irg_list((env), (irgs)))
733 #define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((c))
734 #define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((clobber))
735 #define arch_env_mark_remat(env,node) \
736 do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0)
742 const arch_isa_if_t *impl;
743 const arch_register_t *sp; /**< The stack pointer register. */
744 const arch_register_t *bp; /**< The base pointer register. */
745 const arch_register_class_t *link_class; /**< The static link pointer
747 int stack_dir; /**< -1 for decreasing, 1 for
749 int stack_alignment; /**< power of 2 stack alignment */
750 const be_main_env_t *main_env; /**< the be main environment */
751 int spill_cost; /**< cost for a be_Spill node */
752 int reload_cost; /**< cost for a be_Reload node */
755 static inline unsigned arch_irn_get_n_outs(const ir_node *node)
757 backend_info_t *info = be_get_info(node);
758 if (info->out_infos == NULL)
761 return ARR_LEN(info->out_infos);
764 static inline const arch_irn_ops_t *get_irn_ops_simple(const ir_node *node)
766 const ir_op *ops = get_irn_op(node);
767 const arch_irn_ops_t *be_ops = get_op_ops(ops)->be_ops;
768 assert(!is_Proj(node));
772 static inline const arch_register_req_t *arch_get_register_req_out(
776 backend_info_t *info;
778 /* you have to query the Proj nodes for the constraints (or use
779 * arch_get_out_register_req. Querying a mode_T node and expecting
780 * arch_no_register_req is a bug in your code! */
781 assert(get_irn_mode(irn) != mode_T);
784 pos = get_Proj_proj(irn);
785 irn = get_Proj_pred(irn);
788 info = be_get_info(irn);
789 if (info->out_infos == NULL)
790 return arch_no_register_req;
792 return info->out_infos[pos].req;
795 static inline bool arch_irn_is_ignore(const ir_node *irn)
797 const arch_register_req_t *req = arch_get_register_req_out(irn);
798 return !!(req->type & arch_register_req_type_ignore);
801 static inline bool arch_irn_consider_in_reg_alloc(
802 const arch_register_class_t *cls, const ir_node *node)
804 const arch_register_req_t *req = arch_get_register_req_out(node);
807 !(req->type & arch_register_req_type_ignore);
811 * Get register constraints for an operand at position @p
813 static inline const arch_register_req_t *arch_get_in_register_req(
814 const ir_node *node, int pos)
816 const arch_irn_ops_t *ops = get_irn_ops_simple(node);
817 return ops->get_irn_reg_req_in(node, pos);
821 * Get register constraint for a produced result (the @p pos result)
823 static inline const arch_register_req_t *arch_get_out_register_req(
824 const ir_node *node, int pos)
826 const backend_info_t *info = be_get_info(node);
827 if (info->out_infos == NULL)
828 return arch_no_register_req;
829 return info->out_infos[pos].req;
832 static inline void arch_set_out_register_req(ir_node *node, int pos,
833 const arch_register_req_t *req)
835 backend_info_t *info = be_get_info(node);
836 assert(pos < (int) arch_irn_get_n_outs(node));
837 info->out_infos[pos].req = req;