2 * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Processor architecture specification.
23 * @author Sebastian Hack
26 #ifndef FIRM_BE_BEARCH_H
27 #define FIRM_BE_BEARCH_H
31 #include "firm_types.h"
34 #include "raw_bitset.h"
44 * this constant is returned by the get_sp_bias functions if the stack
45 * is reset (usually because the frame pointer is copied to the stack
48 #define SP_BIAS_RESET INT_MIN
50 typedef enum arch_register_class_flags_t {
51 arch_register_class_flag_none = 0,
52 /** don't do automatic register allocation for this class */
53 arch_register_class_flag_manual_ra = 1U << 0,
54 /** the register models an abstract state (example: fpu rounding mode) */
55 arch_register_class_flag_state = 1U << 1
56 } arch_register_class_flags_t;
57 ENUM_BITSET(arch_register_class_flags_t)
59 typedef enum arch_register_type_t {
60 arch_register_type_none = 0,
61 /** The register must be saved by the caller upon a function call. It thus
62 * can be overwritten in the called function. */
63 arch_register_type_caller_save = 1U << 0,
64 /** The register must be saved by the caller upon a function call. It thus
65 * can be overwritten in the called function. */
66 arch_register_type_callee_save = 1U << 1,
67 /** Do not consider this register when allocating. */
68 arch_register_type_ignore = 1U << 2,
69 /** The emitter can choose an arbitrary register. The register fulfills any
70 * register constraints as long as the register class matches */
71 arch_register_type_joker = 1U << 3,
72 /** This is just a virtual register. Virtual registers fulfill any register
73 * constraints as long as the register class matches. It is a allowed to
74 * have multiple definitions for the same virtual register at a point */
75 arch_register_type_virtual = 1U << 4,
76 /** The register represents a state that should be handled by bestate
78 arch_register_type_state = 1U << 5,
79 } arch_register_type_t;
80 ENUM_BITSET(arch_register_type_t)
83 * Different types of register allocation requirements.
85 typedef enum arch_register_req_type_t {
86 /** No register requirement. */
87 arch_register_req_type_none = 0,
88 /** All registers in the class are allowed. */
89 arch_register_req_type_normal = 1U << 0,
90 /** Only a real subset of the class is allowed. */
91 arch_register_req_type_limited = 1U << 1,
92 /** The register should be equal to another one at the node. */
93 arch_register_req_type_should_be_same = 1U << 2,
94 /** The register must be unequal from some other at the node. */
95 arch_register_req_type_must_be_different = 1U << 3,
96 /** The registernumber should be aligned (in case of multiregister values)*/
97 arch_register_req_type_aligned = 1U << 4,
98 /** ignore while allocating registers */
99 arch_register_req_type_ignore = 1U << 5,
100 /** the output produces a new value for the stack pointer
101 * (this is not really a constraint but a marker to guide the stackpointer
103 arch_register_req_type_produces_sp = 1U << 6,
104 } arch_register_req_type_t;
105 ENUM_BITSET(arch_register_req_type_t)
107 extern const arch_register_req_t *arch_no_register_req;
110 * Print information about a register requirement in human readable form
111 * @param F output stream/file
112 * @param req The requirements structure to format.
114 void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
115 const ir_node *node);
117 void arch_dump_register_reqs(FILE *F, const ir_node *node);
118 void arch_dump_reqs_and_registers(FILE *F, const ir_node *node);
121 * Node classification. Used for statistics and for detecting reload nodes.
123 typedef enum arch_irn_class_t {
124 arch_irn_class_none = 0,
125 arch_irn_class_spill = 1 << 0,
126 arch_irn_class_reload = 1 << 1,
127 arch_irn_class_remat = 1 << 2,
128 arch_irn_class_copy = 1 << 3,
129 arch_irn_class_perm = 1 << 4
131 ENUM_BITSET(arch_irn_class_t)
133 void arch_set_frame_offset(ir_node *irn, int bias);
135 ir_entity *arch_get_frame_entity(const ir_node *irn);
136 int arch_get_sp_bias(ir_node *irn);
138 int arch_get_op_estimated_cost(const ir_node *irn);
139 arch_inverse_t *arch_get_inverse(const ir_node *irn, int i,
140 arch_inverse_t *inverse,
141 struct obstack *obstack);
142 int arch_possible_memory_operand(const ir_node *irn,
144 void arch_perform_memory_operand(ir_node *irn, ir_node *spill,
148 * Get the register requirements for a node.
149 * @note Deprecated API! Preferably use
150 * arch_get_in_register_req and
151 * arch_get_out_register_req.
153 * @param irn The node.
154 * @param pos The position of the operand you're interested in.
155 * @return A pointer to the register requirements. If NULL is returned, the
156 * operand was no register operand.
158 const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos);
161 * Check, if a register is assignable to an operand of a node.
162 * @param irn The node.
163 * @param pos The position of the operand.
164 * @param reg The register.
165 * @return 1, if the register might be allocated to the operand 0 if not.
167 int arch_reg_is_allocatable(const ir_node *irn, int pos,
168 const arch_register_t *reg);
170 #define arch_reg_out_is_allocatable(irn, reg) arch_reg_is_allocatable(irn, -1, reg)
173 * Get the register class of an operand of a node.
174 * @param irn The node.
175 * @param pos The position of the operand, -1 for the output.
176 * @return The register class of the operand or NULL, if
177 * operand is a non-register operand.
179 const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn,
182 #define arch_get_irn_reg_class_out(irn) arch_get_irn_reg_class(irn, -1)
185 * Get the register allocated at a certain output operand of a node.
186 * @param irn The node.
187 * @return The register allocated for this operand
189 const arch_register_t *arch_get_irn_register(const ir_node *irn);
190 const arch_register_t *arch_irn_get_register(const ir_node *irn, int pos);
193 * Set the register for a certain output operand.
194 * @param irn The node.
195 * @param reg The register.
197 void arch_set_irn_register(ir_node *irn, const arch_register_t *reg);
198 void arch_irn_set_register(ir_node *irn, int pos, const arch_register_t *reg);
202 * @param irn The node.
203 * @return A classification of the node.
205 arch_irn_class_t arch_irn_classify(const ir_node *irn);
208 * Get the flags of a node.
209 * @param irn The node.
212 arch_irn_flags_t arch_irn_get_flags(const ir_node *irn);
214 void arch_irn_set_flags(ir_node *node, arch_irn_flags_t flags);
215 void arch_irn_add_flags(ir_node *node, arch_irn_flags_t flags);
217 #define arch_irn_is(irn, flag) ((arch_irn_get_flags(irn) & arch_irn_flags_ ## flag) != 0)
220 * Get the operations of an irn.
221 * @param self The handler from which the method is invoked.
222 * @param irn Some node.
223 * @return Operations for that irn.
225 typedef const void *(arch_get_irn_ops_t)(const ir_node *irn);
228 * Initialize the architecture environment struct.
229 * @param isa The isa which shall be put into the environment.
230 * @param file_handle The file handle
231 * @return The environment.
233 extern arch_env_t *arch_env_init(const arch_isa_if_t *isa,
234 FILE *file_handle, be_main_env_t *main_env);
237 * Register an instruction set architecture
239 void be_register_isa_if(const char *name, const arch_isa_if_t *isa);
244 struct arch_register_t {
245 const char *name; /**< The name of the register. */
246 const arch_register_class_t *reg_class; /**< The class of the register */
247 unsigned short index; /**< The index of the register in
249 unsigned short global_index; /** The global index this register
250 in the architecture. */
251 arch_register_type_t type; /**< The type of the register. */
252 /** register constraint allowing just this register */
253 const arch_register_req_t *single_req;
256 static inline const arch_register_class_t *arch_register_get_class(
257 const arch_register_t *reg)
259 return reg->reg_class;
262 static inline unsigned arch_register_get_index(const arch_register_t *reg)
267 static inline const char *arch_register_get_name(const arch_register_t *reg)
273 * A class of registers.
274 * Like general purpose or floating point.
276 struct arch_register_class_t {
277 unsigned index; /**< index of this register class */
278 const char *name; /**< The name of the register class.*/
279 unsigned n_regs; /**< Number of registers in this
281 ir_mode *mode; /**< The mode of the register class.*/
282 const arch_register_t *regs; /**< The array of registers. */
283 arch_register_class_flags_t flags; /**< register class flags. */
284 const arch_register_req_t *class_req;
287 /** return the number of registers in this register class */
288 #define arch_register_class_n_regs(cls) ((cls)->n_regs)
290 /** return the largest mode of this register class */
291 #define arch_register_class_mode(cls) ((cls)->mode)
293 /** return the name of this register class */
294 #define arch_register_class_name(cls) ((cls)->name)
296 /** return the index of this register class */
297 #define arch_register_class_index(cls) ((cls)->index)
299 /** return the register class flags */
300 #define arch_register_class_flags(cls) ((cls)->flags)
302 static inline const arch_register_t *arch_register_for_index(
303 const arch_register_class_t *cls, unsigned idx)
305 assert(idx < cls->n_regs);
306 return &cls->regs[idx];
310 * Convenience macro to check for set constraints.
311 * @param req A pointer to register requirements.
312 * @param kind The kind of constraint to check for
313 * (see arch_register_req_type_t).
314 * @return 1, If the kind of constraint is present, 0 if not.
316 #define arch_register_req_is(req, kind) \
317 (((req)->type & (arch_register_req_type_ ## kind)) != 0)
320 * Expresses requirements to register allocation for an operand.
322 struct arch_register_req_t {
323 arch_register_req_type_t type; /**< The type of the constraint. */
324 const arch_register_class_t *cls; /**< The register class this constraint
326 const unsigned *limited; /**< allowed register bitset */
327 unsigned other_same; /**< Bitmask of ins which should use the
328 same register (should_be_same). */
329 unsigned other_different; /**< Bitmask of ins which shall use a
331 (must_be_different) */
332 unsigned char width; /**< specifies how many sequential
333 registers are required */
336 static inline int reg_reqs_equal(const arch_register_req_t *req1,
337 const arch_register_req_t *req2)
342 if (req1->type != req2->type
343 || req1->cls != req2->cls
344 || req1->other_same != req2->other_same
345 || req1->other_different != req2->other_different)
348 if (req1->limited != NULL) {
351 if (req2->limited == NULL)
354 n_regs = arch_register_class_n_regs(req1->cls);
355 if (!rbitsets_equal(req1->limited, req2->limited, n_regs))
363 * An inverse operation returned by the backend
365 struct arch_inverse_t {
366 int n; /**< count of nodes returned in nodes array */
367 int costs; /**< costs of this remat */
369 /** nodes for this inverse operation. shall be in schedule order.
370 * last element is the target value */
374 struct arch_irn_ops_t {
378 * @param irn The node.
379 * @return A classification.
381 arch_irn_class_t (*classify)(const ir_node *irn);
384 * Get the entity on the stack frame this node depends on.
385 * @param irn The node in question.
386 * @return The entity on the stack frame or NULL, if the node does not have
387 * a stack frame entity.
389 ir_entity *(*get_frame_entity)(const ir_node *irn);
392 * Set the offset of a node carrying an entity on the stack frame.
393 * @param irn The node.
394 * @param offset The offset of the node's stack frame entity.
396 void (*set_frame_offset)(ir_node *irn, int offset);
399 * Returns the delta of the stackpointer for nodes that increment or
400 * decrement the stackpointer with a constant value. (push, pop
401 * nodes on most architectures).
402 * A positive value stands for an expanding stack area, a negative value for
405 * @param irn The node
406 * @return 0 if the stackpointer is not modified with a constant
407 * value, otherwise the increment/decrement value
409 int (*get_sp_bias)(const ir_node *irn);
412 * Returns an inverse operation which yields the i-th argument
413 * of the given node as result.
415 * @param irn The original operation
416 * @param i Index of the argument we want the inverse operation to
418 * @param inverse struct to be filled with the resulting inverse op
419 * @param obstack The obstack to use for allocation of the returned nodes
421 * @return The inverse operation or NULL if operation invertible
423 arch_inverse_t *(*get_inverse)(const ir_node *irn, int i,
424 arch_inverse_t *inverse,
425 struct obstack *obstack);
428 * Get the estimated cycle count for @p irn.
430 * @param irn The node.
431 * @return The estimated cycle count for this operation
433 int (*get_op_estimated_cost)(const ir_node *irn);
436 * Asks the backend whether operand @p i of @p irn can be loaded form memory
439 * @param irn The node.
440 * @param i Index of the argument we would like to know whether @p irn
441 * can load it form memory internally
442 * @return nonzero if argument can be loaded or zero otherwise
444 int (*possible_memory_operand)(const ir_node *irn, unsigned int i);
447 * Ask the backend to assimilate @p reload of operand @p i into @p irn.
449 * @param irn The node.
450 * @param spill The spill.
451 * @param i The position of the reload.
453 void (*perform_memory_operand)(ir_node *irn, ir_node *spill,
458 * Architecture interface.
460 struct arch_isa_if_t {
462 * Initialize the isa interface.
463 * @param file_handle the file handle to write the output to
464 * @return a new isa instance
466 arch_env_t *(*init)(FILE *file_handle);
469 * lowers current program for target. See the documentation for
470 * be_lower_for_target() for details.
472 void (*lower_for_target)(void);
475 * Free the isa instance.
477 void (*done)(void *self);
480 * Called directly after initialization. Backend should handle all
483 void (*handle_intrinsics)(void);
486 * Get the register class which shall be used to store a value of a given
488 * @param self The this pointer.
489 * @param mode The mode in question.
490 * @return A register class which can hold values of the given mode.
492 const arch_register_class_t *(*get_reg_class_for_mode)(const ir_mode *mode);
495 * Get the ABI restrictions for procedure calls.
496 * @param self The this pointer.
497 * @param call_type The call type of the method (procedure) in question.
498 * @param p The array of parameter locations to be filled.
500 void (*get_call_abi)(const void *self, ir_type *call_type,
504 * Get the necessary alignment for storing a register of given class.
505 * @param self The isa object.
506 * @param cls The register class.
507 * @return The alignment in bytes.
509 int (*get_reg_class_alignment)(const arch_register_class_t *cls);
512 * A "static" function, returns the frontend settings
513 * needed for this backend.
515 const backend_params *(*get_params)(void);
518 * Return an ordered list of irgs where code should be generated for.
519 * If NULL is returned, all irg will be taken into account and they will be
520 * generated in an arbitrary order.
521 * @param self The isa object.
522 * @param irgs A flexible array ARR_F of length 0 where the backend can
523 * append the desired irgs.
524 * @return A flexible array ARR_F containing all desired irgs in the
527 ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs);
530 * mark node as rematerialized
532 void (*mark_remat)(ir_node *node);
535 * parse an assembler constraint part and set flags according to its nature
536 * advances the *c pointer to point to the last parsed character (so if you
537 * parse a single character don't advance c)
539 asm_constraint_flags_t (*parse_asm_constraint)(const char **c);
542 * returns true if the string is a valid clobbered (register) in this
545 int (*is_valid_clobber)(const char *clobber);
548 * Initialize the code generator.
550 * @return A newly created code generator.
552 void (*init_graph)(ir_graph *irg);
555 * return node used as base in pic code addresses
557 ir_node* (*get_pic_base)(ir_graph *irg);
560 * Called before abi introduce.
562 void (*before_abi)(ir_graph *irg);
565 * Called, when the graph is being normalized.
567 void (*prepare_graph)(ir_graph *irg);
570 * Called before register allocation.
572 void (*before_ra)(ir_graph *irg);
575 * Called after register allocation.
577 void (*after_ra)(ir_graph *irg);
580 * Called directly before done is called. This should be the last place
581 * where the irg is modified.
583 void (*finish)(ir_graph *irg);
586 * Called after everything happened. This call should emit the final
587 * assembly code but avoid changing the irg.
588 * The code generator must also be de-allocated here.
590 void (*emit)(ir_graph *irg);
593 #define arch_env_done(env) ((env)->impl->done(env))
594 #define arch_env_handle_intrinsics(env) \
595 do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
596 #define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((mode)))
597 #define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((env), (tp), (abi)))
598 #define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((cls)))
599 #define arch_env_get_params(env) ((env)->impl->get_params())
600 #define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((irn)))
601 #define arch_env_get_machine(env) ((env)->impl->get_machine(env))
602 #define arch_env_get_backend_irg_list(env,irgs) ((env)->impl->get_backend_irg_list((env), (irgs)))
603 #define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((c))
604 #define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((clobber))
605 #define arch_env_mark_remat(env,node) \
606 do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0)
612 const arch_isa_if_t *impl;
613 unsigned n_registers; /**< number of registers */
614 const arch_register_t *registers; /**< register array */
615 unsigned n_register_classes; /**< number of register classes*/
616 const arch_register_class_t *register_classes; /**< register classes */
617 const arch_register_t *sp; /**< The stack pointer register. */
618 const arch_register_t *bp; /**< The base pointer register. */
619 const arch_register_class_t *link_class; /**< The static link pointer
621 int stack_alignment; /**< power of 2 stack alignment */
622 const be_main_env_t *main_env; /**< the be main environment */
623 int spill_cost; /**< cost for a be_Spill node */
624 int reload_cost; /**< cost for a be_Reload node */
625 bool custom_abi : 1; /**< backend does all abi handling
626 and does not need the generic
627 stuff from beabi.h/.c */
630 static inline unsigned arch_irn_get_n_outs(const ir_node *node)
632 backend_info_t *info = be_get_info(node);
633 if (info->out_infos == NULL)
636 return (unsigned)ARR_LEN(info->out_infos);
639 static inline const arch_irn_ops_t *get_irn_ops_simple(const ir_node *node)
641 const ir_op *ops = get_irn_op(node);
642 const arch_irn_ops_t *be_ops = get_op_ops(ops)->be_ops;
643 assert(!is_Proj(node));
647 static inline const arch_register_req_t *arch_get_register_req_out(
651 backend_info_t *info;
653 /* you have to query the Proj nodes for the constraints (or use
654 * arch_get_out_register_req. Querying a mode_T node and expecting
655 * arch_no_register_req is a bug in your code! */
656 assert(get_irn_mode(irn) != mode_T);
659 pos = get_Proj_proj(irn);
660 irn = get_Proj_pred(irn);
663 info = be_get_info(irn);
664 if (info->out_infos == NULL)
665 return arch_no_register_req;
667 return info->out_infos[pos].req;
670 static inline bool arch_irn_is_ignore(const ir_node *irn)
672 const arch_register_req_t *req = arch_get_register_req_out(irn);
673 return !!(req->type & arch_register_req_type_ignore);
676 static inline bool arch_irn_consider_in_reg_alloc(
677 const arch_register_class_t *cls, const ir_node *node)
679 const arch_register_req_t *req = arch_get_register_req_out(node);
682 !(req->type & arch_register_req_type_ignore);
686 * Get register constraints for an operand at position @p
688 static inline const arch_register_req_t *arch_get_in_register_req(
689 const ir_node *node, int pos)
691 const backend_info_t *info = be_get_info(node);
692 if (info->in_reqs == NULL)
693 return arch_no_register_req;
694 return info->in_reqs[pos];
698 * Get register constraint for a produced result (the @p pos result)
700 static inline const arch_register_req_t *arch_get_out_register_req(
701 const ir_node *node, int pos)
703 const backend_info_t *info = be_get_info(node);
704 if (info->out_infos == NULL)
705 return arch_no_register_req;
706 return info->out_infos[pos].req;
709 static inline void arch_set_out_register_req(ir_node *node, int pos,
710 const arch_register_req_t *req)
712 backend_info_t *info = be_get_info(node);
713 assert(pos < (int) arch_irn_get_n_outs(node));
714 info->out_infos[pos].req = req;
717 static inline void arch_set_in_register_reqs(ir_node *node,
718 const arch_register_req_t **in_reqs)
720 backend_info_t *info = be_get_info(node);
721 info->in_reqs = in_reqs;
724 static inline const arch_register_req_t **arch_get_in_register_reqs(
727 backend_info_t *info = be_get_info(node);
728 return info->in_reqs;
732 * Iterate over all values defined by an instruction.
733 * Only looks at values in a certain register class where the requirements
734 * are not marked as ignore.
735 * Executes @p code for each definition.
737 #define be_foreach_definition_(node, cls, value, code) \
739 if (get_irn_mode(node) == mode_T) { \
740 const ir_edge_t *edge_; \
741 foreach_out_edge(node, edge_) { \
742 const arch_register_req_t *req_; \
743 value = get_edge_src_irn(edge_); \
744 req_ = arch_get_register_req_out(value); \
745 if (req_->cls != cls) \
750 const arch_register_req_t *req_ = arch_get_register_req_out(node); \
752 if (req_->cls == cls) { \
758 #define be_foreach_definition(node, cls, value, code) \
759 be_foreach_definition_(node, cls, value, \
760 if (req_->type & arch_register_req_type_ignore) \