5 #include "firm_config.h"
18 typedef struct _arch_register_class_t arch_register_class_t;
19 typedef struct _arch_register_t arch_register_t;
20 typedef struct _arch_enum_t arch_enum_t;
21 typedef struct _arch_enum_member_t arch_enum_member_t;
22 typedef struct _arch_isa_if_t arch_isa_if_t;
23 typedef struct _arch_env_t arch_env_t;
24 typedef struct _arch_irn_ops_t arch_irn_ops_t;
25 typedef struct _arch_irn_handler_t arch_irn_handler_t;
27 typedef enum _arch_register_type_t {
28 arch_register_type_none = 0,
29 arch_register_type_write_invariant,
30 arch_register_type_caller_saved, /**< The register must be saved by the caller
31 upon a function call. It thus can be overwritten
32 in the called function. */
33 arch_register_type_callee_saved, /**< The register must be saved by the called function,
34 it thus survives a function call. */
35 arch_register_type_ignore /**< Do not consider this register when allocating. */
36 } arch_register_type_t;
41 struct _arch_register_t {
42 const char *name; /**< The name of the register. */
43 const arch_register_class_t *reg_class; /**< The class the register belongs to. */
44 int index; /**< The index of the register in the class. */
45 arch_register_type_t type; /**< The type of the register. */
46 void *data; /**< Custom data. */
49 static INLINE const arch_register_class_t *
50 _arch_register_get_class(const arch_register_t *reg)
52 return reg->reg_class;
55 static INLINE int _arch_register_get_index(const arch_register_t *reg)
60 #define arch_register_get_class(reg) _arch_register_get_class(reg)
61 #define arch_register_get_index(reg) _arch_register_get_index(reg)
62 #define arch_register_get_name(reg) ((reg)->name)
65 * A class of registers.
66 * Like general purpose or floating point.
68 struct _arch_register_class_t {
69 const char *name; /**< The name of the register. */
70 int n_regs; /**< Number of registers in this class. */
71 const arch_register_t *regs; /**< The array of registers. */
74 #define arch_register_class_n_regs(cls) ((cls)->n_regs)
77 * Put all registers in a class into a bitset.
78 * @param cls The class.
79 * @param bs The bitset. May be NULL.
80 * @return The number of registers in the class.
82 extern int arch_register_class_put(const arch_register_class_t *cls,
83 struct _bitset_t *bs);
85 static INLINE const arch_register_t *
86 _arch_register_for_index(const arch_register_class_t *cls, int idx)
88 assert(0 <= idx && idx < cls->n_regs);
89 return &cls->regs[idx];
92 #define arch_register_for_index(cls, idx) \
93 _arch_register_for_index(cls, idx)
96 * Get the register set for a register class.
97 * @param cls The register class.
98 * @return The set containing all registers in the class.
100 #define arch_get_register_set_for_class(cls) ((cls)->set)
105 struct _arch_immediate_t {
106 const char *name; /**< The name of the immediate. */
107 ir_mode *mode; /**< The mode of the immediate. */
111 * The member of an enum.
113 struct _arch_enum_member_t {
114 arch_enum_t *enm; /**< The enum, this member belongs to. */
118 * An enumeration operand type.
120 * Enumeration operand types can be used to describe the variants
121 * of an instruction, like giving the cases for a compare (gt, lt,
122 * eq, ...) some other special attributes of an instruction.
124 struct _arch_enum_t {
125 int n_members; /**< The number of members in this enum. */
126 arch_enum_member_t *members[1]; /**< The array of members. */
129 typedef enum _arch_operand_type_t {
130 arch_operand_type_invalid,
131 arch_operand_type_memory,
132 arch_operand_type_register,
133 arch_operand_type_immediate,
134 arch_operand_type_symconst,
135 arch_operand_type_last
136 } arch_operand_type_t;
139 * Different types of register allocation requirements.
141 typedef enum _arch_register_req_type_t {
142 arch_register_req_type_none = 0, /** No register requirement. */
144 arch_register_req_type_normal = 1, /** All registers in the class
147 arch_register_req_type_limited = 2, /** Only a real subset of
148 the class is allowed. */
150 arch_register_req_type_equal = 4, /** The register must equal
151 another one at the node. */
153 arch_register_req_type_unequal = 8, /** The register must be unequal
154 to some other at the node. */
156 arch_register_req_type_pair = 16 /** The register is part of a
158 } arch_register_req_type_t;
160 #define arch_register_req_is_constr(x) \
161 ((x)->type & (arch_register_req_type_pair + arch_register_req_type_limited - 1) != 0)
164 * Expresses requirements to register allocation for an operand.
166 typedef struct _arch_register_req_t {
167 arch_register_req_type_t type; /** The type of the constraint. */
168 const arch_register_class_t *cls; /** The register class this
169 constraint belongs to. */
171 int (*limited)(const ir_node *irn, int pos, struct _bitset_t *bs);
172 /** In case of the 'limited'
173 constraint, this function
174 must put all allowable
175 registers in the bitset and
176 return the number of registers
179 int pos; /** In case of the equal constraint,
180 this gives the position of the
181 operand to which the register of
182 this should be equal to. Same for
185 } arch_register_req_t;
188 * Certain node classes which are relevent for the register allocator.
190 typedef enum _arch_irn_class_t {
191 arch_irn_class_normal,
192 arch_irn_class_spill,
193 arch_irn_class_reload,
199 * Some words about positions and indices:
201 * Firm has the policy "One node per value", that's why there are
202 * Proj nodes. This view has its advantages, but in a backend
203 * setting where we talk about instructions (which can also have
204 * multiple results and not a single Tuple value) this is sometimes
207 * Each node representing an instruction must provide information
208 * about the kind of its operands (where operands mean both input
209 * and output operands). Such an operand is addressed with a position
210 * which is infact a tuple {in, out} x N. The fact that a position
211 * is an input/output operand is encoded in the sign, so input operands
212 * go from 0..n-1 and output operands from -1..-m if the
213 * instruction has n input and m output operands.
216 #define _BEARCH_TRANSFORM_INDEX(cmp, index) ((index) cmp 0 ? -((index) + 1) : (index))
219 * Make an in position from an index.
220 * @param index The index.
221 * @return The position representing the index as an in operand.
223 #define arch_pos_make_in(index) _BEARCH_TRANSFORM_INDEX(<, index)
226 * Make an out position from an index.
227 * @param index The index.
228 * @return The position representing the index as an out operand.
230 #define arch_pos_make_out(index) _BEARCH_TRANSFORM_INDEX(>=, index)
233 * Check, if a position denotes an input operand.
234 * @param pos The position.
235 * @return 1, if the position denotes an input operand 0 if not.
237 #define arch_pos_is_in(pos) ((pos) >= 0)
240 * Check, if a position denotes an output operand.
241 * @param pos The position.
242 * @return 1, if the position denotes an output operand 0 if not.
244 #define arch_pos_is_out(pos) (!arch_pos_is_in(pos))
247 * Get the index of a position.
248 * @param pos The position.
249 * @return The index of the position.
251 #define arch_pos_get_index(pos) _BEARCH_TRANSFORM_INDEX(<, pos)
253 struct _arch_irn_ops_t {
256 * Get the register requirements for a given operand.
257 * @param self The self pointer.
258 * @param irn The node.
259 * @param pos The operand's position.
260 * @return The register requirements for the selected operand.
261 * The pointer returned is never NULL.
263 const arch_register_req_t *(*get_irn_reg_req)(const arch_irn_ops_t *self,
264 arch_register_req_t *req,
265 const ir_node *irn, int pos);
268 * Get the number of operands of a node.
269 * @param irn The node.
270 * @param in_out Denotes wither input (a number >= 0) or
271 * output (a number < 0).
272 * @return The number of operands for either in, or output.
274 int (*get_n_operands)(const arch_irn_ops_t *self, const ir_node *irn, int in_out);
277 * Set the register for an output operand.
278 * @param irn The node.
279 * @param pos The position of the output operand.
280 * @param reg The register allocated to that operand.
281 * @note If the operand is not a register operand,
282 * the call is ignored.
284 void (*set_irn_reg)(const arch_irn_ops_t *self, ir_node *irn,
285 int idx, const arch_register_t *reg);
288 * Get the register allocated for an output operand.
289 * @param irn The node.
290 * @param pos The index of the output operand.
291 * @return The register allocated at that operand. NULL, if
292 * the operand was no register operand or
293 * @c arch_register_invalid, if no register has yet been
294 * allocated for this node.
296 const arch_register_t *(*get_irn_reg)(const arch_irn_ops_t *self,
297 const ir_node *irn, int idx);
301 * @param irn The node.
302 * @return A classification.
304 arch_irn_class_t (*classify)(const arch_irn_ops_t *self, const ir_node *irn);
309 * Get the register requirements for a node.
310 * @param env The architecture environment.
311 * @param req A pointer to a requirements structure, where the data can
313 * @param irn The node.
314 * @param pos The position of the operand you're interested in.
315 * @return A pointer to the register requirements which may <b>not</b>
316 * neccessarily be equal to @p req. If NULL is returned, the
317 * operand was no register operand.
319 extern const arch_register_req_t *
320 arch_get_register_req(const arch_env_t *env, arch_register_req_t *req,
321 const ir_node *irn, int pos);
324 * Check if an operand is a register operand.
325 * @param env The environment.
326 * @param irn The node.
327 * @param pos The position of the operand.
328 * @return 1, if the operand is significant for register allocation, 0
331 extern int arch_is_register_operand(const arch_env_t *env,
332 const ir_node *irn, int pos);
335 * Get the number of allocatable registers concerning
336 * a register class for an operand of a node.
337 * @param env The environment.
338 * @param irn The node.
339 * @param pos The postition of the node's operand.
340 * @param cls The register class.
341 * @param bs The bitset all allocatable registers shall be put into.
342 * Note, that you can also pass NULL here. If you don't,
343 * make sure, the bitset is as large as the register class
345 * @return The amount of registers allocatable for that operand.
347 extern int arch_get_allocatable_regs(const arch_env_t *env, const ir_node *irn,
348 int pos, const arch_register_class_t *cls, struct _bitset_t *bs);
351 * Check, if a register is assignable to an operand of a node.
352 * @param env The architecture environment.
353 * @param irn The node.
354 * @param pos The position of the operand.
355 * @param reg The register.
356 * @return 1, if the register might be allocated to the operand 0 if not.
358 extern int arch_reg_is_allocatable(const arch_env_t *env,
359 const ir_node *irn, int pos, const arch_register_t *reg);
362 * Get the register class of an operand of a node.
363 * @param env The architecture environment.
364 * @param irn The node.
365 * @param idx The position of the operand.
366 * @return The register class of the operand or NULL, if
367 * operand is a non-register operand.
369 extern const arch_register_class_t *
370 arch_get_irn_reg_class(const arch_env_t *env, const ir_node *irn, int pos);
373 * Get the register allocated at a certain output operand of a node.
374 * @param env The arch nvironment.
375 * @param irn The node.
376 * @param idx The index of the output operand.
377 * @return The register allocated for this operand
379 extern const arch_register_t *
380 arch_get_irn_register(const arch_env_t *env, const ir_node *irn, int idx);
383 * Set the register for a certain output operand.
384 * @param env The architecture environment.
385 * @param irn The node.
386 * @param idx The index of the output operand.
387 * @param reg The register.
389 extern void arch_set_irn_register(const arch_env_t *env,
390 ir_node *irn, int idx, const arch_register_t *reg);
392 #define arch_irn_has_reg_class(env, irn, pos, cls) \
393 ((cls) == arch_get_irn_reg_class(env, irn, pos))
396 * Somebody who can be asked about nodes.
398 struct _arch_irn_handler_t {
401 * Get the operations of an irn.
402 * @param self The handler from which the method is invoked.
403 * @param irn Some node.
404 * @return Operations for that irn.
406 const arch_irn_ops_t *(*get_irn_ops)(const arch_irn_handler_t *handler,
412 * Architecture interface.
414 struct _arch_isa_if_t {
417 * Initialize the isa interface.
422 * Get the the number of register classes in the isa.
423 * @return The number of register classes.
425 int (*get_n_reg_class)(void);
428 * Get the i-th register class.
429 * @param i The number of the register class.
430 * @return The register class.
432 const arch_register_class_t *(*get_reg_class)(int i);
436 #define ARCH_MAX_HANDLERS 8
439 * Environment for the architecture infrastructure.
440 * Keep this everywhere you're going.
443 const arch_isa_if_t *isa; /** The isa about which everything is. */
445 arch_irn_handler_t const *handlers[ARCH_MAX_HANDLERS]; /** The handlers are organized as
448 int handlers_tos; /** The stack pointer of the handler
453 * Get the isa of an arch environment.
454 * @param env The environment.
455 * @return The isa with which the env was initialized with.
457 #define arch_env_get_isa(env) ((env)->isa)
460 * Initialize the architecture environment struct.
461 * @param isa The isa which shall be put into the environment.
462 * @return The environment.
464 extern arch_env_t *arch_env_init(arch_env_t *env, const arch_isa_if_t *isa);
467 * Add a node handler to the environment.
468 * @param env The environment.
469 * @param handler A node handler.
470 * @return The environment itself.
472 extern arch_env_t *arch_env_add_irn_handler(arch_env_t *env,
473 const arch_irn_handler_t *handler);
475 #endif /* _FIRM_BEARCH_H */