2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Processor architecture specification.
23 * @author Sebastian Hack
26 #ifndef FIRM_BE_BEARCH_H
27 #define FIRM_BE_BEARCH_H
31 #include "firm_types.h"
34 #include "raw_bitset.h"
43 typedef enum arch_register_class_flags_t {
44 arch_register_class_flag_none = 0,
45 /** don't do automatic register allocation for this class */
46 arch_register_class_flag_manual_ra = 1U << 0,
47 /** the register models an abstract state (example: fpu rounding mode) */
48 arch_register_class_flag_state = 1U << 1
49 } arch_register_class_flags_t;
50 ENUM_BITSET(arch_register_class_flags_t)
52 typedef enum arch_register_type_t {
53 arch_register_type_none = 0,
54 /** The register must be saved by the caller upon a function call. It thus
55 * can be overwritten in the called function. */
56 arch_register_type_caller_save = 1U << 0,
57 /** The register must be saved by the caller upon a function call. It thus
58 * can be overwritten in the called function. */
59 arch_register_type_callee_save = 1U << 1,
60 /** Do not consider this register when allocating. */
61 arch_register_type_ignore = 1U << 2,
62 /** The emitter can choose an arbitrary register. The register fulfills any
63 * register constraints as long as the register class matches */
64 arch_register_type_joker = 1U << 3,
65 /** This is just a virtual register. Virtual registers fulfill any register
66 * constraints as long as the register class matches. It is a allowed to
67 * have multiple definitions for the same virtual register at a point */
68 arch_register_type_virtual = 1U << 4,
69 /** The register represents a state that should be handled by bestate
71 arch_register_type_state = 1U << 5,
72 } arch_register_type_t;
73 ENUM_BITSET(arch_register_type_t)
76 * Different types of register allocation requirements.
78 typedef enum arch_register_req_type_t {
79 /** No register requirement. */
80 arch_register_req_type_none = 0,
81 /** All registers in the class are allowed. */
82 arch_register_req_type_normal = 1U << 0,
83 /** Only a real subset of the class is allowed. */
84 arch_register_req_type_limited = 1U << 1,
85 /** The register should be equal to another one at the node. */
86 arch_register_req_type_should_be_same = 1U << 2,
87 /** The register must be unequal from some other at the node. */
88 arch_register_req_type_must_be_different = 1U << 3,
89 /** The registernumber should be aligned (in case of multiregister values)*/
90 arch_register_req_type_aligned = 1U << 4,
91 /** ignore while allocating registers */
92 arch_register_req_type_ignore = 1U << 5,
93 /** the output produces a new value for the stack pointer
94 * (this is not really a constraint but a marker to guide the stackpointer
96 arch_register_req_type_produces_sp = 1U << 6,
97 } arch_register_req_type_t;
98 ENUM_BITSET(arch_register_req_type_t)
100 extern const arch_register_req_t *arch_no_register_req;
103 * Print information about a register requirement in human readable form
104 * @param F output stream/file
105 * @param req The requirements structure to format.
107 void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
108 const ir_node *node);
110 void arch_dump_register_reqs(FILE *F, const ir_node *node);
111 void arch_dump_reqs_and_registers(FILE *F, const ir_node *node);
114 * Node classification. Used for statistics and for detecting reload nodes.
116 typedef enum arch_irn_class_t {
117 arch_irn_class_none = 0,
118 arch_irn_class_spill = 1 << 0,
119 arch_irn_class_reload = 1 << 1,
120 arch_irn_class_remat = 1 << 2,
121 arch_irn_class_copy = 1 << 3,
122 arch_irn_class_perm = 1 << 4
124 ENUM_BITSET(arch_irn_class_t)
126 void arch_set_frame_offset(ir_node *irn, int bias);
128 ir_entity *arch_get_frame_entity(const ir_node *irn);
129 int arch_get_sp_bias(ir_node *irn);
131 int arch_get_op_estimated_cost(const ir_node *irn);
132 arch_inverse_t *arch_get_inverse(const ir_node *irn, int i,
133 arch_inverse_t *inverse,
134 struct obstack *obstack);
135 int arch_possible_memory_operand(const ir_node *irn,
137 void arch_perform_memory_operand(ir_node *irn, ir_node *spill,
141 * Get the register requirements for a node.
142 * @note Deprecated API! Preferably use
143 * arch_get_in_register_req and
144 * arch_get_out_register_req.
146 * @param irn The node.
147 * @param pos The position of the operand you're interested in.
148 * @return A pointer to the register requirements. If NULL is returned, the
149 * operand was no register operand.
151 const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos);
154 * Check, if a register is assignable to an operand of a node.
155 * @param irn The node.
156 * @param pos The position of the operand.
157 * @param reg The register.
158 * @return 1, if the register might be allocated to the operand 0 if not.
160 int arch_reg_is_allocatable(const ir_node *irn, int pos,
161 const arch_register_t *reg);
163 #define arch_reg_out_is_allocatable(irn, reg) arch_reg_is_allocatable(irn, -1, reg)
166 * Get the register class of an operand of a node.
167 * @param irn The node.
168 * @param pos The position of the operand, -1 for the output.
169 * @return The register class of the operand or NULL, if
170 * operand is a non-register operand.
172 const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn,
175 #define arch_get_irn_reg_class_out(irn) arch_get_irn_reg_class(irn, -1)
178 * Get the register allocated at a certain output operand of a node.
179 * @param irn The node.
180 * @return The register allocated for this operand
182 const arch_register_t *arch_get_irn_register(const ir_node *irn);
183 const arch_register_t *arch_irn_get_register(const ir_node *irn, int pos);
186 * Set the register for a certain output operand.
187 * @param irn The node.
188 * @param reg The register.
190 void arch_set_irn_register(ir_node *irn, const arch_register_t *reg);
191 void arch_irn_set_register(ir_node *irn, int pos, const arch_register_t *reg);
195 * @param irn The node.
196 * @return A classification of the node.
198 arch_irn_class_t arch_irn_classify(const ir_node *irn);
201 * Get the flags of a node.
202 * @param irn The node.
205 arch_irn_flags_t arch_irn_get_flags(const ir_node *irn);
207 void arch_irn_set_flags(ir_node *node, arch_irn_flags_t flags);
208 void arch_irn_add_flags(ir_node *node, arch_irn_flags_t flags);
210 #define arch_irn_is(irn, flag) ((arch_irn_get_flags(irn) & arch_irn_flags_ ## flag) != 0)
213 * Get the operations of an irn.
214 * @param self The handler from which the method is invoked.
215 * @param irn Some node.
216 * @return Operations for that irn.
218 typedef const void *(arch_get_irn_ops_t)(const ir_node *irn);
221 * Initialize the architecture environment struct.
222 * @param isa The isa which shall be put into the environment.
223 * @param file_handle The file handle
224 * @return The environment.
226 extern arch_env_t *arch_env_init(const arch_isa_if_t *isa,
227 FILE *file_handle, be_main_env_t *main_env);
230 * Register an instruction set architecture
232 void be_register_isa_if(const char *name, const arch_isa_if_t *isa);
237 struct arch_register_t {
238 const char *name; /**< The name of the register. */
239 const arch_register_class_t *reg_class; /**< The class of the register */
240 unsigned short index; /**< The index of the register in
242 unsigned short global_index; /** The global index this register
243 in the architecture. */
244 arch_register_type_t type; /**< The type of the register. */
245 /** register constraint allowing just this register */
246 const arch_register_req_t *single_req;
249 static inline const arch_register_class_t *arch_register_get_class(
250 const arch_register_t *reg)
252 return reg->reg_class;
255 static inline unsigned arch_register_get_index(const arch_register_t *reg)
260 static inline const char *arch_register_get_name(const arch_register_t *reg)
266 * Convenience macro to check for register type.
267 * @param req A pointer to register.
268 * @param kind The kind of type to check for (see arch_register_type_t).
269 * @return 1, If register is of given kind, 0 if not.
271 #define arch_register_type_is(reg, kind) \
272 (((reg)->type & arch_register_type_ ## kind) != 0)
275 * A class of registers.
276 * Like general purpose or floating point.
278 struct arch_register_class_t {
279 unsigned index; /**< index of this register class */
280 const char *name; /**< The name of the register class.*/
281 unsigned n_regs; /**< Number of registers in this
283 ir_mode *mode; /**< The mode of the register class.*/
284 const arch_register_t *regs; /**< The array of registers. */
285 arch_register_class_flags_t flags; /**< register class flags. */
286 const arch_register_req_t *class_req;
289 /** return the number of registers in this register class */
290 #define arch_register_class_n_regs(cls) ((cls)->n_regs)
292 /** return the largest mode of this register class */
293 #define arch_register_class_mode(cls) ((cls)->mode)
295 /** return the name of this register class */
296 #define arch_register_class_name(cls) ((cls)->name)
298 /** return the index of this register class */
299 #define arch_register_class_index(cls) ((cls)->index)
301 /** return the register class flags */
302 #define arch_register_class_flags(cls) ((cls)->flags)
304 static inline const arch_register_t *arch_register_for_index(
305 const arch_register_class_t *cls, unsigned idx)
307 assert(idx < cls->n_regs);
308 return &cls->regs[idx];
312 * Convenience macro to check for set constraints.
313 * @param req A pointer to register requirements.
314 * @param kind The kind of constraint to check for
315 * (see arch_register_req_type_t).
316 * @return 1, If the kind of constraint is present, 0 if not.
318 #define arch_register_req_is(req, kind) \
319 (((req)->type & (arch_register_req_type_ ## kind)) != 0)
322 * Expresses requirements to register allocation for an operand.
324 struct arch_register_req_t {
325 arch_register_req_type_t type; /**< The type of the constraint. */
326 const arch_register_class_t *cls; /**< The register class this constraint
328 const unsigned *limited; /**< allowed register bitset */
329 unsigned other_same; /**< Bitmask of ins which should use the
330 same register (should_be_same). */
331 unsigned other_different; /**< Bitmask of ins which shall use a
333 (must_be_different) */
334 unsigned char width; /**< specifies how many sequential
335 registers are required */
338 static inline int reg_reqs_equal(const arch_register_req_t *req1,
339 const arch_register_req_t *req2)
344 if (req1->type != req2->type
345 || req1->cls != req2->cls
346 || req1->other_same != req2->other_same
347 || req1->other_different != req2->other_different)
350 if (req1->limited != NULL) {
353 if (req2->limited == NULL)
356 n_regs = arch_register_class_n_regs(req1->cls);
357 if (!rbitsets_equal(req1->limited, req2->limited, n_regs))
365 * An inverse operation returned by the backend
367 struct arch_inverse_t {
368 int n; /**< count of nodes returned in nodes array */
369 int costs; /**< costs of this remat */
371 /** nodes for this inverse operation. shall be in schedule order.
372 * last element is the target value */
376 struct arch_irn_ops_t {
380 * @param irn The node.
381 * @return A classification.
383 arch_irn_class_t (*classify)(const ir_node *irn);
386 * Get the entity on the stack frame this node depends on.
387 * @param irn The node in question.
388 * @return The entity on the stack frame or NULL, if the node does not have
389 * a stack frame entity.
391 ir_entity *(*get_frame_entity)(const ir_node *irn);
394 * Set the offset of a node carrying an entity on the stack frame.
395 * @param irn The node.
396 * @param offset The offset of the node's stack frame entity.
398 void (*set_frame_offset)(ir_node *irn, int offset);
401 * Returns the delta of the stackpointer for nodes that increment or
402 * decrement the stackpointer with a constant value. (push, pop
403 * nodes on most architectures).
404 * A positive value stands for an expanding stack area, a negative value for
407 * @param irn The node
408 * @return 0 if the stackpointer is not modified with a constant
409 * value, otherwise the increment/decrement value
411 int (*get_sp_bias)(const ir_node *irn);
414 * Returns an inverse operation which yields the i-th argument
415 * of the given node as result.
417 * @param irn The original operation
418 * @param i Index of the argument we want the inverse operation to
420 * @param inverse struct to be filled with the resulting inverse op
421 * @param obstack The obstack to use for allocation of the returned nodes
423 * @return The inverse operation or NULL if operation invertible
425 arch_inverse_t *(*get_inverse)(const ir_node *irn, int i,
426 arch_inverse_t *inverse,
427 struct obstack *obstack);
430 * Get the estimated cycle count for @p irn.
432 * @param irn The node.
433 * @return The estimated cycle count for this operation
435 int (*get_op_estimated_cost)(const ir_node *irn);
438 * Asks the backend whether operand @p i of @p irn can be loaded form memory
441 * @param irn The node.
442 * @param i Index of the argument we would like to know whether @p irn
443 * can load it form memory internally
444 * @return nonzero if argument can be loaded or zero otherwise
446 int (*possible_memory_operand)(const ir_node *irn, unsigned int i);
449 * Ask the backend to assimilate @p reload of operand @p i into @p irn.
451 * @param irn The node.
452 * @param spill The spill.
453 * @param i The position of the reload.
455 void (*perform_memory_operand)(ir_node *irn, ir_node *spill,
460 * Architecture interface.
462 struct arch_isa_if_t {
464 * Initialize the isa interface.
465 * @param file_handle the file handle to write the output to
466 * @return a new isa instance
468 arch_env_t *(*init)(FILE *file_handle);
471 * Free the isa instance.
473 void (*done)(void *self);
476 * Called directly after initialization. Backend should handle all
479 void (*handle_intrinsics)(void);
482 * Get the register class which shall be used to store a value of a given
484 * @param self The this pointer.
485 * @param mode The mode in question.
486 * @return A register class which can hold values of the given mode.
488 const arch_register_class_t *(*get_reg_class_for_mode)(const ir_mode *mode);
491 * Get the ABI restrictions for procedure calls.
492 * @param self The this pointer.
493 * @param call_type The call type of the method (procedure) in question.
494 * @param p The array of parameter locations to be filled.
496 void (*get_call_abi)(const void *self, ir_type *call_type,
500 * Get the necessary alignment for storing a register of given class.
501 * @param self The isa object.
502 * @param cls The register class.
503 * @return The alignment in bytes.
505 int (*get_reg_class_alignment)(const arch_register_class_t *cls);
508 * A "static" function, returns the frontend settings
509 * needed for this backend.
511 const backend_params *(*get_params)(void);
514 * Return an ordered list of irgs where code should be generated for.
515 * If NULL is returned, all irg will be taken into account and they will be
516 * generated in an arbitrary order.
517 * @param self The isa object.
518 * @param irgs A flexible array ARR_F of length 0 where the backend can
519 * append the desired irgs.
520 * @return A flexible array ARR_F containing all desired irgs in the
523 ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs);
526 * mark node as rematerialized
528 void (*mark_remat)(ir_node *node);
531 * parse an assembler constraint part and set flags according to its nature
532 * advances the *c pointer to point to the last parsed character (so if you
533 * parse a single character don't advance c)
535 asm_constraint_flags_t (*parse_asm_constraint)(const char **c);
538 * returns true if the string is a valid clobbered (register) in this
541 int (*is_valid_clobber)(const char *clobber);
544 * Initialize the code generator.
546 * @return A newly created code generator.
548 void (*init_graph)(ir_graph *irg);
551 * return node used as base in pic code addresses
553 ir_node* (*get_pic_base)(ir_graph *irg);
556 * Called before abi introduce.
558 void (*before_abi)(ir_graph *irg);
561 * Called, when the graph is being normalized.
563 void (*prepare_graph)(ir_graph *irg);
566 * Called before register allocation.
568 void (*before_ra)(ir_graph *irg);
571 * Called after register allocation.
573 void (*after_ra)(ir_graph *irg);
576 * Called directly before done is called. This should be the last place
577 * where the irg is modified.
579 void (*finish)(ir_graph *irg);
582 * Called after everything happened. This call should emit the final
583 * assembly code but avoid changing the irg.
584 * The code generator must also be de-allocated here.
586 void (*emit)(ir_graph *irg);
589 #define arch_env_done(env) ((env)->impl->done(env))
590 #define arch_env_handle_intrinsics(env) \
591 do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
592 #define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((mode)))
593 #define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((env), (tp), (abi)))
594 #define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((cls)))
595 #define arch_env_get_params(env) ((env)->impl->get_params())
596 #define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((irn)))
597 #define arch_env_get_machine(env) ((env)->impl->get_machine(env))
598 #define arch_env_get_backend_irg_list(env,irgs) ((env)->impl->get_backend_irg_list((env), (irgs)))
599 #define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((c))
600 #define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((clobber))
601 #define arch_env_mark_remat(env,node) \
602 do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0)
608 const arch_isa_if_t *impl;
609 unsigned n_registers; /**< number of registers */
610 const arch_register_t *registers; /**< register array */
611 unsigned n_register_classes; /**< number of register classes*/
612 const arch_register_class_t *register_classes; /**< register classes */
613 const arch_register_t *sp; /**< The stack pointer register. */
614 const arch_register_t *bp; /**< The base pointer register. */
615 const arch_register_class_t *link_class; /**< The static link pointer
617 int stack_dir; /**< -1 for decreasing, 1 for
619 int stack_alignment; /**< power of 2 stack alignment */
620 const be_main_env_t *main_env; /**< the be main environment */
621 int spill_cost; /**< cost for a be_Spill node */
622 int reload_cost; /**< cost for a be_Reload node */
623 bool custom_abi : 1; /**< backend does all abi handling
624 and does not need the generic
625 stuff from beabi.h/.c */
628 static inline unsigned arch_irn_get_n_outs(const ir_node *node)
630 backend_info_t *info = be_get_info(node);
631 if (info->out_infos == NULL)
634 return ARR_LEN(info->out_infos);
637 static inline const arch_irn_ops_t *get_irn_ops_simple(const ir_node *node)
639 const ir_op *ops = get_irn_op(node);
640 const arch_irn_ops_t *be_ops = get_op_ops(ops)->be_ops;
641 assert(!is_Proj(node));
645 static inline const arch_register_req_t *arch_get_register_req_out(
649 backend_info_t *info;
651 /* you have to query the Proj nodes for the constraints (or use
652 * arch_get_out_register_req. Querying a mode_T node and expecting
653 * arch_no_register_req is a bug in your code! */
654 assert(get_irn_mode(irn) != mode_T);
657 pos = get_Proj_proj(irn);
658 irn = get_Proj_pred(irn);
661 info = be_get_info(irn);
662 if (info->out_infos == NULL)
663 return arch_no_register_req;
665 return info->out_infos[pos].req;
668 static inline bool arch_irn_is_ignore(const ir_node *irn)
670 const arch_register_req_t *req = arch_get_register_req_out(irn);
671 return !!(req->type & arch_register_req_type_ignore);
674 static inline bool arch_irn_consider_in_reg_alloc(
675 const arch_register_class_t *cls, const ir_node *node)
677 const arch_register_req_t *req = arch_get_register_req_out(node);
680 !(req->type & arch_register_req_type_ignore);
684 * Get register constraints for an operand at position @p
686 static inline const arch_register_req_t *arch_get_in_register_req(
687 const ir_node *node, int pos)
689 const backend_info_t *info = be_get_info(node);
690 if (info->in_reqs == NULL)
691 return arch_no_register_req;
692 return info->in_reqs[pos];
696 * Get register constraint for a produced result (the @p pos result)
698 static inline const arch_register_req_t *arch_get_out_register_req(
699 const ir_node *node, int pos)
701 const backend_info_t *info = be_get_info(node);
702 if (info->out_infos == NULL)
703 return arch_no_register_req;
704 return info->out_infos[pos].req;
707 static inline void arch_set_out_register_req(ir_node *node, int pos,
708 const arch_register_req_t *req)
710 backend_info_t *info = be_get_info(node);
711 assert(pos < (int) arch_irn_get_n_outs(node));
712 info->out_infos[pos].req = req;
715 static inline void arch_set_in_register_reqs(ir_node *node,
716 const arch_register_req_t **in_reqs)
718 backend_info_t *info = be_get_info(node);
719 info->in_reqs = in_reqs;
722 static inline const arch_register_req_t **arch_get_in_register_reqs(
725 backend_info_t *info = be_get_info(node);
726 return info->in_reqs;
730 * Iterate over all values defined by an instruction.
731 * Only looks at values in a certain register class where the requirements
732 * are not marked as ignore.
733 * Executes @p code for each definition.
735 #define be_foreach_definition_(node, cls, value, code) \
737 if (get_irn_mode(node) == mode_T) { \
738 const ir_edge_t *edge_; \
739 foreach_out_edge(node, edge_) { \
740 const arch_register_req_t *req_; \
741 value = get_edge_src_irn(edge_); \
742 req_ = arch_get_register_req_out(value); \
743 if (req_->cls != cls) \
748 const arch_register_req_t *req_ = arch_get_register_req_out(node); \
750 if (req_->cls == cls) { \
756 #define be_foreach_definition(node, cls, value, code) \
757 be_foreach_definition_(node, cls, value, \
758 if (req_->type & arch_register_req_type_ignore) \