2 * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Processor architecture specification.
23 * @author Sebastian Hack
26 #ifndef FIRM_BE_BEARCH_H
27 #define FIRM_BE_BEARCH_H
31 #include "firm_types.h"
34 #include "raw_bitset.h"
44 * this constant is returned by the get_sp_bias functions if the stack
45 * is reset (usually because the frame pointer is copied to the stack
48 #define SP_BIAS_RESET INT_MIN
50 typedef enum arch_register_class_flags_t {
51 arch_register_class_flag_none = 0,
52 /** don't do automatic register allocation for this class */
53 arch_register_class_flag_manual_ra = 1U << 0,
54 /** the register models an abstract state (example: fpu rounding mode) */
55 arch_register_class_flag_state = 1U << 1
56 } arch_register_class_flags_t;
57 ENUM_BITSET(arch_register_class_flags_t)
59 typedef enum arch_register_type_t {
60 arch_register_type_none = 0,
61 /** Do not consider this register when allocating. */
62 arch_register_type_ignore = 1U << 0,
63 /** The emitter can choose an arbitrary register. The register fulfills any
64 * register constraints as long as the register class matches */
65 arch_register_type_joker = 1U << 1,
66 /** This is just a virtual register. Virtual registers fulfill any register
67 * constraints as long as the register class matches. It is a allowed to
68 * have multiple definitions for the same virtual register at a point */
69 arch_register_type_virtual = 1U << 2,
70 /** The register represents a state that should be handled by bestate
72 arch_register_type_state = 1U << 3,
73 } arch_register_type_t;
74 ENUM_BITSET(arch_register_type_t)
77 * Different types of register allocation requirements.
79 typedef enum arch_register_req_type_t {
80 /** No register requirement. */
81 arch_register_req_type_none = 0,
82 /** All registers in the class are allowed. */
83 arch_register_req_type_normal = 1U << 0,
84 /** Only a real subset of the class is allowed. */
85 arch_register_req_type_limited = 1U << 1,
86 /** The register should be equal to another one at the node. */
87 arch_register_req_type_should_be_same = 1U << 2,
88 /** The register must be unequal from some other at the node. */
89 arch_register_req_type_must_be_different = 1U << 3,
90 /** The registernumber should be aligned (in case of multiregister values)*/
91 arch_register_req_type_aligned = 1U << 4,
92 /** ignore while allocating registers */
93 arch_register_req_type_ignore = 1U << 5,
94 /** the output produces a new value for the stack pointer
95 * (this is not really a constraint but a marker to guide the stackpointer
97 arch_register_req_type_produces_sp = 1U << 6,
98 } arch_register_req_type_t;
99 ENUM_BITSET(arch_register_req_type_t)
101 extern const arch_register_req_t *arch_no_register_req;
104 * Print information about a register requirement in human readable form
105 * @param F output stream/file
106 * @param req The requirements structure to format.
108 void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
109 const ir_node *node);
111 void arch_dump_register_reqs(FILE *F, const ir_node *node);
112 void arch_dump_reqs_and_registers(FILE *F, const ir_node *node);
115 * Node classification. Used for statistics and for detecting reload nodes.
117 typedef enum arch_irn_class_t {
118 arch_irn_class_none = 0,
119 arch_irn_class_spill = 1 << 0,
120 arch_irn_class_reload = 1 << 1,
121 arch_irn_class_remat = 1 << 2,
122 arch_irn_class_copy = 1 << 3,
123 arch_irn_class_perm = 1 << 4
125 ENUM_BITSET(arch_irn_class_t)
127 void arch_set_frame_offset(ir_node *irn, int bias);
129 ir_entity *arch_get_frame_entity(const ir_node *irn);
130 int arch_get_sp_bias(ir_node *irn);
132 int arch_get_op_estimated_cost(const ir_node *irn);
133 arch_inverse_t *arch_get_inverse(const ir_node *irn, int i,
134 arch_inverse_t *inverse,
135 struct obstack *obstack);
136 int arch_possible_memory_operand(const ir_node *irn,
138 void arch_perform_memory_operand(ir_node *irn, ir_node *spill,
142 * Get the register allocated for a value.
144 const arch_register_t *arch_get_irn_register(const ir_node *irn);
147 * Assign register to a value
149 void arch_set_irn_register(ir_node *irn, const arch_register_t *reg);
152 * Set the register for a certain output operand.
154 void arch_set_irn_register_out(ir_node *irn, int pos, const arch_register_t *r);
156 const arch_register_t *arch_get_irn_register_out(const ir_node *irn, int pos);
157 const arch_register_t *arch_get_irn_register_in(const ir_node *irn, int pos);
160 * Get register constraints for an operand at position @p
162 static inline const arch_register_req_t *arch_get_irn_register_req_in(
163 const ir_node *node, int pos)
165 const backend_info_t *info = be_get_info(node);
166 if (info->in_reqs == NULL)
167 return arch_no_register_req;
168 return info->in_reqs[pos];
172 * Get register constraint for a produced result (the @p pos result)
174 static inline const arch_register_req_t *arch_get_irn_register_req_out(
175 const ir_node *node, int pos)
177 const backend_info_t *info = be_get_info(node);
178 if (info->out_infos == NULL)
179 return arch_no_register_req;
180 return info->out_infos[pos].req;
183 static inline void arch_set_irn_register_req_out(ir_node *node, int pos,
184 const arch_register_req_t *req)
186 backend_info_t *info = be_get_info(node);
187 assert(pos < (int)ARR_LEN(info->out_infos));
188 info->out_infos[pos].req = req;
191 static inline void arch_set_irn_register_reqs_in(ir_node *node,
192 const arch_register_req_t **reqs)
194 backend_info_t *info = be_get_info(node);
195 info->in_reqs = reqs;
198 static inline const arch_register_req_t **arch_get_irn_register_reqs_in(
201 backend_info_t *info = be_get_info(node);
202 return info->in_reqs;
205 const arch_register_req_t *arch_get_irn_register_req(const ir_node *node);
208 * Get the flags of a node.
209 * @param irn The node.
212 arch_irn_flags_t arch_get_irn_flags(const ir_node *irn);
214 void arch_set_irn_flags(ir_node *node, arch_irn_flags_t flags);
215 void arch_add_irn_flags(ir_node *node, arch_irn_flags_t flags);
217 #define arch_irn_is(irn, flag) ((arch_get_irn_flags(irn) & arch_irn_flags_ ## flag) != 0)
219 static inline unsigned arch_get_irn_n_outs(const ir_node *node)
221 backend_info_t *info = be_get_info(node);
222 if (info->out_infos == NULL)
225 return (unsigned)ARR_LEN(info->out_infos);
230 * @param irn The node.
231 * @return A classification of the node.
233 arch_irn_class_t arch_irn_classify(const ir_node *irn);
236 * Initialize the architecture environment struct.
237 * @param isa The isa which shall be put into the environment.
238 * @param file_handle The file handle
239 * @return The environment.
241 extern arch_env_t *arch_env_init(const arch_isa_if_t *isa,
242 FILE *file_handle, be_main_env_t *main_env);
245 * Register an instruction set architecture
247 void be_register_isa_if(const char *name, const arch_isa_if_t *isa);
252 struct arch_register_t {
253 const char *name; /**< The name of the register. */
254 const arch_register_class_t *reg_class; /**< The class of the register */
255 unsigned short index; /**< The index of the register in
257 unsigned short global_index; /** The global index this register
258 in the architecture. */
259 arch_register_type_t type; /**< The type of the register. */
260 /** register constraint allowing just this register */
261 const arch_register_req_t *single_req;
264 static inline const arch_register_class_t *arch_register_get_class(
265 const arch_register_t *reg)
267 return reg->reg_class;
270 static inline unsigned arch_register_get_index(const arch_register_t *reg)
275 static inline const char *arch_register_get_name(const arch_register_t *reg)
281 * A class of registers.
282 * Like general purpose or floating point.
284 struct arch_register_class_t {
285 unsigned index; /**< index of this register class */
286 const char *name; /**< The name of the register class.*/
287 unsigned n_regs; /**< Number of registers in this
289 ir_mode *mode; /**< The mode of the register class.*/
290 const arch_register_t *regs; /**< The array of registers. */
291 arch_register_class_flags_t flags; /**< register class flags. */
292 const arch_register_req_t *class_req;
295 /** return the number of registers in this register class */
296 #define arch_register_class_n_regs(cls) ((cls)->n_regs)
298 /** return the largest mode of this register class */
299 #define arch_register_class_mode(cls) ((cls)->mode)
301 /** return the name of this register class */
302 #define arch_register_class_name(cls) ((cls)->name)
304 /** return the index of this register class */
305 #define arch_register_class_index(cls) ((cls)->index)
307 /** return the register class flags */
308 #define arch_register_class_flags(cls) ((cls)->flags)
310 static inline const arch_register_t *arch_register_for_index(
311 const arch_register_class_t *cls, unsigned idx)
313 assert(idx < cls->n_regs);
314 return &cls->regs[idx];
318 * Convenience macro to check for set constraints.
319 * @param req A pointer to register requirements.
320 * @param kind The kind of constraint to check for
321 * (see arch_register_req_type_t).
322 * @return 1, If the kind of constraint is present, 0 if not.
324 #define arch_register_req_is(req, kind) \
325 (((req)->type & (arch_register_req_type_ ## kind)) != 0)
328 * Expresses requirements to register allocation for an operand.
330 struct arch_register_req_t {
331 arch_register_req_type_t type; /**< The type of the constraint. */
332 const arch_register_class_t *cls; /**< The register class this constraint
334 const unsigned *limited; /**< allowed register bitset */
335 unsigned other_same; /**< Bitmask of ins which should use the
336 same register (should_be_same). */
337 unsigned other_different; /**< Bitmask of ins which shall use a
339 (must_be_different) */
340 unsigned char width; /**< specifies how many sequential
341 registers are required */
344 static inline bool reg_reqs_equal(const arch_register_req_t *req1,
345 const arch_register_req_t *req2)
350 if (req1->type != req2->type
351 || req1->cls != req2->cls
352 || req1->other_same != req2->other_same
353 || req1->other_different != req2->other_different)
356 if (req1->limited != NULL) {
359 if (req2->limited == NULL)
362 n_regs = arch_register_class_n_regs(req1->cls);
363 if (!rbitsets_equal(req1->limited, req2->limited, n_regs))
371 * An inverse operation returned by the backend
373 struct arch_inverse_t {
374 int n; /**< count of nodes returned in nodes array */
375 int costs; /**< costs of this remat */
377 /** nodes for this inverse operation. shall be in schedule order.
378 * last element is the target value */
382 struct arch_irn_ops_t {
386 * @param irn The node.
387 * @return A classification.
389 arch_irn_class_t (*classify)(const ir_node *irn);
392 * Get the entity on the stack frame this node depends on.
393 * @param irn The node in question.
394 * @return The entity on the stack frame or NULL, if the node does not have
395 * a stack frame entity.
397 ir_entity *(*get_frame_entity)(const ir_node *irn);
400 * Set the offset of a node carrying an entity on the stack frame.
401 * @param irn The node.
402 * @param offset The offset of the node's stack frame entity.
404 void (*set_frame_offset)(ir_node *irn, int offset);
407 * Returns the delta of the stackpointer for nodes that increment or
408 * decrement the stackpointer with a constant value. (push, pop
409 * nodes on most architectures).
410 * A positive value stands for an expanding stack area, a negative value for
413 * @param irn The node
414 * @return 0 if the stackpointer is not modified with a constant
415 * value, otherwise the increment/decrement value
417 int (*get_sp_bias)(const ir_node *irn);
420 * Returns an inverse operation which yields the i-th argument
421 * of the given node as result.
423 * @param irn The original operation
424 * @param i Index of the argument we want the inverse operation to
426 * @param inverse struct to be filled with the resulting inverse op
427 * @param obstack The obstack to use for allocation of the returned nodes
429 * @return The inverse operation or NULL if operation invertible
431 arch_inverse_t *(*get_inverse)(const ir_node *irn, int i,
432 arch_inverse_t *inverse,
433 struct obstack *obstack);
436 * Get the estimated cycle count for @p irn.
438 * @param irn The node.
439 * @return The estimated cycle count for this operation
441 int (*get_op_estimated_cost)(const ir_node *irn);
444 * Asks the backend whether operand @p i of @p irn can be loaded form memory
447 * @param irn The node.
448 * @param i Index of the argument we would like to know whether @p irn
449 * can load it form memory internally
450 * @return nonzero if argument can be loaded or zero otherwise
452 int (*possible_memory_operand)(const ir_node *irn, unsigned int i);
455 * Ask the backend to assimilate @p reload of operand @p i into @p irn.
457 * @param irn The node.
458 * @param spill The spill.
459 * @param i The position of the reload.
461 void (*perform_memory_operand)(ir_node *irn, ir_node *spill,
466 * Architecture interface.
468 struct arch_isa_if_t {
470 * Initialize the isa interface.
471 * @param file_handle the file handle to write the output to
472 * @return a new isa instance
474 arch_env_t *(*init)(FILE *file_handle);
477 * lowers current program for target. See the documentation for
478 * be_lower_for_target() for details.
480 void (*lower_for_target)(void);
483 * Free the isa instance.
485 void (*done)(void *self);
488 * Called directly after initialization. Backend should handle all
491 void (*handle_intrinsics)(void);
494 * Get the register class which shall be used to store a value of a given
496 * @param self The this pointer.
497 * @param mode The mode in question.
498 * @return A register class which can hold values of the given mode.
500 const arch_register_class_t *(*get_reg_class_for_mode)(const ir_mode *mode);
503 * Get the ABI restrictions for procedure calls.
504 * @param self The this pointer.
505 * @param call_type The call type of the method (procedure) in question.
506 * @param p The array of parameter locations to be filled.
508 void (*get_call_abi)(const void *self, ir_type *call_type,
512 * Get the necessary alignment for storing a register of given class.
513 * @param self The isa object.
514 * @param cls The register class.
515 * @return The alignment in bytes.
517 int (*get_reg_class_alignment)(const arch_register_class_t *cls);
520 * A "static" function, returns the frontend settings
521 * needed for this backend.
523 const backend_params *(*get_params)(void);
526 * Return an ordered list of irgs where code should be generated for.
527 * If NULL is returned, all irg will be taken into account and they will be
528 * generated in an arbitrary order.
529 * @param self The isa object.
530 * @param irgs A flexible array ARR_F of length 0 where the backend can
531 * append the desired irgs.
532 * @return A flexible array ARR_F containing all desired irgs in the
535 ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs);
538 * mark node as rematerialized
540 void (*mark_remat)(ir_node *node);
543 * parse an assembler constraint part and set flags according to its nature
544 * advances the *c pointer to point to the last parsed character (so if you
545 * parse a single character don't advance c)
547 asm_constraint_flags_t (*parse_asm_constraint)(const char **c);
550 * returns true if the string is a valid clobbered (register) in this
553 int (*is_valid_clobber)(const char *clobber);
556 * Initialize the code generator.
558 * @return A newly created code generator.
560 void (*init_graph)(ir_graph *irg);
563 * return node used as base in pic code addresses
565 ir_node* (*get_pic_base)(ir_graph *irg);
568 * Called before abi introduce.
570 void (*before_abi)(ir_graph *irg);
573 * Called, when the graph is being normalized.
575 void (*prepare_graph)(ir_graph *irg);
578 * Called before register allocation.
580 void (*before_ra)(ir_graph *irg);
583 * Called directly before done is called. This should be the last place
584 * where the irg is modified.
586 void (*finish)(ir_graph *irg);
589 * Called after everything happened. This call should emit the final
590 * assembly code but avoid changing the irg.
591 * The code generator must also be de-allocated here.
593 void (*emit)(ir_graph *irg);
596 * Checks if the given register is callee/caller saved.
597 * @deprecated, only necessary if backend still uses beabi functions
599 int (*register_saved_by)(const arch_register_t *reg, int callee);
602 #define arch_env_done(env) ((env)->impl->done(env))
603 #define arch_env_handle_intrinsics(env) \
604 do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
605 #define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((mode)))
606 #define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((env), (tp), (abi)))
607 #define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((cls)))
608 #define arch_env_get_params(env) ((env)->impl->get_params())
609 #define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((irn)))
610 #define arch_env_get_machine(env) ((env)->impl->get_machine(env))
611 #define arch_env_get_backend_irg_list(env,irgs) ((env)->impl->get_backend_irg_list((env), (irgs)))
612 #define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((c))
613 #define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((clobber))
614 #define arch_env_mark_remat(env,node) \
615 do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0)
621 const arch_isa_if_t *impl;
622 unsigned n_registers; /**< number of registers */
623 const arch_register_t *registers; /**< register array */
624 unsigned n_register_classes; /**< number of register classes*/
625 const arch_register_class_t *register_classes; /**< register classes */
626 const arch_register_t *sp; /**< The stack pointer register. */
627 const arch_register_t *bp; /**< The base pointer register. */
628 const arch_register_class_t *link_class; /**< The static link pointer
630 int stack_alignment; /**< power of 2 stack alignment */
631 const be_main_env_t *main_env; /**< the be main environment */
632 int spill_cost; /**< cost for a be_Spill node */
633 int reload_cost; /**< cost for a be_Reload node */
634 bool custom_abi : 1; /**< backend does all abi handling
635 and does not need the generic
636 stuff from beabi.h/.c */
639 static inline bool arch_irn_is_ignore(const ir_node *irn)
641 const arch_register_req_t *req = arch_get_irn_register_req(irn);
642 return req->type & arch_register_req_type_ignore;
645 static inline bool arch_irn_consider_in_reg_alloc(
646 const arch_register_class_t *cls, const ir_node *node)
648 const arch_register_req_t *req = arch_get_irn_register_req(node);
651 !(req->type & arch_register_req_type_ignore);
655 * Iterate over all values defined by an instruction.
656 * Only looks at values in a certain register class where the requirements
657 * are not marked as ignore.
658 * Executes @p code for each definition.
660 #define be_foreach_definition_(node, cls, value, code) \
662 if (get_irn_mode(node) == mode_T) { \
663 const ir_edge_t *edge_; \
664 foreach_out_edge(node, edge_) { \
665 const arch_register_req_t *req_; \
666 value = get_edge_src_irn(edge_); \
667 req_ = arch_get_irn_register_req(value); \
668 if (req_->cls != cls) \
673 const arch_register_req_t *req_ = arch_get_irn_register_req(node); \
675 if (req_->cls == cls) { \
681 #define be_foreach_definition(node, cls, value, code) \
682 be_foreach_definition_(node, cls, value, \
683 if (req_->type & arch_register_req_type_ignore) \
688 static inline const arch_register_class_t *arch_get_irn_reg_class(
691 const arch_register_req_t *req = arch_get_irn_register_req(node);
695 bool arch_reg_is_allocatable(const arch_register_req_t *req,
696 const arch_register_t *reg);