2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Processor architecture specification.
23 * @author Sebastian Hack
26 #ifndef FIRM_BE_BEARCH_H
27 #define FIRM_BE_BEARCH_H
31 #include "firm_types.h"
34 #include "raw_bitset.h"
43 typedef enum arch_register_class_flags_t {
44 arch_register_class_flag_none = 0,
45 /** don't do automatic register allocation for this class */
46 arch_register_class_flag_manual_ra = 1U << 0,
47 /** the register models an abstract state (example: fpu rounding mode) */
48 arch_register_class_flag_state = 1U << 1
49 } arch_register_class_flags_t;
51 typedef enum arch_register_type_t {
52 arch_register_type_none = 0,
53 /** The register must be saved by the caller upon a function call. It thus
54 * can be overwritten in the called function. */
55 arch_register_type_caller_save = 1U << 0,
56 /** The register must be saved by the caller upon a function call. It thus
57 * can be overwritten in the called function. */
58 arch_register_type_callee_save = 1U << 1,
59 /** Do not consider this register when allocating. */
60 arch_register_type_ignore = 1U << 2,
61 /** The emitter can choose an arbitrary register. The register fulfills any
62 * register constraints as long as the register class matches */
63 arch_register_type_joker = 1U << 3,
64 /** This is just a virtual register. Virtual registers fulfill any register
65 * constraints as long as the register class matches. It is a allowed to
66 * have multiple definitions for the same virtual register at a point */
67 arch_register_type_virtual = 1U << 4,
68 /** The register represents a state that should be handled by bestate
70 arch_register_type_state = 1U << 5,
71 } arch_register_type_t;
74 * Different types of register allocation requirements.
76 typedef enum arch_register_req_type_t {
77 /** No register requirement. */
78 arch_register_req_type_none = 0,
79 /** All registers in the class are allowed. */
80 arch_register_req_type_normal = 1U << 0,
81 /** Only a real subset of the class is allowed. */
82 arch_register_req_type_limited = 1U << 1,
83 /** The register should be equal to another one at the node. */
84 arch_register_req_type_should_be_same = 1U << 2,
85 /** The register must be unequal from some other at the node. */
86 arch_register_req_type_must_be_different = 1U << 3,
87 /** The registernumber should be aligned (in case of multiregister values)*/
88 arch_register_req_type_aligned = 1U << 4,
89 /** ignore while allocating registers */
90 arch_register_req_type_ignore = 1U << 5,
91 /** the output produces a new value for the stack pointer
92 * (this is not really a constraint but a marker to guide the stackpointer
94 arch_register_req_type_produces_sp = 1U << 6,
95 } arch_register_req_type_t;
97 extern const arch_register_req_t *arch_no_register_req;
100 * Print information about a register requirement in human readable form
101 * @param F output stream/file
102 * @param req The requirements structure to format.
104 void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
105 const ir_node *node);
107 void arch_dump_register_reqs(FILE *F, const ir_node *node);
108 void arch_dump_reqs_and_registers(FILE *F, const ir_node *node);
111 * Node classification. Used for statistics and for detecting reload nodes.
113 typedef enum arch_irn_class_t {
114 arch_irn_class_spill = 1 << 0,
115 arch_irn_class_reload = 1 << 1,
116 arch_irn_class_remat = 1 << 2,
117 arch_irn_class_copy = 1 << 3,
118 arch_irn_class_perm = 1 << 4
121 void arch_set_frame_offset(ir_node *irn, int bias);
123 ir_entity *arch_get_frame_entity(const ir_node *irn);
124 int arch_get_sp_bias(ir_node *irn);
126 int arch_get_op_estimated_cost(const ir_node *irn);
127 arch_inverse_t *arch_get_inverse(const ir_node *irn, int i,
128 arch_inverse_t *inverse,
129 struct obstack *obstack);
130 int arch_possible_memory_operand(const ir_node *irn,
132 void arch_perform_memory_operand(ir_node *irn, ir_node *spill,
136 * Get the register requirements for a node.
137 * @note Deprecated API! Preferably use
138 * arch_get_in_register_req and
139 * arch_get_out_register_req.
141 * @param irn The node.
142 * @param pos The position of the operand you're interested in.
143 * @return A pointer to the register requirements. If NULL is returned, the
144 * operand was no register operand.
146 const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos);
149 * Check, if a register is assignable to an operand of a node.
150 * @param irn The node.
151 * @param pos The position of the operand.
152 * @param reg The register.
153 * @return 1, if the register might be allocated to the operand 0 if not.
155 int arch_reg_is_allocatable(const ir_node *irn, int pos,
156 const arch_register_t *reg);
158 #define arch_reg_out_is_allocatable(irn, reg) arch_reg_is_allocatable(irn, -1, reg)
161 * Get the register class of an operand of a node.
162 * @param irn The node.
163 * @param pos The position of the operand, -1 for the output.
164 * @return The register class of the operand or NULL, if
165 * operand is a non-register operand.
167 const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn,
170 #define arch_get_irn_reg_class_out(irn) arch_get_irn_reg_class(irn, -1)
173 * Get the register allocated at a certain output operand of a node.
174 * @param irn The node.
175 * @return The register allocated for this operand
177 const arch_register_t *arch_get_irn_register(const ir_node *irn);
178 const arch_register_t *arch_irn_get_register(const ir_node *irn, int pos);
181 * Set the register for a certain output operand.
182 * @param irn The node.
183 * @param reg The register.
185 void arch_set_irn_register(ir_node *irn, const arch_register_t *reg);
186 void arch_irn_set_register(ir_node *irn, int pos, const arch_register_t *reg);
190 * @param irn The node.
191 * @return A classification of the node.
193 arch_irn_class_t arch_irn_classify(const ir_node *irn);
196 * Get the flags of a node.
197 * @param irn The node.
200 arch_irn_flags_t arch_irn_get_flags(const ir_node *irn);
202 void arch_irn_set_flags(ir_node *node, arch_irn_flags_t flags);
203 void arch_irn_add_flags(ir_node *node, arch_irn_flags_t flags);
205 #define arch_irn_is(irn, flag) ((arch_irn_get_flags(irn) & arch_irn_flags_ ## flag) != 0)
208 * Get the operations of an irn.
209 * @param self The handler from which the method is invoked.
210 * @param irn Some node.
211 * @return Operations for that irn.
213 typedef const void *(arch_get_irn_ops_t)(const ir_node *irn);
216 * Initialize the architecture environment struct.
217 * @param isa The isa which shall be put into the environment.
218 * @param file_handle The file handle
219 * @return The environment.
221 extern arch_env_t *arch_env_init(const arch_isa_if_t *isa,
222 FILE *file_handle, be_main_env_t *main_env);
225 * Register an instruction set architecture
227 void be_register_isa_if(const char *name, const arch_isa_if_t *isa);
232 struct arch_register_t {
233 const char *name; /**< The name of the register. */
234 const arch_register_class_t *reg_class; /**< The class of the register */
235 unsigned short index; /**< The index of the register in
237 unsigned short global_index;
238 arch_register_type_t type; /**< The type of the register. */
239 /** register constraint allowing just this register */
240 const arch_register_req_t *single_req;
243 static inline const arch_register_class_t *arch_register_get_class(
244 const arch_register_t *reg)
246 return reg->reg_class;
249 static inline unsigned arch_register_get_index(const arch_register_t *reg)
254 static inline const char *arch_register_get_name(const arch_register_t *reg)
260 * Convenience macro to check for register type.
261 * @param req A pointer to register.
262 * @param kind The kind of type to check for (see arch_register_type_t).
263 * @return 1, If register is of given kind, 0 if not.
265 #define arch_register_type_is(reg, kind) \
266 (((reg)->type & arch_register_type_ ## kind) != 0)
269 * A class of registers.
270 * Like general purpose or floating point.
272 struct arch_register_class_t {
273 unsigned index; /**< index of this register class */
274 const char *name; /**< The name of the register class.*/
275 unsigned n_regs; /**< Number of registers in this
277 ir_mode *mode; /**< The mode of the register class.*/
278 const arch_register_t *regs; /**< The array of registers. */
279 arch_register_class_flags_t flags; /**< register class flags. */
280 const arch_register_req_t *class_req;
283 /** return the number of registers in this register class */
284 #define arch_register_class_n_regs(cls) ((cls)->n_regs)
286 /** return the largest mode of this register class */
287 #define arch_register_class_mode(cls) ((cls)->mode)
289 /** return the name of this register class */
290 #define arch_register_class_name(cls) ((cls)->name)
292 /** return the index of this register class */
293 #define arch_register_class_index(cls) ((cls)->index)
295 /** return the register class flags */
296 #define arch_register_class_flags(cls) ((cls)->flags)
298 static inline const arch_register_t *arch_register_for_index(
299 const arch_register_class_t *cls, unsigned idx)
301 assert(idx < cls->n_regs);
302 return &cls->regs[idx];
306 * Convenience macro to check for set constraints.
307 * @param req A pointer to register requirements.
308 * @param kind The kind of constraint to check for
309 * (see arch_register_req_type_t).
310 * @return 1, If the kind of constraint is present, 0 if not.
312 #define arch_register_req_is(req, kind) \
313 (((req)->type & (arch_register_req_type_ ## kind)) != 0)
316 * Expresses requirements to register allocation for an operand.
318 struct arch_register_req_t {
319 arch_register_req_type_t type; /**< The type of the constraint. */
320 const arch_register_class_t *cls; /**< The register class this constraint
322 const unsigned *limited; /**< allowed register bitset */
323 unsigned other_same; /**< Bitmask of ins which should use the
324 same register (should_be_same). */
325 unsigned other_different; /**< Bitmask of ins which shall use a
327 (must_be_different) */
328 unsigned char width; /**< specifies how many sequential
329 registers are required */
332 static inline int reg_reqs_equal(const arch_register_req_t *req1,
333 const arch_register_req_t *req2)
338 if (req1->type != req2->type
339 || req1->cls != req2->cls
340 || req1->other_same != req2->other_same
341 || req1->other_different != req2->other_different)
344 if (req1->limited != NULL) {
347 if (req2->limited == NULL)
350 n_regs = arch_register_class_n_regs(req1->cls);
351 if (!rbitsets_equal(req1->limited, req2->limited, n_regs))
359 * An inverse operation returned by the backend
361 struct arch_inverse_t {
362 int n; /**< count of nodes returned in nodes array */
363 int costs; /**< costs of this remat */
365 /** nodes for this inverse operation. shall be in schedule order.
366 * last element is the target value */
370 struct arch_irn_ops_t {
374 * @param irn The node.
375 * @return A classification.
377 arch_irn_class_t (*classify)(const ir_node *irn);
380 * Get the entity on the stack frame this node depends on.
381 * @param irn The node in question.
382 * @return The entity on the stack frame or NULL, if the node does not have
383 * a stack frame entity.
385 ir_entity *(*get_frame_entity)(const ir_node *irn);
388 * Set the offset of a node carrying an entity on the stack frame.
389 * @param irn The node.
390 * @param offset The offset of the node's stack frame entity.
392 void (*set_frame_offset)(ir_node *irn, int offset);
395 * Returns the delta of the stackpointer for nodes that increment or
396 * decrement the stackpointer with a constant value. (push, pop
397 * nodes on most architectures).
398 * A positive value stands for an expanding stack area, a negative value for
401 * @param irn The node
402 * @return 0 if the stackpointer is not modified with a constant
403 * value, otherwise the increment/decrement value
405 int (*get_sp_bias)(const ir_node *irn);
408 * Returns an inverse operation which yields the i-th argument
409 * of the given node as result.
411 * @param irn The original operation
412 * @param i Index of the argument we want the inverse operation to
414 * @param inverse struct to be filled with the resulting inverse op
415 * @param obstack The obstack to use for allocation of the returned nodes
417 * @return The inverse operation or NULL if operation invertible
419 arch_inverse_t *(*get_inverse)(const ir_node *irn, int i,
420 arch_inverse_t *inverse,
421 struct obstack *obstack);
424 * Get the estimated cycle count for @p irn.
426 * @param irn The node.
427 * @return The estimated cycle count for this operation
429 int (*get_op_estimated_cost)(const ir_node *irn);
432 * Asks the backend whether operand @p i of @p irn can be loaded form memory
435 * @param irn The node.
436 * @param i Index of the argument we would like to know whether @p irn
437 * can load it form memory internally
438 * @return nonzero if argument can be loaded or zero otherwise
440 int (*possible_memory_operand)(const ir_node *irn, unsigned int i);
443 * Ask the backend to assimilate @p reload of operand @p i into @p irn.
445 * @param irn The node.
446 * @param spill The spill.
447 * @param i The position of the reload.
449 void (*perform_memory_operand)(ir_node *irn, ir_node *spill,
454 * Architecture interface.
456 struct arch_isa_if_t {
458 * Initialize the isa interface.
459 * @param file_handle the file handle to write the output to
460 * @return a new isa instance
462 arch_env_t *(*init)(FILE *file_handle);
465 * Free the isa instance.
467 void (*done)(void *self);
470 * Called directly after initialization. Backend should handle all
473 void (*handle_intrinsics)(void);
476 * Get the register class which shall be used to store a value of a given
478 * @param self The this pointer.
479 * @param mode The mode in question.
480 * @return A register class which can hold values of the given mode.
482 const arch_register_class_t *(*get_reg_class_for_mode)(const ir_mode *mode);
485 * Get the ABI restrictions for procedure calls.
486 * @param self The this pointer.
487 * @param call_type The call type of the method (procedure) in question.
488 * @param p The array of parameter locations to be filled.
490 void (*get_call_abi)(const void *self, ir_type *call_type,
494 * Get the necessary alignment for storing a register of given class.
495 * @param self The isa object.
496 * @param cls The register class.
497 * @return The alignment in bytes.
499 int (*get_reg_class_alignment)(const arch_register_class_t *cls);
502 * A "static" function, returns the frontend settings
503 * needed for this backend.
505 const backend_params *(*get_params)(void);
508 * Return an ordered list of irgs where code should be generated for.
509 * If NULL is returned, all irg will be taken into account and they will be
510 * generated in an arbitrary order.
511 * @param self The isa object.
512 * @param irgs A flexible array ARR_F of length 0 where the backend can
513 * append the desired irgs.
514 * @return A flexible array ARR_F containing all desired irgs in the
517 ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs);
520 * mark node as rematerialized
522 void (*mark_remat)(ir_node *node);
525 * parse an assembler constraint part and set flags according to its nature
526 * advances the *c pointer to point to the last parsed character (so if you
527 * parse a single character don't advance c)
529 asm_constraint_flags_t (*parse_asm_constraint)(const char **c);
532 * returns true if the string is a valid clobbered (register) in this
535 int (*is_valid_clobber)(const char *clobber);
538 * Initialize the code generator.
540 * @return A newly created code generator.
542 void (*init_graph)(ir_graph *irg);
545 * return node used as base in pic code addresses
547 ir_node* (*get_pic_base)(ir_graph *irg);
550 * Called before abi introduce.
552 void (*before_abi)(ir_graph *irg);
555 * Called, when the graph is being normalized.
557 void (*prepare_graph)(ir_graph *irg);
560 * Called before register allocation.
562 void (*before_ra)(ir_graph *irg);
565 * Called after register allocation.
567 void (*after_ra)(ir_graph *irg);
570 * Called directly before done is called. This should be the last place
571 * where the irg is modified.
573 void (*finish)(ir_graph *irg);
576 * Called after everything happened. This call should emit the final
577 * assembly code but avoid changing the irg.
578 * The code generator must also be de-allocated here.
580 void (*emit)(ir_graph *irg);
583 #define arch_env_done(env) ((env)->impl->done(env))
584 #define arch_env_handle_intrinsics(env) \
585 do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
586 #define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((mode)))
587 #define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((env), (tp), (abi)))
588 #define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((cls)))
589 #define arch_env_get_params(env) ((env)->impl->get_params())
590 #define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((irn)))
591 #define arch_env_get_machine(env) ((env)->impl->get_machine(env))
592 #define arch_env_get_backend_irg_list(env,irgs) ((env)->impl->get_backend_irg_list((env), (irgs)))
593 #define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((c))
594 #define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((clobber))
595 #define arch_env_mark_remat(env,node) \
596 do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0)
602 const arch_isa_if_t *impl;
603 unsigned n_registers; /**< number of registers */
604 const arch_register_t *registers; /**< register array */
605 unsigned n_register_classes; /**< number of register classes*/
606 const arch_register_class_t *register_classes; /**< register classes */
607 const arch_register_t *sp; /**< The stack pointer register. */
608 const arch_register_t *bp; /**< The base pointer register. */
609 const arch_register_class_t *link_class; /**< The static link pointer
611 int stack_dir; /**< -1 for decreasing, 1 for
613 int stack_alignment; /**< power of 2 stack alignment */
614 const be_main_env_t *main_env; /**< the be main environment */
615 int spill_cost; /**< cost for a be_Spill node */
616 int reload_cost; /**< cost for a be_Reload node */
617 bool custom_abi : 1; /**< backend does all abi handling
618 and does not need the generic
619 stuff from beabi.h/.c */
622 static inline unsigned arch_irn_get_n_outs(const ir_node *node)
624 backend_info_t *info = be_get_info(node);
625 if (info->out_infos == NULL)
628 return ARR_LEN(info->out_infos);
631 static inline const arch_irn_ops_t *get_irn_ops_simple(const ir_node *node)
633 const ir_op *ops = get_irn_op(node);
634 const arch_irn_ops_t *be_ops = get_op_ops(ops)->be_ops;
635 assert(!is_Proj(node));
639 static inline const arch_register_req_t *arch_get_register_req_out(
643 backend_info_t *info;
645 /* you have to query the Proj nodes for the constraints (or use
646 * arch_get_out_register_req. Querying a mode_T node and expecting
647 * arch_no_register_req is a bug in your code! */
648 assert(get_irn_mode(irn) != mode_T);
651 pos = get_Proj_proj(irn);
652 irn = get_Proj_pred(irn);
655 info = be_get_info(irn);
656 if (info->out_infos == NULL)
657 return arch_no_register_req;
659 return info->out_infos[pos].req;
662 static inline bool arch_irn_is_ignore(const ir_node *irn)
664 const arch_register_req_t *req = arch_get_register_req_out(irn);
665 return !!(req->type & arch_register_req_type_ignore);
668 static inline bool arch_irn_consider_in_reg_alloc(
669 const arch_register_class_t *cls, const ir_node *node)
671 const arch_register_req_t *req = arch_get_register_req_out(node);
674 !(req->type & arch_register_req_type_ignore);
678 * Get register constraints for an operand at position @p
680 static inline const arch_register_req_t *arch_get_in_register_req(
681 const ir_node *node, int pos)
683 const backend_info_t *info = be_get_info(node);
684 if (info->in_reqs == NULL)
685 return arch_no_register_req;
686 return info->in_reqs[pos];
690 * Get register constraint for a produced result (the @p pos result)
692 static inline const arch_register_req_t *arch_get_out_register_req(
693 const ir_node *node, int pos)
695 const backend_info_t *info = be_get_info(node);
696 if (info->out_infos == NULL)
697 return arch_no_register_req;
698 return info->out_infos[pos].req;
701 static inline void arch_set_out_register_req(ir_node *node, int pos,
702 const arch_register_req_t *req)
704 backend_info_t *info = be_get_info(node);
705 assert(pos < (int) arch_irn_get_n_outs(node));
706 info->out_infos[pos].req = req;
709 static inline void arch_set_in_register_reqs(ir_node *node,
710 const arch_register_req_t **in_reqs)
712 backend_info_t *info = be_get_info(node);
713 info->in_reqs = in_reqs;
716 static inline const arch_register_req_t **arch_get_in_register_reqs(
719 backend_info_t *info = be_get_info(node);
720 return info->in_reqs;
724 * Iterate over all values defined by an instruction.
725 * Only looks at values in a certain register class where the requirements
726 * are not marked as ignore.
727 * Executes @p code for each definition.
729 #define be_foreach_definition_(node, cls, value, code) \
731 if (get_irn_mode(node) == mode_T) { \
732 const ir_edge_t *edge_; \
733 foreach_out_edge(node, edge_) { \
734 const arch_register_req_t *req_; \
735 value = get_edge_src_irn(edge_); \
736 req_ = arch_get_register_req_out(value); \
737 if (req_->cls != cls) \
742 const arch_register_req_t *req_ = arch_get_register_req_out(node); \
744 if (req_->cls == cls) { \
750 #define be_foreach_definition(node, cls, value, code) \
751 be_foreach_definition_(node, cls, value, \
752 if (req_->type & arch_register_req_type_ignore) \