2 * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Processor architecture specification.
23 * @author Sebastian Hack
25 #ifndef FIRM_BE_BEARCH_H
26 #define FIRM_BE_BEARCH_H
30 #include "firm_types.h"
33 #include "raw_bitset.h"
43 * this constant is returned by the get_sp_bias functions if the stack
44 * is reset (usually because the frame pointer is copied to the stack
47 #define SP_BIAS_RESET INT_MIN
49 typedef enum arch_register_class_flags_t {
50 arch_register_class_flag_none = 0,
51 /** don't do automatic register allocation for this class */
52 arch_register_class_flag_manual_ra = 1U << 0,
53 /** the register models an abstract state (example: fpu rounding mode) */
54 arch_register_class_flag_state = 1U << 1
55 } arch_register_class_flags_t;
56 ENUM_BITSET(arch_register_class_flags_t)
58 typedef enum arch_register_type_t {
59 arch_register_type_none = 0,
60 /** Do not consider this register when allocating. */
61 arch_register_type_ignore = 1U << 0,
62 /** The emitter can choose an arbitrary register. The register fulfills any
63 * register constraints as long as the register class matches */
64 arch_register_type_joker = 1U << 1,
65 /** This is just a virtual register. Virtual registers fulfill any register
66 * constraints as long as the register class matches. It is a allowed to
67 * have multiple definitions for the same virtual register at a point */
68 arch_register_type_virtual = 1U << 2,
69 /** The register represents a state that should be handled by bestate
71 arch_register_type_state = 1U << 3,
72 } arch_register_type_t;
73 ENUM_BITSET(arch_register_type_t)
76 * Different types of register allocation requirements.
78 typedef enum arch_register_req_type_t {
79 /** No register requirement. */
80 arch_register_req_type_none = 0,
81 /** All registers in the class are allowed. */
82 arch_register_req_type_normal = 1U << 0,
83 /** Only a real subset of the class is allowed. */
84 arch_register_req_type_limited = 1U << 1,
85 /** The register should be equal to another one at the node. */
86 arch_register_req_type_should_be_same = 1U << 2,
87 /** The register must be unequal from some other at the node. */
88 arch_register_req_type_must_be_different = 1U << 3,
89 /** The registernumber should be aligned (in case of multiregister values)*/
90 arch_register_req_type_aligned = 1U << 4,
91 /** ignore while allocating registers */
92 arch_register_req_type_ignore = 1U << 5,
93 /** the output produces a new value for the stack pointer
94 * (this is not really a constraint but a marker to guide the stackpointer
96 arch_register_req_type_produces_sp = 1U << 6,
97 } arch_register_req_type_t;
98 ENUM_BITSET(arch_register_req_type_t)
100 extern const arch_register_req_t *arch_no_register_req;
103 * Print information about a register requirement in human readable form
104 * @param F output stream/file
105 * @param req The requirements structure to format.
107 void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
108 const ir_node *node);
110 void arch_dump_register_reqs(FILE *F, const ir_node *node);
111 void arch_dump_reqs_and_registers(FILE *F, const ir_node *node);
114 * Node classification. Used for statistics and for detecting reload nodes.
116 typedef enum arch_irn_class_t {
117 arch_irn_class_none = 0,
118 arch_irn_class_spill = 1 << 0,
119 arch_irn_class_reload = 1 << 1,
120 arch_irn_class_remat = 1 << 2,
121 arch_irn_class_copy = 1 << 3,
122 arch_irn_class_perm = 1 << 4
124 ENUM_BITSET(arch_irn_class_t)
126 void arch_set_frame_offset(ir_node *irn, int bias);
128 ir_entity *arch_get_frame_entity(const ir_node *irn);
129 int arch_get_sp_bias(ir_node *irn);
131 int arch_get_op_estimated_cost(const ir_node *irn);
132 arch_inverse_t *arch_get_inverse(const ir_node *irn, int i,
133 arch_inverse_t *inverse,
134 struct obstack *obstack);
135 int arch_possible_memory_operand(const ir_node *irn,
137 void arch_perform_memory_operand(ir_node *irn, ir_node *spill,
141 * Get the register allocated for a value.
143 const arch_register_t *arch_get_irn_register(const ir_node *irn);
146 * Assign register to a value
148 void arch_set_irn_register(ir_node *irn, const arch_register_t *reg);
151 * Set the register for a certain output operand.
153 void arch_set_irn_register_out(ir_node *irn, int pos, const arch_register_t *r);
155 const arch_register_t *arch_get_irn_register_out(const ir_node *irn, int pos);
156 const arch_register_t *arch_get_irn_register_in(const ir_node *irn, int pos);
159 * Get register constraints for an operand at position @p
161 static inline const arch_register_req_t *arch_get_irn_register_req_in(
162 const ir_node *node, int pos)
164 const backend_info_t *info = be_get_info(node);
165 if (info->in_reqs == NULL)
166 return arch_no_register_req;
167 return info->in_reqs[pos];
171 * Get register constraint for a produced result (the @p pos result)
173 static inline const arch_register_req_t *arch_get_irn_register_req_out(
174 const ir_node *node, int pos)
176 const backend_info_t *info = be_get_info(node);
177 if (info->out_infos == NULL)
178 return arch_no_register_req;
179 return info->out_infos[pos].req;
182 static inline void arch_set_irn_register_req_out(ir_node *node, int pos,
183 const arch_register_req_t *req)
185 backend_info_t *info = be_get_info(node);
186 assert(pos < (int)ARR_LEN(info->out_infos));
187 info->out_infos[pos].req = req;
190 static inline void arch_set_irn_register_reqs_in(ir_node *node,
191 const arch_register_req_t **reqs)
193 backend_info_t *info = be_get_info(node);
194 info->in_reqs = reqs;
197 static inline const arch_register_req_t **arch_get_irn_register_reqs_in(
200 backend_info_t *info = be_get_info(node);
201 return info->in_reqs;
204 const arch_register_req_t *arch_get_irn_register_req(const ir_node *node);
207 * Get the flags of a node.
208 * @param irn The node.
211 arch_irn_flags_t arch_get_irn_flags(const ir_node *irn);
213 void arch_set_irn_flags(ir_node *node, arch_irn_flags_t flags);
214 void arch_add_irn_flags(ir_node *node, arch_irn_flags_t flags);
216 #define arch_irn_is(irn, flag) ((arch_get_irn_flags(irn) & arch_irn_flags_ ## flag) != 0)
218 static inline unsigned arch_get_irn_n_outs(const ir_node *node)
220 backend_info_t *info = be_get_info(node);
221 if (info->out_infos == NULL)
224 return (unsigned)ARR_LEN(info->out_infos);
229 * @param irn The node.
230 * @return A classification of the node.
232 arch_irn_class_t arch_irn_classify(const ir_node *irn);
235 * Initialize the architecture environment struct.
236 * @param isa The isa which shall be put into the environment.
237 * @param file_handle The file handle
238 * @return The environment.
240 extern arch_env_t *arch_env_init(const arch_isa_if_t *isa,
241 be_main_env_t *main_env);
244 * Register an instruction set architecture
246 void be_register_isa_if(const char *name, const arch_isa_if_t *isa);
251 struct arch_register_t {
252 const char *name; /**< The name of the register. */
253 const arch_register_class_t *reg_class; /**< The class of the register */
254 unsigned short index; /**< The index of the register in
256 unsigned short global_index; /** The global index this register
257 in the architecture. */
258 arch_register_type_t type; /**< The type of the register. */
259 /** register constraint allowing just this register */
260 const arch_register_req_t *single_req;
263 static inline const arch_register_class_t *arch_register_get_class(
264 const arch_register_t *reg)
266 return reg->reg_class;
269 static inline unsigned arch_register_get_index(const arch_register_t *reg)
274 static inline const char *arch_register_get_name(const arch_register_t *reg)
280 * A class of registers.
281 * Like general purpose or floating point.
283 struct arch_register_class_t {
284 unsigned index; /**< index of this register class */
285 const char *name; /**< The name of the register class.*/
286 unsigned n_regs; /**< Number of registers in this
288 ir_mode *mode; /**< The mode of the register class.*/
289 const arch_register_t *regs; /**< The array of registers. */
290 arch_register_class_flags_t flags; /**< register class flags. */
291 const arch_register_req_t *class_req;
294 /** return the number of registers in this register class */
295 #define arch_register_class_n_regs(cls) ((cls)->n_regs)
297 /** return the largest mode of this register class */
298 #define arch_register_class_mode(cls) ((cls)->mode)
300 /** return the name of this register class */
301 #define arch_register_class_name(cls) ((cls)->name)
303 /** return the index of this register class */
304 #define arch_register_class_index(cls) ((cls)->index)
306 /** return the register class flags */
307 #define arch_register_class_flags(cls) ((cls)->flags)
309 static inline const arch_register_t *arch_register_for_index(
310 const arch_register_class_t *cls, unsigned idx)
312 assert(idx < cls->n_regs);
313 return &cls->regs[idx];
317 * Convenience macro to check for set constraints.
318 * @param req A pointer to register requirements.
319 * @param kind The kind of constraint to check for
320 * (see arch_register_req_type_t).
321 * @return 1, If the kind of constraint is present, 0 if not.
323 #define arch_register_req_is(req, kind) \
324 (((req)->type & (arch_register_req_type_ ## kind)) != 0)
327 * Expresses requirements to register allocation for an operand.
329 struct arch_register_req_t {
330 arch_register_req_type_t type; /**< The type of the constraint. */
331 const arch_register_class_t *cls; /**< The register class this constraint
333 const unsigned *limited; /**< allowed register bitset */
334 unsigned other_same; /**< Bitmask of ins which should use the
335 same register (should_be_same). */
336 unsigned other_different; /**< Bitmask of ins which shall use a
338 (must_be_different) */
339 unsigned char width; /**< specifies how many sequential
340 registers are required */
343 static inline bool reg_reqs_equal(const arch_register_req_t *req1,
344 const arch_register_req_t *req2)
349 if (req1->type != req2->type ||
350 req1->cls != req2->cls ||
351 req1->other_same != req2->other_same ||
352 req1->other_different != req2->other_different ||
353 (req1->limited != NULL) != (req2->limited != NULL))
356 if (req1->limited != NULL) {
357 size_t const n_regs = arch_register_class_n_regs(req1->cls);
358 if (!rbitsets_equal(req1->limited, req2->limited, n_regs))
366 * An inverse operation returned by the backend
368 struct arch_inverse_t {
369 int n; /**< count of nodes returned in nodes array */
370 int costs; /**< costs of this remat */
372 /** nodes for this inverse operation. shall be in schedule order.
373 * last element is the target value */
377 struct arch_irn_ops_t {
381 * @param irn The node.
382 * @return A classification.
384 arch_irn_class_t (*classify)(const ir_node *irn);
387 * Get the entity on the stack frame this node depends on.
388 * @param irn The node in question.
389 * @return The entity on the stack frame or NULL, if the node does not have
390 * a stack frame entity.
392 ir_entity *(*get_frame_entity)(const ir_node *irn);
395 * Set the offset of a node carrying an entity on the stack frame.
396 * @param irn The node.
397 * @param offset The offset of the node's stack frame entity.
399 void (*set_frame_offset)(ir_node *irn, int offset);
402 * Returns the delta of the stackpointer for nodes that increment or
403 * decrement the stackpointer with a constant value. (push, pop
404 * nodes on most architectures).
405 * A positive value stands for an expanding stack area, a negative value for
408 * @param irn The node
409 * @return 0 if the stackpointer is not modified with a constant
410 * value, otherwise the increment/decrement value
412 int (*get_sp_bias)(const ir_node *irn);
415 * Returns an inverse operation which yields the i-th argument
416 * of the given node as result.
418 * @param irn The original operation
419 * @param i Index of the argument we want the inverse operation to
421 * @param inverse struct to be filled with the resulting inverse op
422 * @param obstack The obstack to use for allocation of the returned nodes
424 * @return The inverse operation or NULL if operation invertible
426 arch_inverse_t *(*get_inverse)(const ir_node *irn, int i,
427 arch_inverse_t *inverse,
428 struct obstack *obstack);
431 * Get the estimated cycle count for @p irn.
433 * @param irn The node.
434 * @return The estimated cycle count for this operation
436 int (*get_op_estimated_cost)(const ir_node *irn);
439 * Asks the backend whether operand @p i of @p irn can be loaded form memory
442 * @param irn The node.
443 * @param i Index of the argument we would like to know whether @p irn
444 * can load it form memory internally
445 * @return nonzero if argument can be loaded or zero otherwise
447 int (*possible_memory_operand)(const ir_node *irn, unsigned int i);
450 * Ask the backend to assimilate @p reload of operand @p i into @p irn.
452 * @param irn The node.
453 * @param spill The spill.
454 * @param i The position of the reload.
456 void (*perform_memory_operand)(ir_node *irn, ir_node *spill,
461 * Architecture interface.
463 struct arch_isa_if_t {
465 * Initialize the isa interface.
466 * @param file_handle the file handle to write the output to
467 * @return a new isa instance
469 arch_env_t *(*init)(const be_main_env_t *env);
472 * lowers current program for target. See the documentation for
473 * be_lower_for_target() for details.
475 void (*lower_for_target)(void);
478 * Free the isa instance.
480 void (*done)(void *self);
483 * Called directly after initialization. Backend should handle all
486 void (*handle_intrinsics)(void);
489 * Get the ABI restrictions for procedure calls.
490 * @param call_type The call type of the method (procedure) in question.
491 * @param p The array of parameter locations to be filled.
493 void (*get_call_abi)(ir_type *call_type, be_abi_call_t *abi);
496 * A "static" function, returns the frontend settings
497 * needed for this backend.
499 const backend_params *(*get_params)(void);
502 * mark node as rematerialized
504 void (*mark_remat)(ir_node *node);
507 * parse an assembler constraint part and set flags according to its nature
508 * advances the *c pointer to point to the last parsed character (so if you
509 * parse a single character don't advance c)
511 asm_constraint_flags_t (*parse_asm_constraint)(const char **c);
514 * returns true if the string is a valid clobbered (register) in this
517 int (*is_valid_clobber)(const char *clobber);
520 * Initialize the code generator.
522 * @return A newly created code generator.
524 void (*init_graph)(ir_graph *irg);
527 * return node used as base in pic code addresses
529 ir_node* (*get_pic_base)(ir_graph *irg);
532 * Called before abi introduce.
534 void (*before_abi)(ir_graph *irg);
537 * Called, when the graph is being normalized.
539 void (*prepare_graph)(ir_graph *irg);
542 * Called before register allocation.
544 void (*before_ra)(ir_graph *irg);
547 * Called directly before done is called. This should be the last place
548 * where the irg is modified.
550 void (*finish)(ir_graph *irg);
553 * Called after everything happened. This call should emit the final
554 * assembly code but avoid changing the irg.
555 * The code generator must also be de-allocated here.
557 void (*emit)(ir_graph *irg);
560 * Checks if the given register is callee/caller saved.
561 * @deprecated, only necessary if backend still uses beabi functions
563 int (*register_saved_by)(const arch_register_t *reg, int callee);
566 * Create a spill instruction. We assume that spill instructions
567 * do not need any additional registers and do not affect cpu-flags in any
569 * Construct a sequence of instructions after @p after (the resulting nodes
570 * are already scheduled).
571 * Returns a mode_M value which is used as input for a reload instruction.
573 ir_node *(*new_spill)(ir_node *value, ir_node *after);
576 * Create a reload instruction. We assume that reload instructions do not
577 * need any additional registers and do not affect cpu-flags in any way.
578 * Constructs a sequence of instruction before @p before (the resulting
579 * nodes are already scheduled). A rewiring of users is not performed in
581 * Returns a value representing the restored value.
583 ir_node *(*new_reload)(ir_node *value, ir_node *spilled_value,
587 #define arch_env_done(env) ((env)->impl->done(env))
588 #define arch_env_handle_intrinsics(env) \
589 do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
590 #define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((tp), (abi)))
591 #define arch_env_get_params(env) ((env)->impl->get_params())
592 #define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((c))
593 #define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((clobber))
594 #define arch_env_mark_remat(env,node) \
595 do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0)
597 #define arch_env_new_spill(env,value,after) ((env)->impl->new_spill(value, after))
598 #define arch_env_new_reload(env,value,spilled,before) ((env)->impl->new_reload(value, spilled, before))
604 const arch_isa_if_t *impl;
605 unsigned n_registers; /**< number of registers */
606 const arch_register_t *registers; /**< register array */
607 unsigned n_register_classes; /**< number of register classes*/
608 const arch_register_class_t *register_classes; /**< register classes */
609 const arch_register_t *sp; /**< The stack pointer register. */
610 const arch_register_t *bp; /**< The base pointer register. */
611 const arch_register_class_t *link_class; /**< The static link pointer
613 int stack_alignment; /**< power of 2 stack alignment */
614 const be_main_env_t *main_env; /**< the be main environment */
615 int spill_cost; /**< cost for a be_Spill node */
616 int reload_cost; /**< cost for a be_Reload node */
617 bool custom_abi : 1; /**< backend does all abi handling
618 and does not need the generic
619 stuff from beabi.h/.c */
622 static inline bool arch_irn_is_ignore(const ir_node *irn)
624 const arch_register_req_t *req = arch_get_irn_register_req(irn);
625 return req->type & arch_register_req_type_ignore;
628 static inline bool arch_irn_consider_in_reg_alloc(
629 const arch_register_class_t *cls, const ir_node *node)
631 const arch_register_req_t *req = arch_get_irn_register_req(node);
634 !(req->type & arch_register_req_type_ignore);
638 * Iterate over all values defined by an instruction.
639 * Only looks at values in a certain register class where the requirements
640 * are not marked as ignore.
641 * Executes @p code for each definition.
643 #define be_foreach_definition_(node, cls, value, code) \
645 if (get_irn_mode(node) == mode_T) { \
646 const ir_edge_t *edge_; \
647 foreach_out_edge(node, edge_) { \
648 const arch_register_req_t *req_; \
649 value = get_edge_src_irn(edge_); \
650 req_ = arch_get_irn_register_req(value); \
651 if (req_->cls != cls) \
656 const arch_register_req_t *req_ = arch_get_irn_register_req(node); \
658 if (req_->cls == cls) { \
664 #define be_foreach_definition(node, cls, value, code) \
665 be_foreach_definition_(node, cls, value, \
666 if (req_->type & arch_register_req_type_ignore) \
671 static inline const arch_register_class_t *arch_get_irn_reg_class(
674 const arch_register_req_t *req = arch_get_irn_register_req(node);
678 bool arch_reg_is_allocatable(const arch_register_req_t *req,
679 const arch_register_t *reg);