2 * Processor architecture specification.
3 * @author Sebastian Hack
29 arch_env_t *arch_env_init(arch_env_t *env, const arch_isa_if_t *isa_if)
31 memset(env, 0, sizeof(*env));
32 env->isa = isa_if->init();
36 arch_env_t *arch_env_add_irn_handler(arch_env_t *env,
37 const arch_irn_handler_t *handler)
39 assert(env->handlers_tos <= ARCH_MAX_HANDLERS);
40 env->handlers[env->handlers_tos++] = handler;
44 static const arch_irn_ops_t *fallback_irn_ops = NULL;
46 int arch_register_class_put(const arch_register_class_t *cls, bitset_t *bs)
50 for(i = 0, n = cls->n_regs; i < n; ++i)
58 * Get the isa responsible for a node.
59 * @param env The arch environment with the isa stack.
60 * @param irn The node to get the responsible isa for.
61 * @return The irn operations given by the responsible isa.
63 static INLINE const arch_irn_ops_t *
64 get_irn_ops(const arch_env_t *env, const ir_node *irn)
68 for(i = env->handlers_tos - 1; i >= 0; --i) {
69 const arch_irn_handler_t *handler = env->handlers[i];
70 const arch_irn_ops_t *ops = handler->get_irn_ops(handler, irn);
76 return fallback_irn_ops;
79 const arch_register_req_t *arch_get_register_req(const arch_env_t *env,
80 arch_register_req_t *req, const ir_node *irn, int pos)
82 const arch_irn_ops_t *ops = get_irn_ops(env, irn);
83 req->type = arch_register_req_type_none;
84 return ops->get_irn_reg_req(ops, req, irn, pos);
87 int arch_get_allocatable_regs(const arch_env_t *env, const ir_node *irn,
88 int pos, const arch_register_class_t *cls, bitset_t *bs)
90 arch_register_req_t local_req;
91 const arch_irn_ops_t *ops = get_irn_ops(env, irn);
92 const arch_register_req_t *req = ops->get_irn_reg_req(ops, &local_req, irn, pos);
94 if(arch_register_req_is(req, none)) {
99 if(arch_register_req_is(req, limited))
100 return req->limited(irn, pos, bs);
102 arch_register_class_put(req->cls, bs);
103 return req->cls->n_regs;
106 int arch_is_register_operand(const arch_env_t *env,
107 const ir_node *irn, int pos)
109 arch_register_req_t local_req;
110 const arch_irn_ops_t *ops = get_irn_ops(env, irn);
111 const arch_register_req_t *req = ops->get_irn_reg_req(ops, &local_req, irn, pos);
115 int arch_reg_is_allocatable(const arch_env_t *env, const ir_node *irn,
116 int pos, const arch_register_t *reg)
119 arch_register_req_t req;
121 arch_get_register_req(env, &req, irn, pos);
123 case arch_register_req_type_normal:
124 case arch_register_req_type_should_be_different:
125 case arch_register_req_type_should_be_same:
126 res = req.cls == reg->reg_class;
128 case arch_register_req_type_limited:
130 bitset_t *bs = bitset_alloca(req.cls->n_regs);
131 req.limited(irn, pos, bs);
132 res = bitset_is_set(bs, arch_register_get_index(reg));
142 const arch_register_class_t *
143 arch_get_irn_reg_class(const arch_env_t *env, const ir_node *irn, int pos)
145 arch_register_req_t local_req;
146 const arch_irn_ops_t *ops = get_irn_ops(env, irn);
147 const arch_register_req_t *req = ops->get_irn_reg_req(ops, &local_req, irn, pos);
148 return req ? req->cls : NULL;
151 extern const arch_register_t *
152 arch_get_irn_register(const arch_env_t *env, const ir_node *irn)
154 const arch_irn_ops_t *ops = get_irn_ops(env, irn);
155 return ops->get_irn_reg(ops, irn);
158 extern void arch_set_irn_register(const arch_env_t *env,
159 ir_node *irn, const arch_register_t *reg)
161 const arch_irn_ops_t *ops = get_irn_ops(env, irn);
162 ops->set_irn_reg(ops, irn, reg);
165 extern arch_irn_class_t arch_irn_classify(const arch_env_t *env, const ir_node *irn)
167 const arch_irn_ops_t *ops = get_irn_ops(env, irn);
168 return ops->classify(ops, irn);
171 extern arch_irn_flags_t arch_irn_get_flags(const arch_env_t *env, const ir_node *irn)
173 const arch_irn_ops_t *ops = get_irn_ops(env, irn);
174 return ops->get_flags(ops, irn);