2 * This file is part of libFirm.
3 * Copyright (C) 2012 University of Karlsruhe.
8 * @brief Processor architecture specification.
9 * @author Sebastian Hack
24 #include "raw_bitset.h"
28 arch_register_req_t const arch_no_requirement = {
29 arch_register_req_type_none,
38 * Get the isa responsible for a node.
39 * @param irn The node to get the responsible isa for.
40 * @return The irn operations given by the responsible isa.
42 static const arch_irn_ops_t *get_irn_ops(const ir_node *irn)
45 irn = get_Proj_pred(irn);
46 assert(!is_Proj(irn));
49 ir_op *ops = get_irn_op(irn);
50 const arch_irn_ops_t *be_ops = get_op_ops(ops)->be_ops;
55 void arch_set_frame_offset(ir_node *irn, int offset)
57 const arch_irn_ops_t *ops = get_irn_ops(irn);
58 ops->set_frame_offset(irn, offset);
61 ir_entity *arch_get_frame_entity(const ir_node *irn)
63 const arch_irn_ops_t *ops = get_irn_ops(irn);
64 return ops->get_frame_entity(irn);
67 int arch_get_sp_bias(ir_node *irn)
69 const arch_irn_ops_t *ops = get_irn_ops(irn);
70 return ops->get_sp_bias(irn);
73 int arch_possible_memory_operand(const ir_node *irn, unsigned int i)
75 const arch_irn_ops_t *ops = get_irn_ops(irn);
77 if (ops->possible_memory_operand) {
78 return ops->possible_memory_operand(irn, i);
84 void arch_perform_memory_operand(ir_node *irn, ir_node *spill, unsigned int i)
86 const arch_irn_ops_t *ops = get_irn_ops(irn);
88 if (ops->perform_memory_operand) {
89 ops->perform_memory_operand(irn, spill, i);
95 int arch_get_op_estimated_cost(const ir_node *irn)
97 const arch_irn_ops_t *ops = get_irn_ops(irn);
99 if (ops->get_op_estimated_cost) {
100 return ops->get_op_estimated_cost(irn);
106 static reg_out_info_t *get_out_info_n(const ir_node *node, unsigned pos)
108 const backend_info_t *info = be_get_info(node);
109 assert(pos < (unsigned)ARR_LEN(info->out_infos));
110 return &info->out_infos[pos];
114 const arch_register_t *arch_get_irn_register(const ir_node *node)
116 const reg_out_info_t *out = get_out_info(node);
120 const arch_register_t *arch_get_irn_register_out(const ir_node *node,
123 const reg_out_info_t *out = get_out_info_n(node, pos);
127 const arch_register_t *arch_get_irn_register_in(const ir_node *node, int pos)
129 ir_node *op = get_irn_n(node, pos);
130 return arch_get_irn_register(op);
133 void arch_set_irn_register_out(ir_node *node, unsigned pos,
134 const arch_register_t *reg)
136 reg_out_info_t *out = get_out_info_n(node, pos);
140 void arch_set_irn_register(ir_node *node, const arch_register_t *reg)
142 reg_out_info_t *out = get_out_info(node);
146 void arch_set_irn_flags(ir_node *node, arch_irn_flags_t flags)
148 backend_info_t *const info = be_get_info(node);
152 void arch_add_irn_flags(ir_node *node, arch_irn_flags_t flags)
154 backend_info_t *const info = be_get_info(node);
155 info->flags |= flags;
158 bool arch_reg_is_allocatable(const arch_register_req_t *req,
159 const arch_register_t *reg)
161 assert(req->type != arch_register_req_type_none);
162 if (req->cls != reg->reg_class)
164 if (reg->type & arch_register_type_virtual)
166 if (arch_register_req_is(req, limited))
167 return rbitset_is_set(req->limited, reg->index);
172 * Print information about a register requirement in human readable form
173 * @param F output stream/file
174 * @param req The requirements structure to format.
176 static void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
179 if (req == NULL || req->type == arch_register_req_type_none) {
184 fprintf(F, "%s", req->cls->name);
186 if (arch_register_req_is(req, limited)) {
187 unsigned n_regs = req->cls->n_regs;
190 fprintf(F, " limited to");
191 for (i = 0; i < n_regs; ++i) {
192 if (rbitset_is_set(req->limited, i)) {
193 const arch_register_t *reg = &req->cls->regs[i];
194 fprintf(F, " %s", reg->name);
199 if (arch_register_req_is(req, should_be_same)) {
200 const unsigned other = req->other_same;
203 fprintf(F, " same as");
204 for (i = 0; 1U << i <= other; ++i) {
205 if (other & (1U << i)) {
206 ir_fprintf(F, " #%d (%+F)", i, get_irn_n(skip_Proj_const(node), i));
211 if (arch_register_req_is(req, must_be_different)) {
212 const unsigned other = req->other_different;
215 fprintf(F, " different from");
216 for (i = 0; 1U << i <= other; ++i) {
217 if (other & (1U << i)) {
218 ir_fprintf(F, " #%d (%+F)", i, get_irn_n(skip_Proj_const(node), i));
223 if (req->width != 1) {
224 fprintf(F, " width:%d", req->width);
226 if (arch_register_req_is(req, aligned)) {
227 fprintf(F, " aligned");
229 if (arch_register_req_is(req, ignore)) {
230 fprintf(F, " ignore");
232 if (arch_register_req_is(req, produces_sp)) {
233 fprintf(F, " produces_sp");
237 void arch_dump_reqs_and_registers(FILE *F, const ir_node *node)
239 backend_info_t *const info = be_get_info(node);
240 int const n_ins = get_irn_arity(node);
241 /* don't fail on invalid graphs */
242 if (!info || (!info->in_reqs && n_ins != 0) || !info->out_infos) {
243 fprintf(F, "invalid register requirements!!!\n");
247 for (int i = 0; i < n_ins; ++i) {
248 const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
249 fprintf(F, "inreq #%d = ", i);
250 arch_dump_register_req(F, req, node);
253 be_foreach_out(node, o) {
254 const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
255 fprintf(F, "outreq #%u = ", o);
256 arch_dump_register_req(F, req, node);
257 const arch_register_t *reg = arch_get_irn_register_out(node, o);
258 fprintf(F, " [%s]\n", reg != NULL ? reg->name : "n/a");
261 fprintf(F, "flags =");
262 arch_irn_flags_t flags = arch_get_irn_flags(node);
263 if (flags == arch_irn_flags_none) {
266 if (flags & arch_irn_flags_dont_spill) {
267 fprintf(F, " unspillable");
269 if (flags & arch_irn_flags_rematerializable) {
270 fprintf(F, " remat");
272 if (flags & arch_irn_flags_modify_flags) {
273 fprintf(F, " modify_flags");
275 if (flags & arch_irn_flags_simple_jump) {
276 fprintf(F, " simple_jump");
278 if (flags & arch_irn_flags_not_scheduled) {
279 fprintf(F, " not_scheduled");
282 fprintf(F, " (0x%x)\n", (unsigned)flags);