3 # This is a template specification for the Firm-Backend
5 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
9 $comment_string = '/*';
11 # the number of additional opcodes you want to register
12 #$additional_opcodes = 0;
14 # The node description is done as a perl hash initializer with the
15 # following structure:
20 # "op_flags" => "N|L|C|X|I|F|Y|H|c|K",
21 # "irn_flags" => "R|N|I"
22 # "arity" => "0|1|2|3 ... |variable|dynamic|any",
23 # "state" => "floats|pinned|mem_pinned|exc_pinned",
25 # { "type" => "type 1", "name" => "name 1" },
26 # { "type" => "type 2", "name" => "name 2" },
29 # "comment" => "any comment for constructor",
30 # "reg_req" => { "in" => [ "reg_class|register" ], "out" => [ "reg_class|register|in_rX" ] },
31 # "cmp_attr" => "c source code for comparing node attributes",
32 # "emit" => "emit code with templates",
33 # "attr" => "attitional attribute arguments for constructor"
34 # "init_attr" => "emit attribute initialization template"
35 # "rd_constructor" => "c source code which constructs an ir_node"
38 # ... # (all nodes you need to describe)
40 # ); # close the %nodes initializer
42 # op_flags: flags for the operation, OPTIONAL (default is "N")
43 # the op_flags correspond to the firm irop_flags:
46 # C irop_flag_commutative
47 # X irop_flag_cfopcode
48 # I irop_flag_ip_cfopcode
51 # H irop_flag_highlevel
52 # c irop_flag_constlike
55 # irn_flags: special node flags, OPTIONAL (default is 0)
56 # following irn_flags are supported:
59 # I ignore for register allocation
61 # state: state of the operation, OPTIONAL (default is "floats")
63 # arity: arity of the operation, MUST NOT BE OMITTED
65 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
66 # are always the first 3 arguments and are always autmatically
68 # If this key is missing the following arguments will be created:
69 # for i = 1 .. arity: ir_node *op_i
72 # outs: if a node defines more than one output, the names of the projections
73 # nodes having outs having automatically the mode mode_T
75 # comment: OPTIONAL comment for the node constructor
77 # rd_constructor: for every operation there will be a
78 # new_rd_<arch>_<op-name> function with the arguments from above
79 # which creates the ir_node corresponding to the defined operation
80 # you can either put the complete source code of this function here
82 # This key is OPTIONAL. If omitted, the following constructor will
84 # if (!op_<arch>_<op-name>) assert(0);
88 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
91 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
95 # 1 - caller save (register must be saved by the caller of a function)
96 # 2 - callee save (register must be saved by the called function)
97 # 4 - ignore (do not assign this register)
98 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
101 { "name" => "r0", "type" => 1 },
102 { "name" => "r1", "type" => 1 },
103 { "name" => "r2", "type" => 1 },
104 { "name" => "r3", "type" => 1 },
105 { "name" => "r4", "type" => 2 },
106 { "name" => "r5", "type" => 2 },
107 { "name" => "r6", "type" => 2 },
108 { "name" => "r7", "type" => 2 },
109 { "name" => "r8", "type" => 2 },
110 { "name" => "r9", "type" => 2 },
111 { "name" => "r10", "type" => 2 },
112 { "name" => "r11", "type" => 2 },
113 { "name" => "r12", "type" => 6 }, # reserved for linker
114 { "name" => "sp", "type" => 6 }, # this is our stack pointer
115 { "name" => "lr", "type" => 3 }, # this is our return address
116 { "name" => "pc", "type" => 6 }, # this is our program counter
117 { "mode" => "mode_Iu" }
120 { "name" => "f0", "type" => 1 },
121 { "name" => "f1", "type" => 1 },
122 { "name" => "f2", "type" => 1 },
123 { "name" => "f3", "type" => 1 },
124 { "name" => "f4", "type" => 2 },
125 { "name" => "f5", "type" => 2 },
126 { "name" => "f6", "type" => 2 },
127 { "name" => "f7", "type" => 2 },
128 { "mode" => "mode_E" }
132 #--------------------------------------------------#
135 # _ __ _____ __ _ _ __ ___ _ __ ___ #
136 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
137 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
138 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
141 #--------------------------------------------------#
145 #-----------------------------------------------------------------#
148 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
149 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
150 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
151 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
154 #-----------------------------------------------------------------#
156 # commutative operations
161 "comment" => "construct Add: Add(a, b) = Add(b, a) = a + b",
162 "attr" => "arm_shift_modifier mod, tarval *shf",
163 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
164 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
165 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
166 "emit" => '. add %D1, %S1, %S2%X0 /* Add(%S1, %S2) -> %D1, (%A1, %A2) */'
171 "comment" => "construct Add: Add(a, const) = Add(const, a) = a + const",
172 "attr" => "tarval *tv",
173 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
174 "cmp_attr" => 'return attr_a->value != attr_b->value;',
175 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
176 "emit" => '. add %D1, %S1, %C /* Add(%C, %S1) -> %D1, (%A1, const) */'
182 "comment" => "construct Mul: Mul(a, b) = Mul(b, a) = a * b",
183 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "!in_r1" ] },
184 "emit" =>'. mul %D1, %S1, %S2 /* Mul(%S1, %S2) -> %D1, (%A1, %A2) */'
190 "comment" => "construct Mla: Mla(a, b, c) = a * b + c",
191 "reg_req" => { "in" => [ "gp", "gp", "gp" ], "out" => [ "!in_r1" ] },
192 "emit" =>'. mla %D1, %S1, %S2, %S3 /* Mla(%S1, %S2, %S3) -> %D1, (%A1, %A2, %A3) */'
198 "comment" => "construct And: And(a, b) = And(b, a) = a AND b",
199 "attr" => "arm_shift_modifier mod, tarval *shf",
200 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
201 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
202 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
203 "emit" => '. and %D1, %S1, %S2%X0 /* And(%S1, %S2) -> %D1, (%A1, %A2) */'
208 "comment" => "construct And: And(a, const) = And(const, a) = a AND const",
209 "attr" => "tarval *tv",
210 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
211 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
212 "emit" => '. and %D1, %S1, %C /* And(%C, %S1) -> %D1, (%A1, const) */',
213 "cmp_attr" => 'return attr_a->value != attr_b->value;'
219 "comment" => "construct Or: Or(a, b) = Or(b, a) = a OR b",
220 "attr" => "arm_shift_modifier mod, tarval *shf",
221 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
222 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
223 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
224 "emit" => '. orr %D1, %S1, %S2%X0 /* Or(%S1, %S2) -> %D1, (%A1, %A2) */'
229 "comment" => "construct Or: Or(a, const) = Or(const, a) = a OR const",
230 "attr" => "tarval *tv",
231 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
232 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
233 "cmp_attr" => 'return attr_a->value != attr_b->value;',
234 "emit" => '. orr %D1, %S1, %C /* Or(%C, %S1) -> %D1, (%A1, const) */'
240 "comment" => "construct Eor: Eor(a, b) = Eor(b, a) = a EOR b",
241 "attr" => "arm_shift_modifier mod, tarval *shf",
242 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
243 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
244 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
245 "emit" => '. eor %D1, %S1, %S2%X0 /* Xor(%S1, %S2) -> %D1, (%A1, %A2) */'
250 "comment" => "construct Eor: Eor(a, const) = Eor(const, a) = a EOR const",
251 "attr" => "tarval *tv",
252 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
253 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
254 "cmp_attr" => 'return attr_a->value != attr_b->value;',
255 "emit" => '. eor %D1, %S1, %C /* Xor(%C, %S1) -> %D1, (%A1, const) */'
258 # not commutative operations
262 "comment" => "construct Bic: Bic(a, b) = a AND ~b",
263 "attr" => "arm_shift_modifier mod, tarval *shf",
264 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
265 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
266 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
267 "emit" => '. bic %D1, %S1, %S2%X0 /* AndNot(%S1, %S2) -> %D1, (%A1, %A2) */'
272 "comment" => "construct Bic: Bic(a, const) = a AND ~const",
273 "attr" => "tarval *tv",
274 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
275 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
276 "emit" => '. bic %D1, %S1, %C /* AndNot(%C, %S1) -> %D1, (%A1, const) */',
277 "cmp_attr" => 'return attr_a->value != attr_b->value;'
282 "comment" => "construct Sub: Sub(a, b) = a - b",
283 "attr" => "arm_shift_modifier mod, tarval *shf",
284 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
285 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
286 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
287 "emit" => '. sub %D1, %S1, %S2%X0 /* Sub(%S1, %S2) -> %D1, (%A1, %A2) */'
292 "comment" => "construct Sub: Sub(a, const) = a - const",
293 "attr" => "tarval *tv",
294 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
295 "cmp_attr" => 'return attr_a->value != attr_b->value;',
296 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
297 "emit" => '. sub %D1, %S1, %C /* Sub(%S1, %C) -> %D1, (%A1, const) */',
302 "comment" => "construct Rsb: Rsb(a, b) = b - a",
303 "attr" => "arm_shift_modifier mod, tarval *shf",
304 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
305 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
306 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
307 "emit" => '. rsb %D1, %S1, %S2%X0 /* Rsb(%S1, %S2) -> %D1, (%A1, %A2) */'
312 "comment" => "construct Rsb: Rsb(a, const) = const - a",
313 "attr" => "tarval *tv",
314 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
315 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
316 "emit" => '. rsb %D1, %S1, %C /* Rsb(%S1, %C) -> %D1, (%A1, const) */',
317 "cmp_attr" => 'return attr_a->value != attr_b->value;'
322 "comment" => "construct Shl: Shl(a, b) = a << b",
323 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
324 "emit" => '. mov %D1, %S1, lsl %S2 /* Shl(%S1, %S2) -> %D1, (%A1, %A2) */'
329 "comment" => "construct Shr: Shr(a, b) = a >> b",
330 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "in_r1" ] },
331 "emit" => '. mov %D1, %S1, lsr %S2 /* Shr(%S1, %S2) -> %D1, (%A1, %A2) */'
336 "comment" => "construct Shrs: Shrs(a, b) = a >> b",
337 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "in_r1" ] },
338 "emit" => '. mov %D1, %S1, asr %S2 /* Shrs(%S1, %S2) -> %D1, (%A1, %A2) */'
342 # "irn_flags" => "R",
343 # "comment" => "construct RotR: RotR(a, b) = a ROTR b",
344 # "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
345 # "emit" => '. mov %D1, %S1, ror %S2 /* RotR(%S1, %S2) -> %D1, (%A1, %A2) */'
346 ## "emit" => '. ror %S1, %S2, %D1 /* RotR(%S1, %S2) -> %D1, (%A1, %A2) */'
350 # "irn_flags" => "R",
351 # "comment" => "construct RotL: RotL(a, b) = a ROTL b",
352 # "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
353 # "emit" => '. rol %S1, %S2, %D1 /* RotL(%S1, %S2) -> %D1, (%A1, %A2) */'
357 # "irn_flags" => "R",
358 # "comment" => "construct RotL: RotL(a, const) = a ROTL const",
359 # "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
360 # "emit" => '. rol %S1, %C, %D1 /* RotL(%S1, %C) -> %D1, (%A1, const) */'
365 "comment" => "construct Mov: a = b",
366 "attr" => "arm_shift_modifier mod, tarval *shf",
367 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
368 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
369 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
370 "emit" => '. mov %D1, %S1%X0 /* Mov(%S1%X0) -> %D1, (%A1) */'
375 "comment" => "represents an integer constant",
376 "attr" => "tarval *tv",
377 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
378 "reg_req" => { "out" => [ "gp" ] },
379 "emit" => '. mov %D1, %C /* Mov Const into register */',
380 "cmp_attr" => 'return attr_a->value != attr_b->value;'
385 "comment" => "construct Not: Not(a) = !a",
386 "attr" => "arm_shift_modifier mod, tarval *shf",
387 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
388 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
389 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
390 "emit" => '. mvn %D1, %S1%X0 /* ~(%S1%X0) -> %D1, (%A1) */'
395 "comment" => "represents a negated integer constant",
396 "attr" => "tarval *tv",
397 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
398 "cmp_attr" => 'return attr_a->value != attr_b->value;',
399 "reg_req" => { "out" => [ "gp" ] },
400 "emit" => '. mvn %D1, %C /* Mov ~Const into register */',
405 "comment" => "construct Abs: Abs(a) = |a|",
406 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
408 '. movs %S1, %S1, #0 /* set condition flag */\n
409 . rsbmi %D1, %S1, #0 /* Neg(%S1) -> %D1, (%A1) */'
417 "comment" => "allocate an empty register for calculations",
418 "reg_req" => { "out" => [ "gp" ] },
419 "emit" => '. /* %D1 now available for calculations */',
420 "cmp_attr" => 'return 1;'
424 "comment" => "implements a register copy",
425 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
431 "comment" => "implements a memcopy: CopyB(dst, src, size, mem) == memcpy(dst, src, size)",
432 "reg_req" => { "in" => [ "!sp", "!sp", "gp", "gp", "gp", "none" ], "out" => [ "none" ] },
438 "comment" => "represents a symbolic constant",
439 "attr" => "const char *label",
440 "init_attr" => ' attr->symconst_label = label;',
441 "reg_req" => { "out" => [ "gp" ] },
442 # "emit" => '. ldr %D1, %C /* Mov Const into register */',
444 ' /* should be identical but ...*/
445 return strcmp(attr_a->symconst_label, attr_b->symconst_label);'
449 "op_flags" => "L|X|Y",
450 "comment" => "construct conditional jump: CMP A, B && JMPxx LABEL",
451 "cmp_attr" => " return arm_comp_condJmp(attr_a, attr_b);\n",
452 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "none", "none"] },
456 "op_flags" => "L|X|Y",
457 "comment" => "construct switch",
458 "reg_req" => { "in" => [ "gp" ], "out" => [ "none" ] },
459 "cmp_attr" => " return 0;\n",
467 "state" => "exc_pinned",
468 "comment" => "construct Load: Load(ptr, mem) = LD ptr -> reg",
469 "reg_req" => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
470 "emit" => '. ldr %D1, [%S1, #0] /* Load((%S1)) -> %D1, (%A1) */',
471 "outs" => [ "res", "M" ],
477 "state" => "exc_pinned",
478 "comment" => "construct Load: Load(ptr, mem) = LD ptr -> reg",
479 "reg_req" => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
480 "emit" => '. ldrb %D1, [%S1, #0] /* Load((%S1)) -> %D1, (%A1) */',
481 "outs" => [ "res", "M" ],
487 "state" => "exc_pinned",
488 "comment" => "construct Load: Load(ptr, mem) = LD ptr -> reg",
489 "reg_req" => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
490 "emit" => '. ldrsb %D1, [%S1, #0] /* Load((%S1)) -> %D1, (%A1) */',
491 "outs" => [ "res", "M" ],
497 "state" => "exc_pinned",
498 "comment" => "construct Load: Load(ptr, mem) = LD ptr -> reg",
499 "reg_req" => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
500 "emit" => '. ldrh %D1, [%S1, #0] /* Load((%S1)) -> %D1, (%A1) */',
501 "outs" => [ "res", "M" ],
507 "state" => "exc_pinned",
508 "comment" => "construct Load: Load(ptr, mem) = LD ptr -> reg",
509 "reg_req" => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
510 "emit" => '. ldrsh %D1, [%S1, #0] /* Load((%S1)) -> %D1, (%A1) */',
511 "outs" => [ "res", "M" ],
517 "state" => "exc_pinned",
518 "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
519 "reg_req" => { "in" => [ "gp", "gp", "none" ] },
520 "emit" => '. strb %S2, [%S1, #0] /* Store(%S2) -> (%S1), (%A1, %A2) */',
527 "state" => "exc_pinned",
528 "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
529 "reg_req" => { "in" => [ "gp", "gp", "none" ] },
530 "emit" => '. strsb %S2, [%S1, #0] /* Store(%S2) -> (%S1), (%A1, %A2) */',
537 "state" => "exc_pinned",
538 "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
539 "reg_req" => { "in" => [ "gp", "gp", "none" ] },
540 "emit" => '. strh %S2, [%S1, #0] /* Store(%S2) -> (%S1), (%A1, %A2) */',
547 "state" => "exc_pinned",
548 "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
549 "reg_req" => { "in" => [ "gp", "gp", "none" ] },
550 "emit" => '. strhs %S2, [%S1, #0] /* Store(%S2) -> (%S1), (%A1, %A2) */',
557 "state" => "exc_pinned",
558 "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
559 "reg_req" => { "in" => [ "gp", "gp", "none" ] },
560 "emit" => '. str %S2, [%S1, #0] /* Store(%S2) -> (%S1), (%A1, %A2) */',
564 "StoreStackM4Inc" => {
567 "state" => "exc_pinned",
568 "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
569 "reg_req" => { "in" => [ "sp", "gp", "gp", "gp", "gp", "none" ], "out" => [ "gp", "none" ] },
570 "emit" => '. stmfd %S1!, {%S2, %S3, %S4, %S5} /* Store multiple on Stack*/',
571 "outs" => [ "ptr", "M" ],
577 "state" => "exc_pinned",
578 "comment" => "construct Load: Load(ptr, mem) = LD ptr -> reg",
579 "reg_req" => { "in" => [ "sp", "none" ], "out" => [ "gp", "gp", "gp", "none" ] },
580 "emit" => '. ldmfd %S1, {%D1, %D2, %D3} /* Load multiple from Stack */',
581 "outs" => [ "res0", "res1", "res2", "M" ],
585 #---------------------------------------------------#
588 # | |_ _ __ __ _ _ __ ___ __| | ___ ___ #
589 # | _| '_ \ / _` | | '_ \ / _ \ / _` |/ _ \/ __| #
590 # | | | |_) | (_| | | | | | (_) | (_| | __/\__ \ #
591 # |_| | .__/ \__,_| |_| |_|\___/ \__,_|\___||___/ #
594 #---------------------------------------------------#
596 # commutative operations
601 "comment" => "construct FPA Add: Add(a, b) = Add(b, a) = a + b",
602 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
603 "emit" => '. adf%M %D1, %S1, %S2 /* FPA Add(%S1, %S2) -> %D1 */',
608 "comment" => "construct FPA Mul: Mul(a, b) = Mul(b, a) = a * b",
609 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
610 "emit" =>'. muf%M %D1, %S1, %S2 /* FPA Mul(%S1, %S2) -> %D1 */',
615 "comment" => "construct FPA Fast Mul: Mul(a, b) = Mul(b, a) = a * b",
616 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
617 "emit" =>'. fml%M %D1, %S1, %S2 /* FPA Fast Mul(%S1, %S2) -> %D1 */',
623 "comment" => "construct FPA Max: Max(a, b) = Max(b, a) = a > b ? a : b",
624 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
625 "emit" =>'. fmax %S1, %S2, %D1 /* FPA Max(%S1, %S2) -> %D1 */',
631 "comment" => "construct FPA Min: Min(a, b) = Min(b, a) = a < b ? a : b",
632 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
633 "emit" =>'. fmin %S1, %S2, %D1 /* FPA Min(%S1, %S2) -> %D1 */',
636 # not commutative operations
640 "comment" => "construct FPA Sub: Sub(a, b) = a - b",
641 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
642 "emit" => '. suf%M %D1, %S1, %S2 /* FPA Sub(%S1, %S2) -> %D1 */'
647 "comment" => "construct FPA reverse Sub: Sub(a, b) = b - a",
648 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
649 "emit" => '. rsf%M %D1, %S1, %S2 /* FPA reverse Sub(%S1, %S2) -> %D1 */'
653 "comment" => "construct FPA Div: Div(a, b) = a / b",
654 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
655 "emit" =>'. dvf%M %D1, %S1, %S2 /* FPA Div(%S1, %S2) -> %D1 */',
659 "comment" => "construct FPA reverse Div: Div(a, b) = b / a",
660 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
661 "emit" =>'. rdf%M %D1, %S1, %S2 /* FPA reverse Div(%S1, %S2) -> %D1 */',
665 "comment" => "construct FPA Fast Div: Div(a, b) = a / b",
666 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
667 "emit" =>'. fdv%M %D1, %S1, %S2 /* FPA Fast Div(%S1, %S2) -> %D1 */',
671 "comment" => "construct FPA Fast reverse Div: Div(a, b) = b / a",
672 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
673 "emit" =>'. frd%M %D1, %S1, %S2 /* FPA Fast reverse Div(%S1, %S2) -> %D1 */',
678 "comment" => "construct FPA Move: b = a",
679 "reg_req" => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
680 "emit" => '. mvf%M %S1, %D1 /* FPA Mov %S1 -> %D1 */',
685 "comment" => "construct FPA Move Negated: b = -a",
686 "reg_req" => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
687 "emit" => '. mnf%M %S1, %D1 /* FPA Neg(%S1) -> %D1 */',
692 "comment" => "construct FPA Absolute value: fAbsd(a) = |a|",
693 "reg_req" => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
694 "emit" => '. abs%M %D1, %S1 /* FPA Abs(%S1) -> %D1 */',
702 "comment" => "represents a FPA constant",
703 "attr" => "tarval *val",
704 "init_attr" => 'attr->value = val;',
705 "reg_req" => { "out" => [ "fpa" ] },
706 "emit" => '. fmov %D1, %C /* Mov fConst into register */',
707 "cmp_attr" => 'return attr_a->value != attr_b->value;',
712 "comment" => "construct a FPA integer->float conversion",
713 "reg_req" => { "in" => ["gp"], "out" => [ "fpa" ] },
714 "emit" => '. flt%M %D1, %S1 /* convert int to fp */',
719 "comment" => "construct a FPA float->integer conversion",
720 "reg_req" => { "in" => ["fpa"], "out" => [ "gp" ] },
721 "emit" => '. fix %D1, %S1 /* convert fp to int */',
729 "state" => "exc_pinned",
730 "comment" => "construct FPA Load: Load(ptr, mem) = LD ptr",
731 "attr" => "ir_mode *op_mode",
732 "init_attr" => "attr->op_mode = op_mode;",
733 "reg_req" => { "in" => [ "gp", "none" ], "out" => [ "fpa", "none" ] },
734 "emit" => '. ldf%M %D1, [%S1, #0] /* Load((%S1)) -> %D1 */',
735 "outs" => [ "res", "M" ],
741 "state" => "exc_pinned",
742 "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
743 "attr" => "ir_mode *op_mode",
744 "init_attr" => "attr->op_mode = op_mode;",
745 "reg_req" => { "in" => [ "gp", "fpa", "none" ] },
746 "emit" => '. stf%M [%S2, #0], %S1 /* Store(%S2) -> (%S1), (%A1, %A2) */',
753 "state" => "exc_pinned",
754 "comment" => "construct fp double to 2 gp register transfer",
755 "reg_req" => { "in" => [ "fpa", "none" ], "out" => [ "gp", "gp" ] },
756 "outs" => [ "low", "high", "M" ],
760 #---------------------------------------------------#
763 # __ _| |_ _ __ _ __ ___ __| | ___ ___ #
764 # \ \ / / _| '_ \ | '_ \ / _ \ / _` |/ _ \/ __| #
765 # \ V /| | | |_) | | | | | (_) | (_| | __/\__ \ #
766 # \_/ |_| | .__/ |_| |_|\___/ \__,_|\___||___/ #
769 #---------------------------------------------------#