3 # This is a template specification for the Firm-Backend
5 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
10 # the number of additional opcodes you want to register
11 #$additional_opcodes = 0;
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
105 $mode_gp = "mode_Iu";
106 $mode_fpa = "mode_E";
109 # 0 - no special type
110 # 1 - caller save (register must be saved by the caller of a function)
111 # 2 - callee save (register must be saved by the called function)
112 # 4 - ignore (do not assign this register)
113 # 8 - emitter can choose an arbitrary register of this class
114 # 16 - the register is a virtual one
115 # 32 - register represents a state
116 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
119 { "name" => "r0", "type" => 1 },
120 { "name" => "r1", "type" => 1 },
121 { "name" => "r2", "type" => 1 },
122 { "name" => "r3", "type" => 1 },
123 { "name" => "r4", "type" => 2 },
124 { "name" => "r5", "type" => 2 },
125 { "name" => "r6", "type" => 2 },
126 { "name" => "r7", "type" => 2 },
127 { "name" => "r8", "type" => 2 },
128 { "name" => "r9", "type" => 2 },
129 { "name" => "r10", "type" => 2 },
130 { "name" => "r11", "type" => 2 },
131 { "name" => "r12", "type" => 6 }, # reserved for linker
132 { "name" => "sp", "type" => 6 }, # this is our stack pointer
133 { "name" => "lr", "type" => 3 }, # this is our return address
134 { "name" => "pc", "type" => 6 }, # this is our program counter
135 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
136 { "mode" => $mode_gp }
139 { "name" => "f0", "type" => 1 },
140 { "name" => "f1", "type" => 1 },
141 { "name" => "f2", "type" => 1 },
142 { "name" => "f3", "type" => 1 },
143 { "name" => "f4", "type" => 1 },
144 { "name" => "f5", "type" => 1 },
145 { "name" => "f6", "type" => 1 },
146 { "name" => "f7", "type" => 1 },
147 { name => "fpa_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
148 { "mode" => $mode_fpa }
153 M => "${arch}_emit_mode(env, node);",
154 X => "${arch}_emit_shift(env, node);",
155 S0 => "${arch}_emit_source_register(env, node, 0);",
156 S1 => "${arch}_emit_source_register(env, node, 1);",
157 S2 => "${arch}_emit_source_register(env, node, 2);",
158 S3 => "${arch}_emit_source_register(env, node, 3);",
159 S4 => "${arch}_emit_source_register(env, node, 4);",
160 D0 => "${arch}_emit_dest_register(env, node, 0);",
161 D1 => "${arch}_emit_dest_register(env, node, 1);",
162 D2 => "${arch}_emit_dest_register(env, node, 2);",
163 C => "${arch}_emit_immediate(env, node);",
164 O => "${arch}_emit_offset(env, mode);",
167 #--------------------------------------------------#
170 # _ __ _____ __ _ _ __ ___ _ __ ___ #
171 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
172 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
173 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
176 #--------------------------------------------------#
178 $default_attr_type = "arm_attr_t";
179 $default_copy_attr = "arm_copy_attr";
182 arm_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
183 arm_SymConst_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
184 arm_CondJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
185 arm_SwitchJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
189 arm_attr_t => "cmp_attr_arm",
190 arm_SymConst_attr_t => "cmp_attr_arm_SymConst",
191 arm_CondJmp_attr_t => "cmp_attr_arm_CondJmp",
192 arm_SwitchJmp_attr_t => "cmp_attr_arm_SwitchJmp",
198 # comment => "blup di dup",
200 # emit => ". [%S0]-10",
202 # attr => "tarval *tv",
203 # init_attr => "(void) attri;",
205 # # cmp => "return 1;"
211 # reg_req => { in => [ "gp" ] },
212 # attr => "tarval *tv",
213 # init_attr => "(void) tv;",
219 # reg_req => { in => [ "gp", "gp" ] },
230 reg_req => { out => [ "gp_UKNWN" ] },
239 reg_req => { out => [ "fpa_UKNWN" ] },
244 #-----------------------------------------------------------------#
247 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
248 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
249 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
250 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
253 #-----------------------------------------------------------------#
255 # commutative operations
260 comment => "construct Add: Add(a, b) = Add(b, a) = a + b",
261 attr => "arm_shift_modifier mod, tarval *shf",
262 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
263 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
264 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
265 emit => '. add %D0, %S0, %S1%X'
270 comment => "construct Add: Add(a, const) = Add(const, a) = a + const",
271 attr => "tarval *tv",
272 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
273 cmp_attr => 'return attr_a->value != attr_b->value;',
274 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
275 emit => '. add %D0, %S0, %C'
281 comment => "construct Mul: Mul(a, b) = Mul(b, a) = a * b",
282 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "!in_r1" ] },
283 emit =>'. mul %D0, %S0, %S1'
289 comment => "construct signed 64bit Mul: Mul(a, b) = Mul(b, a) = a * b",
290 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp", "gp" ] },
291 emit =>'. smull %D0, %D1, %S0, %S1',
292 outs => [ "low", "high" ],
298 comment => "construct unsigned 64bit Mul: Mul(a, b) = Mul(b, a) = a * b",
299 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp", "gp" ] },
300 emit =>'. umull %D0, %D1, %S0, %S1',
301 outs => [ "low", "high" ],
307 comment => "construct Mla: Mla(a, b, c) = a * b + c",
308 reg_req => { "in" => [ "gp", "gp", "gp" ], "out" => [ "!in_r1" ] },
309 emit =>'. mla %D0, %S0, %S1, %S2'
315 comment => "construct And: And(a, b) = And(b, a) = a AND b",
316 attr => "arm_shift_modifier mod, tarval *shf",
317 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
318 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
319 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
320 emit => '. and %D0, %S0, %S1%X'
325 comment => "construct And: And(a, const) = And(const, a) = a AND const",
326 attr => "tarval *tv",
327 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
328 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
329 emit => '. and %D0, %S0, %C',
330 cmp_attr => 'return attr_a->value != attr_b->value;'
336 comment => "construct Or: Or(a, b) = Or(b, a) = a OR b",
337 attr => "arm_shift_modifier mod, tarval *shf",
338 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
339 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
340 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
341 emit => '. orr %D0, %S0, %S1%X'
346 comment => "construct Or: Or(a, const) = Or(const, a) = a OR const",
347 attr => "tarval *tv",
348 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
349 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
350 cmp_attr => 'return attr_a->value != attr_b->value;',
351 emit => '. orr %D0, %S0, %C'
357 comment => "construct Eor: Eor(a, b) = Eor(b, a) = a EOR b",
358 attr => "arm_shift_modifier mod, tarval *shf",
359 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
360 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
361 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
362 emit => '. eor %D0, %S0, %S1%X'
367 comment => "construct Eor: Eor(a, const) = Eor(const, a) = a EOR const",
368 attr => "tarval *tv",
369 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
370 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
371 cmp_attr => 'return attr_a->value != attr_b->value;',
372 emit => '. eor %D0, %S0, %C'
375 # not commutative operations
379 comment => "construct Bic: Bic(a, b) = a AND ~b",
380 attr => "arm_shift_modifier mod, tarval *shf",
381 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
382 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
383 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
384 emit => '. bic %D0, %S0, %S1%X'
389 comment => "construct Bic: Bic(a, const) = a AND ~const",
390 attr => "tarval *tv",
391 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
392 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
393 emit => '. bic %D0, %S0, %C',
394 cmp_attr => 'return attr_a->value != attr_b->value;'
399 comment => "construct Sub: Sub(a, b) = a - b",
400 attr => "arm_shift_modifier mod, tarval *shf",
401 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
402 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
403 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
404 emit => '. sub %D0, %S0, %S1%X'
409 comment => "construct Sub: Sub(a, const) = a - const",
410 attr => "tarval *tv",
411 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
412 cmp_attr => 'return attr_a->value != attr_b->value;',
413 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
414 emit => '. sub %D0, %S0, %C',
419 comment => "construct Rsb: Rsb(a, b) = b - a",
420 attr => "arm_shift_modifier mod, tarval *shf",
421 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
422 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
423 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
424 emit => '. rsb %D0, %S0, %S1%X'
429 comment => "construct Rsb: Rsb(a, const) = const - a",
430 attr => "tarval *tv",
431 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
432 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
433 emit => '. rsb %D0, %S0, %C',
434 cmp_attr => 'return attr_a->value != attr_b->value;'
439 comment => "construct Shl: Shl(a, b) = a << b",
440 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
441 emit => '. mov %D0, %S0, lsl %S1'
446 comment => "construct Shr: Shr(a, b) = a >> b",
447 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "in_r1" ] },
448 emit => '. mov %D0, %S0, lsr %S1'
453 comment => "construct Shrs: Shrs(a, b) = a >> b",
454 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "in_r1" ] },
455 emit => '. mov %D0, %S0, asr %S1'
460 # comment => "construct RotR: RotR(a, b) = a ROTR b",
461 # reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
462 # emit => '. mov %D0, %S0, ror %S1 /* RotR(%S0, %S1) -> %D0, (%A1, %A2) */'
463 ## emit => '. ror %S0, %S1, %D0'
468 # comment => "construct RotL: RotL(a, b) = a ROTL b",
469 # reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
470 # emit => '. rol %S0, %S1, %D0'
475 # comment => "construct RotL: RotL(a, const) = a ROTL const",
476 # reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
477 # emit => '. rol %S0, %C, %D0'
482 comment => "construct Mov: a = b",
483 attr => "arm_shift_modifier mod, tarval *shf",
484 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
485 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
486 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
487 emit => '. mov %D0, %S0%X'
492 comment => "represents an integer constant",
493 attr => "tarval *tv",
494 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
495 reg_req => { "out" => [ "gp" ] },
496 emit => '. mov %D0, %C',
497 cmp_attr => 'return attr_a->value != attr_b->value;'
502 comment => "construct Not: Not(a) = !a",
503 attr => "arm_shift_modifier mod, tarval *shf",
504 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
505 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
506 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
507 emit => '. mvn %D0, %S0%X'
512 comment => "represents a negated integer constant",
513 attr => "tarval *tv",
514 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
515 cmp_attr => 'return attr_a->value != attr_b->value;',
516 reg_req => { "out" => [ "gp" ] },
517 emit => '. mvn %D0, %C',
522 comment => "construct Abs: Abs(a) = |a|",
523 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
526 . rsbmi %D0, %S0, #0'
532 # this node produces ALWAYS an empty (tempary) gp reg and cannot be CSE'd
537 comment => "allocate an empty register for calculations",
538 reg_req => { "out" => [ "gp" ] },
539 emit => '. /* %D0 now available for calculations */',
540 cmp_attr => 'return 1;'
544 comment => "implements a register copy",
545 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
551 comment => "implements a memcopy: CopyB(dst, src, size, mem) == memcpy(dst, src, size)",
552 attr => "tarval *tv",
553 init_attr => 'attr->value = tv;',
554 reg_req => { "in" => [ "!sp", "!sp", "gp", "gp", "gp", "none" ], "out" => [ "none" ] },
561 comment => "represents a symbolic constant",
563 init_attr => "\tset_arm_symconst_id(res, id);",
564 reg_req => { "out" => [ "gp" ] },
565 attr_type => "arm_SymConst_attr_t",
571 comment => "construct conditional branch: CMP A, B && JMPxx LABEL",
573 attr => "int proj_num",
574 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
575 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "none", "none"] },
576 attr_type => "arm_CondJmp_attr_t",
582 comment => "construct switch",
584 attr => "int n_projs, long def_proj_num",
585 init_attr => "\tset_arm_SwitchJmp_n_projs(res, n_projs);\n".
586 "\tset_arm_SwitchJmp_default_proj_num(res, def_proj_num);",
587 reg_req => { "in" => [ "gp" ], "out" => [ "none" ] },
588 attr_type => "arm_SwitchJmp_attr_t",
596 state => "exc_pinned",
597 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
598 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
599 emit => '. ldr %D0, [%S0, #0]',
600 outs => [ "res", "M" ],
606 state => "exc_pinned",
607 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
608 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
609 emit => '. ldrb %D0, [%S0, #0]',
610 outs => [ "res", "M" ],
616 state => "exc_pinned",
617 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
618 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
619 emit => '. ldrsb %D0, [%S0, #0]',
620 outs => [ "res", "M" ],
626 state => "exc_pinned",
627 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
628 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
629 emit => '. ldrh %D0, [%S0, #0]',
630 outs => [ "res", "M" ],
636 state => "exc_pinned",
637 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
638 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
639 emit => '. ldrsh %D0, [%S0, #0]',
640 outs => [ "res", "M" ],
646 state => "exc_pinned",
647 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
648 reg_req => { "in" => [ "gp", "gp", "none" ], "out" => [ "none" ] },
649 emit => '. strb %S1, [%S0, #0]',
656 state => "exc_pinned",
657 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
658 reg_req => { "in" => [ "gp", "gp", "none" ], out => [ "none" ] },
659 emit => '. strh %S1, [%S0, #0]',
666 state => "exc_pinned",
667 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
668 reg_req => { "in" => [ "gp", "gp", "none" ], out => [ "none" ] },
669 emit => '. str %S1, [%S0, #0]',
676 state => "exc_pinned",
677 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
678 reg_req => { "in" => [ "sp", "gp", "gp", "gp", "gp", "none" ], "out" => [ "gp", "none" ] },
679 emit => '. stmfd %S0!, {%S1, %S2, %S3, %S4}',
680 outs => [ "ptr", "M" ],
686 state => "exc_pinned",
687 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
688 reg_req => { "in" => [ "sp", "none" ], "out" => [ "gp", "gp", "gp", "none" ] },
689 emit => '. ldmfd %S0, {%D0, %D1, %D2}',
690 outs => [ "res0", "res1", "res2", "M" ],
694 #---------------------------------------------------#
697 # | |_ _ __ __ _ _ __ ___ __| | ___ ___ #
698 # | _| '_ \ / _` | | '_ \ / _ \ / _` |/ _ \/ __| #
699 # | | | |_) | (_| | | | | | (_) | (_| | __/\__ \ #
700 # |_| | .__/ \__,_| |_| |_|\___/ \__,_|\___||___/ #
703 #---------------------------------------------------#
705 # commutative operations
710 comment => "construct FPA Add: Add(a, b) = Add(b, a) = a + b",
711 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
712 emit => '. adf%M %D0, %S0, %S1',
717 comment => "construct FPA Mul: Mul(a, b) = Mul(b, a) = a * b",
718 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
719 emit =>'. muf%M %D0, %S0, %S1',
724 comment => "construct FPA Fast Mul: Mul(a, b) = Mul(b, a) = a * b",
725 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
726 emit =>'. fml%M %D0, %S0, %S1',
732 comment => "construct FPA Max: Max(a, b) = Max(b, a) = a > b ? a : b",
733 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
734 emit =>'. fmax %S0, %S1, %D0',
740 comment => "construct FPA Min: Min(a, b) = Min(b, a) = a < b ? a : b",
741 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
742 emit =>'. fmin %S0, %S1, %D0',
745 # not commutative operations
749 comment => "construct FPA Sub: Sub(a, b) = a - b",
750 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
751 emit => '. suf%M %D0, %S0, %S1'
756 comment => "construct FPA reverse Sub: Sub(a, b) = b - a",
757 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
758 emit => '. rsf%M %D0, %S0, %S1'
762 comment => "construct FPA Div: Div(a, b) = a / b",
763 attr => "ir_mode *op_mode",
764 init_attr => "attr->op_mode = op_mode;",
765 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
766 emit =>'. dvf%M %D0, %S0, %S1',
767 outs => [ "res", "M" ],
771 comment => "construct FPA reverse Div: Div(a, b) = b / a",
772 attr => "ir_mode *op_mode",
773 init_attr => "attr->op_mode = op_mode;",
774 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
775 emit =>'. rdf%M %D0, %S0, %S1',
776 outs => [ "res", "M" ],
780 comment => "construct FPA Fast Div: Div(a, b) = a / b",
781 attr => "ir_mode *op_mode",
782 init_attr => "attr->op_mode = op_mode;",
783 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
784 emit =>'. fdv%M %D0, %S0, %S1',
785 outs => [ "res", "M" ],
789 comment => "construct FPA Fast reverse Div: Div(a, b) = b / a",
790 attr => "ir_mode *op_mode",
791 init_attr => "attr->op_mode = op_mode;",
792 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
793 emit =>'. frd%M %D0, %S0, %S1',
794 outs => [ "res", "M" ],
799 comment => "construct FPA Move: b = a",
800 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
801 emit => '. mvf%M %S0, %D0',
806 comment => "construct FPA Move Negated: b = -a",
807 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
808 emit => '. mnf%M %S0, %D0',
813 comment => "construct FPA Absolute value: fAbsd(a) = |a|",
814 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
815 emit => '. abs%M %D0, %S0',
822 comment => "construct a FPA integer->float conversion",
823 reg_req => { "in" => ["gp"], "out" => [ "fpa" ] },
824 emit => '. flt%M %D0, %S0',
829 comment => "construct a FPA float->integer conversion",
830 reg_req => { "in" => ["fpa"], "out" => [ "gp" ] },
831 emit => '. fix %D0, %S0',
837 comment => "construct floating point Compare and Branch: CMF A, B && JMPxx LABEL",
839 attr => "int proj_num",
840 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
841 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "none", "none"] },
842 attr_type => "arm_CondJmp_attr_t",
848 comment => "construct floating point Compare negative and Branch: CMF A, -B && JMPxx LABEL",
850 attr => "int proj_num",
851 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
852 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "none", "none"] },
853 attr_type => "arm_CondJmp_attr_t",
859 comment => "construct floating point Compare and Branch: CMF A, -B && JMPxx LABEL",
861 attr => "int proj_num",
862 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
863 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "none", "none"] },
864 attr_type => "arm_CondJmp_attr_t",
870 comment => "construct floating point Compare and Branch: CMF A, -B && JMPxx LABEL",
872 attr => "int proj_num",
873 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
874 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "none", "none"] },
875 attr_type => "arm_CondJmp_attr_t",
883 state => "exc_pinned",
884 comment => "construct FPA Load: Load(ptr, mem) = LD ptr",
885 attr => "ir_mode *op_mode",
886 init_attr => "attr->op_mode = op_mode;",
887 reg_req => { "in" => [ "gp", "none" ], "out" => [ "fpa", "none" ] },
888 emit => '. ldf%M %D0, [%S0]',
889 outs => [ "res", "M" ],
895 state => "exc_pinned",
896 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
897 attr => "ir_mode *op_mode",
898 init_attr => "attr->op_mode = op_mode;",
899 reg_req => { "in" => [ "gp", "fpa", "none" ], "out" => [ "none" ] },
900 emit => '. stf%M %S1, [%S0]',
907 comment => "construct fp double to 2 gp register transfer",
908 reg_req => { "in" => [ "fpa", "none" ], "out" => [ "gp", "gp", "none" ] },
909 outs => [ "low", "high", "M" ],
914 comment => "construct Add to stack pointer",
915 reg_req => { in => [ "sp", "gp", "none" ], out => [ "in_r1", "none" ] },
916 emit => '. add %D0, %S0, %S1',
917 outs => [ "stack:S", "M" ],
922 comment => "construct Sub from stack pointer",
923 reg_req => { in => [ "sp", "gp", "none" ], out => [ "in_r1", "none" ] },
924 emit => '. sub %D0, %S0, %S1',
925 outs => [ "stack:S", "M" ],
930 comment => "load the TLS address",
931 reg_req => { out => [ "gp" ] },
936 # floating point constants
941 comment => "construct a floating point constant",
942 attr => "tarval *tv",
943 init_attr => "attr->value = tv;",
944 mode => "get_tarval_mode(tv)",
945 reg_req => { "out" => [ "fpa" ] },
948 #---------------------------------------------------#
951 # __ _| |_ _ __ _ __ ___ __| | ___ ___ #
952 # \ \ / / _| '_ \ | '_ \ / _ \ / _` |/ _ \/ __| #
953 # \ V /| | | |_) | | | | | (_) | (_| | __/\__ \ #
954 # \_/ |_| | .__/ |_| |_|\___/ \__,_|\___||___/ #
957 #---------------------------------------------------#