3 # This is a template specification for the Firm-Backend
5 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
10 # the number of additional opcodes you want to register
11 #$additional_opcodes = 0;
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { "name" => "r0", "type" => 1 },
114 { "name" => "r1", "type" => 1 },
115 { "name" => "r2", "type" => 1 },
116 { "name" => "r3", "type" => 1 },
117 { "name" => "r4", "type" => 2 },
118 { "name" => "r5", "type" => 2 },
119 { "name" => "r6", "type" => 2 },
120 { "name" => "r7", "type" => 2 },
121 { "name" => "r8", "type" => 2 },
122 { "name" => "r9", "type" => 2 },
123 { "name" => "r10", "type" => 2 },
124 { "name" => "r11", "type" => 2 },
125 { "name" => "r12", "type" => 6 }, # reserved for linker
126 { "name" => "sp", "type" => 6 }, # this is our stack pointer
127 { "name" => "lr", "type" => 3 }, # this is our return address
128 { "name" => "pc", "type" => 6 }, # this is our program counter
129 { "mode" => "mode_Iu" }
132 { "name" => "f0", "type" => 1 },
133 { "name" => "f1", "type" => 1 },
134 { "name" => "f2", "type" => 1 },
135 { "name" => "f3", "type" => 1 },
136 { "name" => "f4", "type" => 1 },
137 { "name" => "f5", "type" => 1 },
138 { "name" => "f6", "type" => 1 },
139 { "name" => "f7", "type" => 1 },
140 { "mode" => "mode_E" }
145 M => "${arch}_emit_mode(env, node);",
146 X => "${arch}_emit_shift(env, node);",
147 S0 => "${arch}_emit_source_register(env, node, 0);",
148 S1 => "${arch}_emit_source_register(env, node, 1);",
149 S2 => "${arch}_emit_source_register(env, node, 2);",
150 S3 => "${arch}_emit_source_register(env, node, 3);",
151 S4 => "${arch}_emit_source_register(env, node, 4);",
152 D0 => "${arch}_emit_dest_register(env, node, 0);",
153 D1 => "${arch}_emit_dest_register(env, node, 1);",
154 D2 => "${arch}_emit_dest_register(env, node, 2);",
155 C => "${arch}_emit_immediate(env, node);",
156 O => "${arch}_emit_offset(env, mode);",
159 #--------------------------------------------------#
162 # _ __ _____ __ _ _ __ ___ _ __ ___ #
163 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
164 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
165 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
168 #--------------------------------------------------#
170 $default_attr_type = "arm_attr_t";
173 arm_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
174 arm_SymConst_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
175 arm_CondJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
176 arm_SwitchJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
180 arm_attr_t => "cmp_attr_arm",
181 arm_SymConst_attr_t => "cmp_attr_arm_SymConst",
182 arm_CondJmp_attr_t => "cmp_attr_arm_CondJmp",
183 arm_SwitchJmp_attr_t => "cmp_attr_arm_SwitchJmp",
188 #-----------------------------------------------------------------#
191 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
192 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
193 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
194 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
197 #-----------------------------------------------------------------#
199 # commutative operations
204 comment => "construct Add: Add(a, b) = Add(b, a) = a + b",
205 attr => "arm_shift_modifier mod, tarval *shf",
206 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
207 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
208 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
209 emit => '. add %D0, %S0, %S1%X'
214 comment => "construct Add: Add(a, const) = Add(const, a) = a + const",
215 attr => "tarval *tv",
216 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
217 cmp_attr => 'return attr_a->value != attr_b->value;',
218 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
219 emit => '. add %D0, %S0, %C'
225 comment => "construct Mul: Mul(a, b) = Mul(b, a) = a * b",
226 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "!in_r1" ] },
227 emit =>'. mul %D0, %S0, %S1'
233 comment => "construct signed 64bit Mul: Mul(a, b) = Mul(b, a) = a * b",
234 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp", "gp" ] },
235 emit =>'. smull %D0, %D1, %S0, %S1',
236 outs => [ "low", "high" ],
242 comment => "construct unsigned 64bit Mul: Mul(a, b) = Mul(b, a) = a * b",
243 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp", "gp" ] },
244 emit =>'. umull %D0, %D1, %S0, %S1',
245 outs => [ "low", "high" ],
251 comment => "construct Mla: Mla(a, b, c) = a * b + c",
252 reg_req => { "in" => [ "gp", "gp", "gp" ], "out" => [ "!in_r1" ] },
253 emit =>'. mla %D0, %S0, %S1, %S2'
259 comment => "construct And: And(a, b) = And(b, a) = a AND b",
260 attr => "arm_shift_modifier mod, tarval *shf",
261 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
262 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
263 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
264 emit => '. and %D0, %S0, %S1%X'
269 comment => "construct And: And(a, const) = And(const, a) = a AND const",
270 attr => "tarval *tv",
271 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
272 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
273 emit => '. and %D0, %S0, %C',
274 cmp_attr => 'return attr_a->value != attr_b->value;'
280 comment => "construct Or: Or(a, b) = Or(b, a) = a OR b",
281 attr => "arm_shift_modifier mod, tarval *shf",
282 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
283 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
284 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
285 emit => '. orr %D0, %S0, %S1%X'
290 comment => "construct Or: Or(a, const) = Or(const, a) = a OR const",
291 attr => "tarval *tv",
292 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
293 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
294 cmp_attr => 'return attr_a->value != attr_b->value;',
295 emit => '. orr %D0, %S0, %C'
301 comment => "construct Eor: Eor(a, b) = Eor(b, a) = a EOR b",
302 attr => "arm_shift_modifier mod, tarval *shf",
303 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
304 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
305 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
306 emit => '. eor %D0, %S0, %S1%X'
311 comment => "construct Eor: Eor(a, const) = Eor(const, a) = a EOR const",
312 attr => "tarval *tv",
313 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
314 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
315 cmp_attr => 'return attr_a->value != attr_b->value;',
316 emit => '. eor %D0, %S0, %C'
319 # not commutative operations
323 comment => "construct Bic: Bic(a, b) = a AND ~b",
324 attr => "arm_shift_modifier mod, tarval *shf",
325 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
326 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
327 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
328 emit => '. bic %D0, %S0, %S1%X'
333 comment => "construct Bic: Bic(a, const) = a AND ~const",
334 attr => "tarval *tv",
335 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
336 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
337 emit => '. bic %D0, %S0, %C',
338 cmp_attr => 'return attr_a->value != attr_b->value;'
343 comment => "construct Sub: Sub(a, b) = a - b",
344 attr => "arm_shift_modifier mod, tarval *shf",
345 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
346 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
347 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
348 emit => '. sub %D0, %S0, %S1%X'
353 comment => "construct Sub: Sub(a, const) = a - const",
354 attr => "tarval *tv",
355 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
356 cmp_attr => 'return attr_a->value != attr_b->value;',
357 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
358 emit => '. sub %D0, %S0, %C',
363 comment => "construct Rsb: Rsb(a, b) = b - a",
364 attr => "arm_shift_modifier mod, tarval *shf",
365 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
366 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
367 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
368 emit => '. rsb %D0, %S0, %S1%X'
373 comment => "construct Rsb: Rsb(a, const) = const - a",
374 attr => "tarval *tv",
375 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
376 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
377 emit => '. rsb %D0, %S0, %C',
378 cmp_attr => 'return attr_a->value != attr_b->value;'
383 comment => "construct Shl: Shl(a, b) = a << b",
384 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
385 emit => '. mov %D0, %S0, lsl %S1'
390 comment => "construct Shr: Shr(a, b) = a >> b",
391 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "in_r1" ] },
392 emit => '. mov %D0, %S0, lsr %S1'
397 comment => "construct Shrs: Shrs(a, b) = a >> b",
398 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "in_r1" ] },
399 emit => '. mov %D0, %S0, asr %S1'
404 # comment => "construct RotR: RotR(a, b) = a ROTR b",
405 # reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
406 # emit => '. mov %D0, %S0, ror %S1 /* RotR(%S0, %S1) -> %D0, (%A1, %A2) */'
407 ## emit => '. ror %S0, %S1, %D0'
412 # comment => "construct RotL: RotL(a, b) = a ROTL b",
413 # reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
414 # emit => '. rol %S0, %S1, %D0'
419 # comment => "construct RotL: RotL(a, const) = a ROTL const",
420 # reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
421 # emit => '. rol %S0, %C, %D0'
426 comment => "construct Mov: a = b",
427 attr => "arm_shift_modifier mod, tarval *shf",
428 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
429 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
430 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
431 emit => '. mov %D0, %S0%X'
436 comment => "represents an integer constant",
437 attr => "tarval *tv",
438 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
439 reg_req => { "out" => [ "gp" ] },
440 emit => '. mov %D0, %C',
441 cmp_attr => 'return attr_a->value != attr_b->value;'
446 comment => "construct Not: Not(a) = !a",
447 attr => "arm_shift_modifier mod, tarval *shf",
448 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
449 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
450 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
451 emit => '. mvn %D0, %S0%X'
456 comment => "represents a negated integer constant",
457 attr => "tarval *tv",
458 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
459 cmp_attr => 'return attr_a->value != attr_b->value;',
460 reg_req => { "out" => [ "gp" ] },
461 emit => '. mvn %D0, %C',
466 comment => "construct Abs: Abs(a) = |a|",
467 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
470 . rsbmi %D0, %S0, #0'
476 # this node produces ALWAYS an empty (tempary) gp reg and cannot be CSE'd
481 comment => "allocate an empty register for calculations",
482 reg_req => { "out" => [ "gp" ] },
483 emit => '. /* %D0 now available for calculations */',
484 cmp_attr => 'return 1;'
488 comment => "implements a register copy",
489 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
495 comment => "implements a memcopy: CopyB(dst, src, size, mem) == memcpy(dst, src, size)",
496 attr => "tarval *tv",
497 init_attr => 'attr->value = tv;',
498 reg_req => { "in" => [ "!sp", "!sp", "gp", "gp", "gp", "none" ], "out" => [ "none" ] },
505 comment => "represents a symbolic constant",
507 init_attr => "\tset_arm_symconst_id(res, id);",
508 reg_req => { "out" => [ "gp" ] },
509 attr_type => "arm_SymConst_attr_t",
515 comment => "construct conditional jump: CMP A, B && JMPxx LABEL",
517 attr => "int proj_num",
518 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
519 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "none", "none"] },
520 attr_type => "arm_CondJmp_attr_t",
526 comment => "construct switch",
528 attr => "int n_projs, long def_proj_num",
529 init_attr => "\tset_arm_SwitchJmp_n_projs(res, n_projs);\n".
530 "\tset_arm_SwitchJmp_default_proj_num(res, def_proj_num);",
531 reg_req => { "in" => [ "gp" ], "out" => [ "none" ] },
532 attr_type => "arm_SwitchJmp_attr_t",
540 state => "exc_pinned",
541 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
542 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
543 emit => '. ldr %D0, [%S0, #0]',
544 outs => [ "res", "M" ],
550 state => "exc_pinned",
551 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
552 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
553 emit => '. ldrb %D0, [%S0, #0]',
554 outs => [ "res", "M" ],
560 state => "exc_pinned",
561 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
562 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
563 emit => '. ldrsb %D0, [%S0, #0]',
564 outs => [ "res", "M" ],
570 state => "exc_pinned",
571 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
572 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
573 emit => '. ldrh %D0, [%S0, #0]',
574 outs => [ "res", "M" ],
580 state => "exc_pinned",
581 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
582 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
583 emit => '. ldrsh %D0, [%S0, #0]',
584 outs => [ "res", "M" ],
590 state => "exc_pinned",
591 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
592 reg_req => { "in" => [ "gp", "gp", "none" ], "out" => [ "none" ] },
593 emit => '. strb %S1, [%S0, #0]',
600 state => "exc_pinned",
601 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
602 reg_req => { "in" => [ "gp", "gp", "none" ], out => [ "none" ] },
603 emit => '. strh %S1, [%S0, #0]',
610 state => "exc_pinned",
611 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
612 reg_req => { "in" => [ "gp", "gp", "none" ], out => [ "none" ] },
613 emit => '. str %S1, [%S0, #0]',
620 state => "exc_pinned",
621 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
622 reg_req => { "in" => [ "sp", "gp", "gp", "gp", "gp", "none" ], "out" => [ "gp", "none" ] },
623 emit => '. stmfd %S0!, {%S1, %S2, %S3, %S4}',
624 outs => [ "ptr", "M" ],
630 state => "exc_pinned",
631 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
632 reg_req => { "in" => [ "sp", "none" ], "out" => [ "gp", "gp", "gp", "none" ] },
633 emit => '. ldmfd %S0, {%D0, %D1, %D2}',
634 outs => [ "res0", "res1", "res2", "M" ],
638 #---------------------------------------------------#
641 # | |_ _ __ __ _ _ __ ___ __| | ___ ___ #
642 # | _| '_ \ / _` | | '_ \ / _ \ / _` |/ _ \/ __| #
643 # | | | |_) | (_| | | | | | (_) | (_| | __/\__ \ #
644 # |_| | .__/ \__,_| |_| |_|\___/ \__,_|\___||___/ #
647 #---------------------------------------------------#
649 # commutative operations
654 comment => "construct FPA Add: Add(a, b) = Add(b, a) = a + b",
655 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
656 emit => '. adf%M %D0, %S0, %S1',
661 comment => "construct FPA Mul: Mul(a, b) = Mul(b, a) = a * b",
662 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
663 emit =>'. muf%M %D0, %S0, %S1',
668 comment => "construct FPA Fast Mul: Mul(a, b) = Mul(b, a) = a * b",
669 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
670 emit =>'. fml%M %D0, %S0, %S1',
676 comment => "construct FPA Max: Max(a, b) = Max(b, a) = a > b ? a : b",
677 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
678 emit =>'. fmax %S0, %S1, %D0',
684 comment => "construct FPA Min: Min(a, b) = Min(b, a) = a < b ? a : b",
685 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
686 emit =>'. fmin %S0, %S1, %D0',
689 # not commutative operations
693 comment => "construct FPA Sub: Sub(a, b) = a - b",
694 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
695 emit => '. suf%M %D0, %S0, %S1'
700 comment => "construct FPA reverse Sub: Sub(a, b) = b - a",
701 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
702 emit => '. rsf%M %D0, %S0, %S1'
706 comment => "construct FPA Div: Div(a, b) = a / b",
707 attr => "ir_mode *op_mode",
708 init_attr => "attr->op_mode = op_mode;",
709 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
710 emit =>'. dvf%M %D0, %S0, %S1',
711 outs => [ "res", "M" ],
715 comment => "construct FPA reverse Div: Div(a, b) = b / a",
716 attr => "ir_mode *op_mode",
717 init_attr => "attr->op_mode = op_mode;",
718 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
719 emit =>'. rdf%M %D0, %S0, %S1',
720 outs => [ "res", "M" ],
724 comment => "construct FPA Fast Div: Div(a, b) = a / b",
725 attr => "ir_mode *op_mode",
726 init_attr => "attr->op_mode = op_mode;",
727 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
728 emit =>'. fdv%M %D0, %S0, %S1',
729 outs => [ "res", "M" ],
733 comment => "construct FPA Fast reverse Div: Div(a, b) = b / a",
734 attr => "ir_mode *op_mode",
735 init_attr => "attr->op_mode = op_mode;",
736 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
737 emit =>'. frd%M %D0, %S0, %S1',
738 outs => [ "res", "M" ],
743 comment => "construct FPA Move: b = a",
744 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
745 emit => '. mvf%M %S0, %D0',
750 comment => "construct FPA Move Negated: b = -a",
751 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
752 emit => '. mnf%M %S0, %D0',
757 comment => "construct FPA Absolute value: fAbsd(a) = |a|",
758 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
759 emit => '. abs%M %D0, %S0',
766 comment => "construct a FPA integer->float conversion",
767 reg_req => { "in" => ["gp"], "out" => [ "fpa" ] },
768 emit => '. flt%M %D0, %S0',
773 comment => "construct a FPA float->integer conversion",
774 reg_req => { "in" => ["fpa"], "out" => [ "gp" ] },
775 emit => '. fix %D0, %S0',
783 state => "exc_pinned",
784 comment => "construct FPA Load: Load(ptr, mem) = LD ptr",
785 attr => "ir_mode *op_mode",
786 init_attr => "attr->op_mode = op_mode;",
787 reg_req => { "in" => [ "gp", "none" ], "out" => [ "fpa", "none" ] },
788 emit => '. ldf%M %D0, [%S0, #0]',
789 outs => [ "res", "M" ],
795 state => "exc_pinned",
796 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
797 attr => "ir_mode *op_mode",
798 init_attr => "attr->op_mode = op_mode;",
799 reg_req => { "in" => [ "gp", "fpa", "none" ], "out" => [ "none" ] },
800 emit => '. stf%M [%S1, #0], %S0',
807 comment => "construct fp double to 2 gp register transfer",
808 reg_req => { "in" => [ "fpa", "none" ], "out" => [ "gp", "gp", "none" ] },
809 outs => [ "low", "high", "M" ],
814 comment => "construct Add to stack pointer",
815 reg_req => { in => [ "sp", "gp", "none" ], out => [ "in_r1", "none" ] },
816 emit => '. add %D0, %S0, %S1',
817 outs => [ "stack:S", "M" ],
822 comment => "construct Sub from stack pointer",
823 reg_req => { in => [ "sp", "gp", "none" ], out => [ "in_r1", "none" ] },
824 emit => '. sub %D0, %S0, %S1',
825 outs => [ "stack:S", "M" ],
830 comment => "load the TLS address",
831 reg_req => { out => [ "gp" ] },
836 # floating point constants
841 comment => "construct a floating point constant",
842 attr => "tarval *tv",
843 init_attr => "attr->value = tv;",
844 mode => "get_tarval_mode(tv)",
845 reg_req => { "out" => [ "fpa" ] },
848 #---------------------------------------------------#
851 # __ _| |_ _ __ _ __ ___ __| | ___ ___ #
852 # \ \ / / _| '_ \ | '_ \ / _ \ / _` |/ _ \/ __| #
853 # \ V /| | | |_) | | | | | (_) | (_| | __/\__ \ #
854 # \_/ |_| | .__/ |_| |_|\___/ \__,_|\___||___/ #
857 #---------------------------------------------------#