3 # This is a template specification for the Firm-Backend
5 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
10 # the number of additional opcodes you want to register
11 #$additional_opcodes = 0;
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
105 $mode_gp = "mode_Iu";
106 $mode_fpa = "mode_E";
109 $normal = 0; # no special type
110 $caller_save = 1; # caller save (register must be saved by the caller of a function)
111 $callee_save = 2; # callee save (register must be saved by the called function)
112 $ignore = 4; # ignore (do not assign this register)
113 $arbitrary = 8; # emitter can choose an arbitrary register of this class
114 $virtual = 16; # the register is a virtual one
115 $state = 32; # register represents a state
116 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
119 { "name" => "r0", "type" => $caller_save },
120 { "name" => "r1", "type" => $caller_save },
121 { "name" => "r2", "type" => $caller_save },
122 { "name" => "r3", "type" => $caller_save },
123 { "name" => "r4", "type" => $callee_save },
124 { "name" => "r5", "type" => $callee_save },
125 { "name" => "r6", "type" => $callee_save },
126 { "name" => "r7", "type" => $callee_save },
127 { "name" => "r8", "type" => $callee_save },
128 { "name" => "r9", "type" => $callee_save },
129 { "name" => "r10", "type" => $callee_save },
130 { "name" => "r11", "type" => $callee_save },
131 { "name" => "r12", "type" => $ignore | $callee_save }, # reserved for linker
132 { "name" => "sp", "type" => $ignore | $callee_save }, # this is our stack pointer
133 { "name" => "lr", "type" => $callee_save | $caller_save }, # this is our return address
134 { "name" => "pc", "type" => $ignore | $callee_save }, # this is our program counter
135 { name => "gp_UKNWN", type => $ignore | $arbitrary | $virtual }, # we need a dummy register for Unknown nodes
136 { "mode" => $mode_gp }
139 { "name" => "f0", "type" => 1 },
140 { "name" => "f1", "type" => 1 },
141 { "name" => "f2", "type" => 1 },
142 { "name" => "f3", "type" => 1 },
143 { "name" => "f4", "type" => 1 },
144 { "name" => "f5", "type" => 1 },
145 { "name" => "f6", "type" => 1 },
146 { "name" => "f7", "type" => 1 },
147 { name => "fpa_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
148 { "mode" => $mode_fpa }
153 M => "${arch}_emit_mode(node);",
154 X => "${arch}_emit_shift(node);",
155 S0 => "${arch}_emit_source_register(node, 0);",
156 S1 => "${arch}_emit_source_register(node, 1);",
157 S2 => "${arch}_emit_source_register(node, 2);",
158 S3 => "${arch}_emit_source_register(node, 3);",
159 S4 => "${arch}_emit_source_register(node, 4);",
160 D0 => "${arch}_emit_dest_register(node, 0);",
161 D1 => "${arch}_emit_dest_register(node, 1);",
162 D2 => "${arch}_emit_dest_register(node, 2);",
163 C => "${arch}_emit_immediate(node);",
164 O => "${arch}_emit_offset(mode);",
167 #--------------------------------------------------#
170 # _ __ _____ __ _ _ __ ___ _ __ ___ #
171 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
172 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
173 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
176 #--------------------------------------------------#
178 $default_attr_type = "arm_attr_t";
179 $default_copy_attr = "arm_copy_attr";
182 arm_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
183 arm_SymConst_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
184 arm_CondJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
185 arm_SwitchJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
186 arm_fpaConst_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
190 arm_attr_t => "cmp_attr_arm",
191 arm_SymConst_attr_t => "cmp_attr_arm_SymConst",
192 arm_CondJmp_attr_t => "cmp_attr_arm_CondJmp",
193 arm_SwitchJmp_attr_t => "cmp_attr_arm_SwitchJmp",
194 arm_fpaConst_attr_t => "cmp_attr_arm_fpaConst",
200 # comment => "blup di dup",
202 # emit => ". [%S0]-10",
204 # attr => "tarval *tv",
205 # init_attr => "(void) attri;",
207 # # cmp => "return 1;"
213 # reg_req => { in => [ "gp" ] },
214 # attr => "tarval *tv",
215 # init_attr => "(void) tv;",
221 # reg_req => { in => [ "gp", "gp" ] },
232 reg_req => { out => [ "gp_UKNWN" ] },
241 reg_req => { out => [ "fpa_UKNWN" ] },
246 #-----------------------------------------------------------------#
249 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
250 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
251 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
252 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
255 #-----------------------------------------------------------------#
257 # commutative operations
262 comment => "construct Add: Add(a, b) = Add(b, a) = a + b",
263 attr => "arm_shift_modifier mod, long shf",
264 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
265 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
266 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
267 emit => '. add %D0, %S0, %S1%X'
272 comment => "construct Add: Add(a, const) = Add(const, a) = a + const",
274 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
275 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
276 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
277 emit => '. add %D0, %S0, %C'
283 comment => "construct Mul: Mul(a, b) = Mul(b, a) = a * b",
284 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "!in_r1" ] },
285 emit =>'. mul %D0, %S0, %S1'
291 comment => "construct signed 64bit Mul: Mul(a, b) = Mul(b, a) = a * b",
292 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp", "gp" ] },
293 emit =>'. smull %D0, %D1, %S0, %S1',
294 outs => [ "low", "high" ],
300 comment => "construct unsigned 64bit Mul: Mul(a, b) = Mul(b, a) = a * b",
301 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp", "gp" ] },
302 emit =>'. umull %D0, %D1, %S0, %S1',
303 outs => [ "low", "high" ],
309 comment => "construct Mla: Mla(a, b, c) = a * b + c",
310 reg_req => { "in" => [ "gp", "gp", "gp" ], "out" => [ "!in_r1" ] },
311 emit =>'. mla %D0, %S0, %S1, %S2'
317 comment => "construct And: And(a, b) = And(b, a) = a AND b",
318 attr => "arm_shift_modifier mod, long shf",
319 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
320 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
321 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
322 emit => '. and %D0, %S0, %S1%X'
327 comment => "construct And: And(a, const) = And(const, a) = a AND const",
329 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
330 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
331 emit => '. and %D0, %S0, %C',
332 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
338 comment => "construct Or: Or(a, b) = Or(b, a) = a OR b",
339 attr => "arm_shift_modifier mod, long shf",
340 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
341 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
342 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
343 emit => '. orr %D0, %S0, %S1%X'
348 comment => "construct Or: Or(a, const) = Or(const, a) = a OR const",
350 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
351 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
352 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
353 emit => '. orr %D0, %S0, %C'
359 comment => "construct Eor: Eor(a, b) = Eor(b, a) = a EOR b",
360 attr => "arm_shift_modifier mod, long shf",
361 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
362 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
363 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
364 emit => '. eor %D0, %S0, %S1%X'
369 comment => "construct Eor: Eor(a, const) = Eor(const, a) = a EOR const",
371 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
372 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
373 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
374 emit => '. eor %D0, %S0, %C'
377 # not commutative operations
381 comment => "construct Bic: Bic(a, b) = a AND ~b",
382 attr => "arm_shift_modifier mod, long shf",
383 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
384 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
385 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
386 emit => '. bic %D0, %S0, %S1%X'
391 comment => "construct Bic: Bic(a, const) = a AND ~const",
393 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
394 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
395 emit => '. bic %D0, %S0, %C',
396 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
401 comment => "construct Sub: Sub(a, b) = a - b",
402 attr => "arm_shift_modifier mod, long shf",
403 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
404 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
405 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
406 emit => '. sub %D0, %S0, %S1%X'
411 comment => "construct Sub: Sub(a, const) = a - const",
413 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
414 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
415 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
416 emit => '. sub %D0, %S0, %C',
421 comment => "construct Rsb: Rsb(a, b) = b - a",
422 attr => "arm_shift_modifier mod, long shf",
423 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
424 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
425 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
426 emit => '. rsb %D0, %S0, %S1%X'
431 comment => "construct Rsb: Rsb(a, const) = const - a",
433 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
434 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
435 emit => '. rsb %D0, %S0, %C',
436 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
441 comment => "construct Shl: Shl(a, b) = a << b",
442 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
443 emit => '. mov %D0, %S0, lsl %S1'
448 comment => "construct Shr: Shr(a, b) = a >>u b",
449 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
450 emit => '. mov %D0, %S0, lsr %S1'
455 comment => "construct Shrs: Shrs(a, b) = a >>s b",
456 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
457 emit => '. mov %D0, %S0, asr %S1'
462 comment => "construct Ror: Ror(a, b) = a <<r>> b",
463 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
464 emit => '. mov %D0, %S0, ror %S1'
469 # comment => "construct RotL: RotL(a, b) = a ROTL b",
470 # reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
471 # emit => '. rol %S0, %S1, %D0'
476 # comment => "construct RotL: RotL(a, const) = a ROTL const",
477 # reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
478 # emit => '. rol %S0, %C, %D0'
483 comment => "construct Mov: a = b",
484 attr => "arm_shift_modifier mod, long shf",
485 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
486 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
487 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
488 emit => '. mov %D0, %S0%X'
493 comment => "represents an integer constant",
495 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
496 reg_req => { "out" => [ "gp" ] },
497 emit => '. mov %D0, %C',
498 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
503 comment => "construct Not: Not(a) = !a",
504 attr => "arm_shift_modifier mod, long shf",
505 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
506 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
507 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
508 emit => '. mvn %D0, %S0%X'
513 comment => "represents a negated integer constant",
515 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
516 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
517 reg_req => { "out" => [ "gp" ] },
518 emit => '. mvn %D0, %C',
523 comment => "construct Abs: Abs(a) = |a|",
524 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
527 . rsbmi %D0, %S0, #0'
533 # this node produces ALWAYS an empty (tempary) gp reg and cannot be CSE'd
538 comment => "allocate an empty register for calculations",
539 reg_req => { "out" => [ "gp" ] },
540 emit => '. /* %D0 now available for calculations */',
541 cmp_attr => 'return 1;'
545 comment => "implements a register copy",
546 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
552 comment => "implements a memcopy: CopyB(dst, src, size, mem) == memcpy(dst, src, size)",
554 init_attr => 'attr->imm_value = imm;',
555 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
556 reg_req => { "in" => [ "!sp", "!sp", "gp", "gp", "gp", "none" ], "out" => [ "none" ] },
563 comment => "represents a symbolic constant",
565 init_attr => "\tset_arm_symconst_id(res, id);",
566 reg_req => { "out" => [ "gp" ] },
567 attr_type => "arm_SymConst_attr_t",
573 comment => "construct conditional branch: CMP A, B && JMPxx LABEL",
575 attr => "int proj_num",
576 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
577 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "none", "none"] },
578 attr_type => "arm_CondJmp_attr_t",
584 comment => "construct conditional branch: TST A, B && JMPxx LABEL",
586 attr => "int proj_num",
587 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
588 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "none", "none"] },
589 attr_type => "arm_CondJmp_attr_t",
595 comment => "construct switch",
597 attr => "int n_projs, long def_proj_num",
598 init_attr => "\tset_arm_SwitchJmp_n_projs(res, n_projs);\n".
599 "\tset_arm_SwitchJmp_default_proj_num(res, def_proj_num);",
600 reg_req => { "in" => [ "gp" ], "out" => [ "none" ] },
601 attr_type => "arm_SwitchJmp_attr_t",
609 state => "exc_pinned",
610 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
611 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
612 emit => '. ldr %D0, [%S0, #0]',
613 outs => [ "res", "M" ],
619 state => "exc_pinned",
620 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
621 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
622 emit => '. ldrb %D0, [%S0, #0]',
623 outs => [ "res", "M" ],
629 state => "exc_pinned",
630 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
631 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
632 emit => '. ldrsb %D0, [%S0, #0]',
633 outs => [ "res", "M" ],
639 state => "exc_pinned",
640 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
641 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
642 emit => '. ldrh %D0, [%S0, #0]',
643 outs => [ "res", "M" ],
649 state => "exc_pinned",
650 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
651 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
652 emit => '. ldrsh %D0, [%S0, #0]',
653 outs => [ "res", "M" ],
659 state => "exc_pinned",
660 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
661 reg_req => { "in" => [ "gp", "gp", "none" ], "out" => [ "none" ] },
662 emit => '. strb %S1, [%S0, #0]',
669 state => "exc_pinned",
670 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
671 reg_req => { "in" => [ "gp", "gp", "none" ], out => [ "none" ] },
672 emit => '. strh %S1, [%S0, #0]',
679 state => "exc_pinned",
680 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
681 reg_req => { "in" => [ "gp", "gp", "none" ], out => [ "none" ] },
682 emit => '. str %S1, [%S0, #0]',
689 state => "exc_pinned",
690 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
691 reg_req => { "in" => [ "sp", "gp", "gp", "gp", "gp", "none" ], "out" => [ "gp", "none" ] },
692 emit => '. stmfd %S0!, {%S1, %S2, %S3, %S4}',
693 outs => [ "ptr", "M" ],
699 state => "exc_pinned",
700 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
701 reg_req => { "in" => [ "sp", "none" ], "out" => [ "gp", "gp", "gp", "none" ] },
702 emit => '. ldmfd %S0, {%D0, %D1, %D2}',
703 outs => [ "res0", "res1", "res2", "M" ],
707 #---------------------------------------------------#
710 # | |_ _ __ __ _ _ __ ___ __| | ___ ___ #
711 # | _| '_ \ / _` | | '_ \ / _ \ / _` |/ _ \/ __| #
712 # | | | |_) | (_| | | | | | (_) | (_| | __/\__ \ #
713 # |_| | .__/ \__,_| |_| |_|\___/ \__,_|\___||___/ #
716 #---------------------------------------------------#
718 # commutative operations
723 comment => "construct FPA Add: Add(a, b) = Add(b, a) = a + b",
724 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
725 emit => '. adf%M %D0, %S0, %S1',
730 comment => "construct FPA Add: Add(a, b) = Add(b, a) = a + b",
732 init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
733 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
734 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
735 emit => '. adf%M %D0, %S0, %C',
741 comment => "construct FPA Mul: Mul(a, b) = Mul(b, a) = a * b",
742 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
743 emit =>'. muf%M %D0, %S0, %S1',
748 comment => "construct FPA Mul: Mul(a, b) = Mul(b, a) = a * b",
750 init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
751 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
752 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
753 emit => '. muf%M %D0, %S0, %C',
759 comment => "construct FPA Fast Mul: Mul(a, b) = Mul(b, a) = a * b",
760 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
761 emit =>'. fml%M %D0, %S0, %S1',
767 comment => "construct FPA Max: Max(a, b) = Max(b, a) = a > b ? a : b",
768 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
769 emit =>'. fmax %S0, %S1, %D0',
775 comment => "construct FPA Min: Min(a, b) = Min(b, a) = a < b ? a : b",
776 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
777 emit =>'. fmin %S0, %S1, %D0',
780 # not commutative operations
784 comment => "construct FPA Sub: Sub(a, b) = a - b",
785 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
786 emit => '. suf%M %D0, %S0, %S1'
791 comment => "construct FPA Sub: Sub(a, b) = a - b",
793 init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
794 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
795 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
796 emit => '. suf%M %D0, %S0, %C'
801 comment => "construct FPA reverse Sub: Sub(a, b) = b - a",
802 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
803 emit => '. rsf%M %D0, %S0, %S1'
808 comment => "construct FPA reverse Sub: Sub(a, b) = b - a",
810 init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
811 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
812 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
813 emit => '. rsf%M %D0, %S0, %C'
817 comment => "construct FPA Div: Div(a, b) = a / b",
818 attr => "ir_mode *op_mode",
819 init_attr => "attr->op_mode = op_mode;",
820 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
821 emit =>'. dvf%M %D0, %S0, %S1',
822 outs => [ "res", "M" ],
826 comment => "construct FPA Div: Div(a, b) = a / b",
827 attr => "ir_mode *op_mode, long imm",
828 init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
829 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
830 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
831 emit =>'. dvf%M %D0, %S0, %C',
832 outs => [ "res", "M" ],
836 comment => "construct FPA reverse Div: Div(a, b) = b / a",
837 attr => "ir_mode *op_mode",
838 init_attr => "attr->op_mode = op_mode;",
839 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
840 emit =>'. rdf%M %D0, %S0, %S1',
841 outs => [ "res", "M" ],
845 comment => "construct FPA reverse Div: Div(a, b) = b / a",
846 attr => "ir_mode *op_mode, long imm",
847 init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
848 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
849 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
850 emit =>'. rdf%M %D0, %S0, %S1',
851 outs => [ "res", "M" ],
855 comment => "construct FPA Fast Div: Div(a, b) = a / b",
856 attr => "ir_mode *op_mode",
857 init_attr => "attr->op_mode = op_mode;",
858 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
859 emit =>'. fdv%M %D0, %S0, %S1',
860 outs => [ "res", "M" ],
864 comment => "construct FPA Fast Div: Div(a, b) = a / b",
865 attr => "ir_mode *op_mode, long imm",
866 init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
867 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
868 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
869 emit =>'. fdv%M %D0, %S0, %C',
870 outs => [ "res", "M" ],
874 comment => "construct FPA Fast reverse Div: Div(a, b) = b / a",
875 attr => "ir_mode *op_mode",
876 init_attr => "attr->op_mode = op_mode;",
877 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
878 emit =>'. frd%M %D0, %S0, %S1',
879 outs => [ "res", "M" ],
883 comment => "construct FPA Fast reverse Div: Div(a, b) = b / a",
884 attr => "ir_mode *op_mode, long imm",
885 init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
886 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
887 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
888 emit =>'. frd%M %D0, %S0, %C',
889 outs => [ "res", "M" ],
894 comment => "construct FPA Move: b = a",
895 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
896 emit => '. mvf%M %S0, %D0',
901 comment => "represents a float constant",
903 init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
904 reg_req => { "out" => [ "fpa" ] },
905 emit => '. mvf%M %D0, %C',
906 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
911 comment => "construct FPA Move Negated: b = -a",
912 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
913 emit => '. mnf%M %S0, %D0',
918 comment => "represents a float constant",
920 init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
921 reg_req => { "out" => [ "fpa" ] },
922 emit => '. mnf%M %D0, %C',
923 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
928 comment => "construct FPA Absolute value: fAbsd(a) = |a|",
929 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
930 emit => '. abs%M %D0, %S0',
937 comment => "construct a FPA integer->float conversion",
938 reg_req => { "in" => ["gp"], "out" => [ "fpa" ] },
939 emit => '. flt%M %D0, %S0',
944 comment => "construct a FPA float->integer conversion",
945 reg_req => { "in" => ["fpa"], "out" => [ "gp" ] },
946 emit => '. fix %D0, %S0',
952 comment => "construct floating point Compare and Branch: CMF A, B && JMPxx LABEL",
954 attr => "int proj_num",
955 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
956 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "none", "none"] },
957 attr_type => "arm_CondJmp_attr_t",
963 comment => "construct floating point Compare negative and Branch: CMF A, -B && JMPxx LABEL",
965 attr => "int proj_num",
966 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
967 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "none", "none"] },
968 attr_type => "arm_CondJmp_attr_t",
974 comment => "construct floating point Compare and Branch: CMF A, -B && JMPxx LABEL",
976 attr => "int proj_num",
977 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
978 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "none", "none"] },
979 attr_type => "arm_CondJmp_attr_t",
985 comment => "construct floating point Compare and Branch: CMF A, -B && JMPxx LABEL",
987 attr => "int proj_num",
988 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
989 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "none", "none"] },
990 attr_type => "arm_CondJmp_attr_t",
998 state => "exc_pinned",
999 comment => "construct FPA Load: Load(ptr, mem) = LD ptr",
1000 attr => "ir_mode *op_mode",
1001 init_attr => "attr->op_mode = op_mode;",
1002 reg_req => { "in" => [ "gp", "none" ], "out" => [ "fpa", "none" ] },
1003 emit => '. ldf%M %D0, [%S0]',
1004 outs => [ "res", "M" ],
1010 state => "exc_pinned",
1011 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
1012 attr => "ir_mode *op_mode",
1013 init_attr => "attr->op_mode = op_mode;",
1014 reg_req => { "in" => [ "gp", "fpa", "none" ], "out" => [ "none" ] },
1015 emit => '. stf%M %S1, [%S0]',
1022 comment => "construct fp double to 2 gp register transfer",
1023 reg_req => { "in" => [ "fpa", "none" ], "out" => [ "gp", "gp", "none" ] },
1024 outs => [ "low", "high", "M" ],
1029 comment => "construct Add to stack pointer",
1030 reg_req => { in => [ "sp", "gp", "none" ], out => [ "in_r1", "none" ] },
1031 emit => '. add %D0, %S0, %S1',
1032 outs => [ "stack:I|S", "M" ],
1037 comment => "construct Sub from stack pointer and copy to Register",
1038 reg_req => { in => [ "sp", "gp", "none" ], out => [ "in_r1", "gp", "none" ] },
1039 ins => [ "stack", "size", "mem" ],
1040 emit => ". sub %D0, %S0, %S1\n".
1042 outs => [ "stack:I|S", "addr", "M" ],
1047 comment => "load the TLS address",
1048 reg_req => { out => [ "gp" ] },
1053 # floating point constants
1058 comment => "construct a floating point constant",
1059 attr => "tarval *tv",
1060 init_attr => "attr->tv = tv;",
1061 mode => "get_tarval_mode(tv)",
1062 reg_req => { "out" => [ "fpa" ] },
1063 attr_type => "arm_fpaConst_attr_t",
1066 #---------------------------------------------------#
1069 # __ _| |_ _ __ _ __ ___ __| | ___ ___ #
1070 # \ \ / / _| '_ \ | '_ \ / _ \ / _` |/ _ \/ __| #
1071 # \ V /| | | |_) | | | | | (_) | (_| | __/\__ \ #
1072 # \_/ |_| | .__/ |_| |_|\___/ \__,_|\___||___/ #
1075 #---------------------------------------------------#