3 # This is a template specification for the Firm-Backend
5 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
10 # the number of additional opcodes you want to register
11 #$additional_opcodes = 0;
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # outs => { "out1", "out2" } # optional, creates pn_op_out1, ... consts
32 # ins => { "in1", "in2" } # optional, creates n_op_in1, ... consts
33 # mode => "mode_Iu" # optional, predefines the mode
34 # emit => "emit code with templates",
35 # attr => "attitional attribute arguments for constructor",
36 # init_attr => "emit attribute initialization template",
37 # rd_constructor => "c source code which constructs an ir_node"
38 # hash_func => "name of the hash function for this operation",
39 # latency => "latency of this operation (can be float)"
40 # attr_type => "name of the attribute struct",
43 # ... # (all nodes you need to describe)
45 # ); # close the %nodes initializer
47 # op_flags: flags for the operation, OPTIONAL (default is "N")
48 # the op_flags correspond to the firm irop_flags:
51 # C irop_flag_commutative
52 # X irop_flag_cfopcode
53 # I irop_flag_ip_cfopcode
56 # H irop_flag_highlevel
57 # c irop_flag_constlike
60 # irn_flags: special node flags, OPTIONAL (default is 0)
61 # following irn_flags are supported:
64 # I ignore for register allocation
65 # S modifies stack pointer
67 # state: state of the operation, OPTIONAL (default is "floats")
69 # arity: arity of the operation, MUST NOT BE OMITTED
71 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
72 # are always the first 3 arguments and are always autmatically
74 # If this key is missing the following arguments will be created:
75 # for i = 1 .. arity: ir_node *op_i
78 # outs: if a node defines more than one output, the names of the projections
79 # nodes having outs having automatically the mode mode_T
80 # One can also annotate some flags for each out, additional to irn_flags.
81 # They are separated from name with a colon ':', and concatenated by pipe '|'
82 # Only I and S are available at the moment (same meaning as in irn_flags).
83 # example: [ "frame:I", "stack:I|S", "M" ]
85 # comment: OPTIONAL comment for the node constructor
87 # rd_constructor: for every operation there will be a
88 # new_rd_<arch>_<op-name> function with the arguments from above
89 # which creates the ir_node corresponding to the defined operation
90 # you can either put the complete source code of this function here
92 # This key is OPTIONAL. If omitted, the following constructor will
94 # if (!op_<arch>_<op-name>) assert(0);
98 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
101 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
103 # latency: the latency of the operation, default is 1
109 $mode_gp = "mode_Iu";
110 $mode_fpa = "mode_E";
113 $normal = 0; # no special type
114 $caller_save = 1; # caller save (register must be saved by the caller of a function)
115 $callee_save = 2; # callee save (register must be saved by the called function)
116 $ignore = 4; # ignore (do not assign this register)
117 $arbitrary = 8; # emitter can choose an arbitrary register of this class
118 $virtual = 16; # the register is a virtual one
119 $state = 32; # register represents a state
120 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
123 { "name" => "r0", "type" => $caller_save },
124 { "name" => "r1", "type" => $caller_save },
125 { "name" => "r2", "type" => $caller_save },
126 { "name" => "r3", "type" => $caller_save },
127 { "name" => "r4", "type" => $callee_save },
128 { "name" => "r5", "type" => $callee_save },
129 { "name" => "r6", "type" => $callee_save },
130 { "name" => "r7", "type" => $callee_save },
131 { "name" => "r8", "type" => $callee_save },
132 { "name" => "r9", "type" => $callee_save },
133 { "name" => "r10", "type" => $callee_save },
134 { "name" => "r11", "type" => $callee_save },
135 { "name" => "r12", "type" => $ignore | $callee_save }, # reserved for linker
136 { "name" => "sp", "type" => $ignore | $callee_save }, # this is our stack pointer
137 { "name" => "lr", "type" => $callee_save | $caller_save }, # this is our return address
138 { "name" => "pc", "type" => $ignore | $callee_save }, # this is our program counter
139 { name => "gp_UKNWN", type => $ignore | $arbitrary | $virtual }, # we need a dummy register for Unknown nodes
140 { "mode" => $mode_gp }
143 { "name" => "f0", "type" => 1 },
144 { "name" => "f1", "type" => 1 },
145 { "name" => "f2", "type" => 1 },
146 { "name" => "f3", "type" => 1 },
147 { "name" => "f4", "type" => 1 },
148 { "name" => "f5", "type" => 1 },
149 { "name" => "f6", "type" => 1 },
150 { "name" => "f7", "type" => 1 },
151 { name => "fpa_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
152 { "mode" => $mode_fpa }
157 M => "${arch}_emit_mode(node);",
158 X => "${arch}_emit_shift(node);",
159 S0 => "${arch}_emit_source_register(node, 0);",
160 S1 => "${arch}_emit_source_register(node, 1);",
161 S2 => "${arch}_emit_source_register(node, 2);",
162 S3 => "${arch}_emit_source_register(node, 3);",
163 S4 => "${arch}_emit_source_register(node, 4);",
164 D0 => "${arch}_emit_dest_register(node, 0);",
165 D1 => "${arch}_emit_dest_register(node, 1);",
166 D2 => "${arch}_emit_dest_register(node, 2);",
167 C => "${arch}_emit_immediate(node);",
168 O => "${arch}_emit_offset(mode);",
171 #--------------------------------------------------#
174 # _ __ _____ __ _ _ __ ___ _ __ ___ #
175 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
176 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
177 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
180 #--------------------------------------------------#
182 $default_attr_type = "arm_attr_t";
183 $default_copy_attr = "arm_copy_attr";
186 arm_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
187 arm_SymConst_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
188 arm_CondJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
189 arm_SwitchJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
190 arm_fpaConst_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
194 arm_attr_t => "cmp_attr_arm",
195 arm_SymConst_attr_t => "cmp_attr_arm_SymConst",
196 arm_CondJmp_attr_t => "cmp_attr_arm_CondJmp",
197 arm_SwitchJmp_attr_t => "cmp_attr_arm_SwitchJmp",
198 arm_fpaConst_attr_t => "cmp_attr_arm_fpaConst",
204 # comment => "blup di dup",
206 # emit => ". [%S0]-10",
208 # attr => "tarval *tv",
209 # init_attr => "(void) attri;",
211 # # cmp => "return 1;"
217 # reg_req => { in => [ "gp" ] },
218 # attr => "tarval *tv",
219 # init_attr => "(void) tv;",
225 # reg_req => { in => [ "gp", "gp" ] },
236 reg_req => { out => [ "gp_UKNWN" ] },
245 reg_req => { out => [ "fpa_UKNWN" ] },
250 #-----------------------------------------------------------------#
253 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
254 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
255 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
256 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
259 #-----------------------------------------------------------------#
261 # commutative operations
266 comment => "construct Add: Add(a, b) = Add(b, a) = a + b",
267 attr => "arm_shift_modifier mod, long shf",
268 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
269 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
270 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
271 emit => '. add %D0, %S0, %S1%X'
276 comment => "construct Add: Add(a, const) = Add(const, a) = a + const",
278 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
279 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
280 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
281 emit => '. add %D0, %S0, %C'
287 comment => "construct Mul: Mul(a, b) = Mul(b, a) = a * b",
288 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "!in_r1" ] },
289 emit =>'. mul %D0, %S0, %S1'
295 comment => "construct signed 64bit Mul: Mul(a, b) = Mul(b, a) = a * b",
296 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp", "gp" ] },
297 emit =>'. smull %D0, %D1, %S0, %S1',
298 outs => [ "low", "high" ],
304 comment => "construct unsigned 64bit Mul: Mul(a, b) = Mul(b, a) = a * b",
305 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp", "gp" ] },
306 emit =>'. umull %D0, %D1, %S0, %S1',
307 outs => [ "low", "high" ],
313 comment => "construct Mla: Mla(a, b, c) = a * b + c",
314 reg_req => { "in" => [ "gp", "gp", "gp" ], "out" => [ "!in_r1" ] },
315 emit =>'. mla %D0, %S0, %S1, %S2'
321 comment => "construct And: And(a, b) = And(b, a) = a AND b",
322 attr => "arm_shift_modifier mod, long shf",
323 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
324 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
325 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
326 emit => '. and %D0, %S0, %S1%X'
331 comment => "construct And: And(a, const) = And(const, a) = a AND const",
333 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
334 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
335 emit => '. and %D0, %S0, %C',
336 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
342 comment => "construct Or: Or(a, b) = Or(b, a) = a OR b",
343 attr => "arm_shift_modifier mod, long shf",
344 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
345 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
346 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
347 emit => '. orr %D0, %S0, %S1%X'
352 comment => "construct Or: Or(a, const) = Or(const, a) = a OR const",
354 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
355 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
356 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
357 emit => '. orr %D0, %S0, %C'
363 comment => "construct Eor: Eor(a, b) = Eor(b, a) = a EOR b",
364 attr => "arm_shift_modifier mod, long shf",
365 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
366 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
367 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
368 emit => '. eor %D0, %S0, %S1%X'
373 comment => "construct Eor: Eor(a, const) = Eor(const, a) = a EOR const",
375 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
376 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
377 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
378 emit => '. eor %D0, %S0, %C'
381 # not commutative operations
385 comment => "construct Bic: Bic(a, b) = a AND ~b",
386 attr => "arm_shift_modifier mod, long shf",
387 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
388 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
389 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
390 emit => '. bic %D0, %S0, %S1%X'
395 comment => "construct Bic: Bic(a, const) = a AND ~const",
397 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
398 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
399 emit => '. bic %D0, %S0, %C',
400 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
405 comment => "construct Sub: Sub(a, b) = a - b",
406 attr => "arm_shift_modifier mod, long shf",
407 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
408 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
409 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
410 emit => '. sub %D0, %S0, %S1%X'
415 comment => "construct Sub: Sub(a, const) = a - const",
417 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
418 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
419 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
420 emit => '. sub %D0, %S0, %C',
425 comment => "construct Rsb: Rsb(a, b) = b - a",
426 attr => "arm_shift_modifier mod, long shf",
427 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
428 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
429 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
430 emit => '. rsb %D0, %S0, %S1%X'
435 comment => "construct Rsb: Rsb(a, const) = const - a",
437 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
438 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
439 emit => '. rsb %D0, %S0, %C',
440 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
445 comment => "construct Shl: Shl(a, b) = a << b",
446 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
447 emit => '. mov %D0, %S0, lsl %S1'
452 comment => "construct Shr: Shr(a, b) = a >>u b",
453 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
454 emit => '. mov %D0, %S0, lsr %S1'
459 comment => "construct Shrs: Shrs(a, b) = a >>s b",
460 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
461 emit => '. mov %D0, %S0, asr %S1'
466 comment => "construct Ror: Ror(a, b) = a <<r>> b",
467 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
468 emit => '. mov %D0, %S0, ror %S1'
473 # comment => "construct RotL: RotL(a, b) = a ROTL b",
474 # reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
475 # emit => '. rol %S0, %S1, %D0'
480 # comment => "construct RotL: RotL(a, const) = a ROTL const",
481 # reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
482 # emit => '. rol %S0, %C, %D0'
487 comment => "construct Mov: a = b",
488 attr => "arm_shift_modifier mod, long shf",
489 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
490 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
491 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
492 emit => '. mov %D0, %S0%X'
497 comment => "represents an integer constant",
499 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
500 reg_req => { "out" => [ "gp" ] },
501 emit => '. mov %D0, %C',
502 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
507 comment => "construct Not: Not(a) = !a",
508 attr => "arm_shift_modifier mod, long shf",
509 init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
510 cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
511 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
512 emit => '. mvn %D0, %S0%X'
517 comment => "represents a negated integer constant",
519 init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
520 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
521 reg_req => { "out" => [ "gp" ] },
522 emit => '. mvn %D0, %C',
527 comment => "construct Abs: Abs(a) = |a|",
528 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
531 . rsbmi %D0, %S0, #0'
537 # this node produces ALWAYS an empty (tempary) gp reg and cannot be CSE'd
542 comment => "allocate an empty register for calculations",
543 reg_req => { "out" => [ "gp" ] },
544 emit => '. /* %D0 now available for calculations */',
545 cmp_attr => 'return 1;'
549 comment => "implements a register copy",
550 reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
556 comment => "implements a memcopy: CopyB(dst, src, size, mem) == memcpy(dst, src, size)",
558 init_attr => 'attr->imm_value = imm;',
559 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
560 reg_req => { "in" => [ "!sp", "!sp", "gp", "gp", "gp", "none" ], "out" => [ "none" ] },
567 comment => "represents a symbolic constant",
569 init_attr => "\tset_arm_symconst_id(res, id);",
570 reg_req => { "out" => [ "gp" ] },
571 attr_type => "arm_SymConst_attr_t",
577 comment => "construct conditional branch: CMP A, B && JMPxx LABEL",
579 attr => "int proj_num",
580 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
581 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "none", "none"] },
582 attr_type => "arm_CondJmp_attr_t",
588 comment => "construct conditional branch: TST A, B && JMPxx LABEL",
590 attr => "int proj_num",
591 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
592 reg_req => { "in" => [ "gp", "gp" ], "out" => [ "none", "none"] },
593 attr_type => "arm_CondJmp_attr_t",
599 comment => "construct switch",
601 attr => "int n_projs, long def_proj_num",
602 init_attr => "\tset_arm_SwitchJmp_n_projs(res, n_projs);\n".
603 "\tset_arm_SwitchJmp_default_proj_num(res, def_proj_num);",
604 reg_req => { "in" => [ "gp" ], "out" => [ "none" ] },
605 attr_type => "arm_SwitchJmp_attr_t",
613 state => "exc_pinned",
614 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
615 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
616 emit => '. ldr %D0, [%S0, #0]',
617 outs => [ "res", "M" ],
623 state => "exc_pinned",
624 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
625 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
626 emit => '. ldrb %D0, [%S0, #0]',
627 outs => [ "res", "M" ],
633 state => "exc_pinned",
634 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
635 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
636 emit => '. ldrsb %D0, [%S0, #0]',
637 outs => [ "res", "M" ],
643 state => "exc_pinned",
644 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
645 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
646 emit => '. ldrh %D0, [%S0, #0]',
647 outs => [ "res", "M" ],
653 state => "exc_pinned",
654 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
655 reg_req => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
656 emit => '. ldrsh %D0, [%S0, #0]',
657 outs => [ "res", "M" ],
663 state => "exc_pinned",
664 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
665 reg_req => { "in" => [ "gp", "gp", "none" ], "out" => [ "none" ] },
666 emit => '. strb %S1, [%S0, #0]',
673 state => "exc_pinned",
674 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
675 reg_req => { "in" => [ "gp", "gp", "none" ], out => [ "none" ] },
676 emit => '. strh %S1, [%S0, #0]',
683 state => "exc_pinned",
684 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
685 reg_req => { "in" => [ "gp", "gp", "none" ], out => [ "none" ] },
686 emit => '. str %S1, [%S0, #0]',
693 state => "exc_pinned",
694 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
695 reg_req => { "in" => [ "sp", "gp", "gp", "gp", "gp", "none" ], "out" => [ "gp", "none" ] },
696 emit => '. stmfd %S0!, {%S1, %S2, %S3, %S4}',
697 outs => [ "ptr", "M" ],
703 state => "exc_pinned",
704 comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
705 reg_req => { "in" => [ "sp", "none" ], "out" => [ "gp", "gp", "gp", "none" ] },
706 emit => '. ldmfd %S0, {%D0, %D1, %D2}',
707 outs => [ "res0", "res1", "res2", "M" ],
711 #---------------------------------------------------#
714 # | |_ _ __ __ _ _ __ ___ __| | ___ ___ #
715 # | _| '_ \ / _` | | '_ \ / _ \ / _` |/ _ \/ __| #
716 # | | | |_) | (_| | | | | | (_) | (_| | __/\__ \ #
717 # |_| | .__/ \__,_| |_| |_|\___/ \__,_|\___||___/ #
720 #---------------------------------------------------#
722 # commutative operations
727 comment => "construct FPA Add: Add(a, b) = Add(b, a) = a + b",
728 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
729 emit => '. adf%M %D0, %S0, %S1',
734 comment => "construct FPA Add: Add(a, b) = Add(b, a) = a + b",
736 init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
737 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
738 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
739 emit => '. adf%M %D0, %S0, %C',
745 comment => "construct FPA Mul: Mul(a, b) = Mul(b, a) = a * b",
746 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
747 emit =>'. muf%M %D0, %S0, %S1',
752 comment => "construct FPA Mul: Mul(a, b) = Mul(b, a) = a * b",
754 init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
755 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
756 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
757 emit => '. muf%M %D0, %S0, %C',
763 comment => "construct FPA Fast Mul: Mul(a, b) = Mul(b, a) = a * b",
764 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
765 emit =>'. fml%M %D0, %S0, %S1',
771 comment => "construct FPA Max: Max(a, b) = Max(b, a) = a > b ? a : b",
772 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
773 emit =>'. fmax %S0, %S1, %D0',
779 comment => "construct FPA Min: Min(a, b) = Min(b, a) = a < b ? a : b",
780 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
781 emit =>'. fmin %S0, %S1, %D0',
784 # not commutative operations
788 comment => "construct FPA Sub: Sub(a, b) = a - b",
789 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
790 emit => '. suf%M %D0, %S0, %S1'
795 comment => "construct FPA Sub: Sub(a, b) = a - b",
797 init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
798 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
799 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
800 emit => '. suf%M %D0, %S0, %C'
805 comment => "construct FPA reverse Sub: Sub(a, b) = b - a",
806 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
807 emit => '. rsf%M %D0, %S0, %S1'
812 comment => "construct FPA reverse Sub: Sub(a, b) = b - a",
814 init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
815 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
816 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
817 emit => '. rsf%M %D0, %S0, %C'
821 comment => "construct FPA Div: Div(a, b) = a / b",
822 attr => "ir_mode *op_mode",
823 init_attr => "attr->op_mode = op_mode;",
824 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
825 emit =>'. dvf%M %D0, %S0, %S1',
826 outs => [ "res", "M" ],
830 comment => "construct FPA Div: Div(a, b) = a / b",
831 attr => "ir_mode *op_mode, long imm",
832 init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
833 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
834 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
835 emit =>'. dvf%M %D0, %S0, %C',
836 outs => [ "res", "M" ],
840 comment => "construct FPA reverse Div: Div(a, b) = b / a",
841 attr => "ir_mode *op_mode",
842 init_attr => "attr->op_mode = op_mode;",
843 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
844 emit =>'. rdf%M %D0, %S0, %S1',
845 outs => [ "res", "M" ],
849 comment => "construct FPA reverse Div: Div(a, b) = b / a",
850 attr => "ir_mode *op_mode, long imm",
851 init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
852 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
853 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
854 emit =>'. rdf%M %D0, %S0, %S1',
855 outs => [ "res", "M" ],
859 comment => "construct FPA Fast Div: Div(a, b) = a / b",
860 attr => "ir_mode *op_mode",
861 init_attr => "attr->op_mode = op_mode;",
862 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
863 emit =>'. fdv%M %D0, %S0, %S1',
864 outs => [ "res", "M" ],
868 comment => "construct FPA Fast Div: Div(a, b) = a / b",
869 attr => "ir_mode *op_mode, long imm",
870 init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
871 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
872 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
873 emit =>'. fdv%M %D0, %S0, %C',
874 outs => [ "res", "M" ],
878 comment => "construct FPA Fast reverse Div: Div(a, b) = b / a",
879 attr => "ir_mode *op_mode",
880 init_attr => "attr->op_mode = op_mode;",
881 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa", "none" ] },
882 emit =>'. frd%M %D0, %S0, %S1',
883 outs => [ "res", "M" ],
887 comment => "construct FPA Fast reverse Div: Div(a, b) = b / a",
888 attr => "ir_mode *op_mode, long imm",
889 init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
890 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
891 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
892 emit =>'. frd%M %D0, %S0, %C',
893 outs => [ "res", "M" ],
898 comment => "construct FPA Move: b = a",
899 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
900 emit => '. mvf%M %S0, %D0',
905 comment => "represents a float constant",
907 init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
908 reg_req => { "out" => [ "fpa" ] },
909 emit => '. mvf%M %D0, %C',
910 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
915 comment => "construct FPA Move Negated: b = -a",
916 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
917 emit => '. mnf%M %S0, %D0',
922 comment => "represents a float constant",
924 init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
925 reg_req => { "out" => [ "fpa" ] },
926 emit => '. mnf%M %D0, %C',
927 cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
932 comment => "construct FPA Absolute value: fAbsd(a) = |a|",
933 reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
934 emit => '. abs%M %D0, %S0',
941 comment => "construct a FPA integer->float conversion",
942 reg_req => { "in" => ["gp"], "out" => [ "fpa" ] },
943 emit => '. flt%M %D0, %S0',
948 comment => "construct a FPA float->integer conversion",
949 reg_req => { "in" => ["fpa"], "out" => [ "gp" ] },
950 emit => '. fix %D0, %S0',
956 comment => "construct floating point Compare and Branch: CMF A, B && JMPxx LABEL",
958 attr => "int proj_num",
959 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
960 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "none", "none"] },
961 attr_type => "arm_CondJmp_attr_t",
967 comment => "construct floating point Compare negative and Branch: CMF A, -B && JMPxx LABEL",
969 attr => "int proj_num",
970 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
971 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "none", "none"] },
972 attr_type => "arm_CondJmp_attr_t",
978 comment => "construct floating point Compare and Branch: CMF A, -B && JMPxx LABEL",
980 attr => "int proj_num",
981 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
982 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "none", "none"] },
983 attr_type => "arm_CondJmp_attr_t",
989 comment => "construct floating point Compare and Branch: CMF A, -B && JMPxx LABEL",
991 attr => "int proj_num",
992 init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
993 reg_req => { "in" => [ "fpa", "fpa" ], "out" => [ "none", "none"] },
994 attr_type => "arm_CondJmp_attr_t",
1002 state => "exc_pinned",
1003 comment => "construct FPA Load: Load(ptr, mem) = LD ptr",
1004 attr => "ir_mode *op_mode",
1005 init_attr => "attr->op_mode = op_mode;",
1006 reg_req => { "in" => [ "gp", "none" ], "out" => [ "fpa", "none" ] },
1007 emit => '. ldf%M %D0, [%S0]',
1008 outs => [ "res", "M" ],
1014 state => "exc_pinned",
1015 comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
1016 attr => "ir_mode *op_mode",
1017 init_attr => "attr->op_mode = op_mode;",
1018 reg_req => { "in" => [ "gp", "fpa", "none" ], "out" => [ "none" ] },
1019 emit => '. stf%M %S1, [%S0]',
1026 comment => "construct fp double to 2 gp register transfer",
1027 reg_req => { "in" => [ "fpa", "none" ], "out" => [ "gp", "gp", "none" ] },
1028 outs => [ "low", "high", "M" ],
1033 comment => "construct Add to stack pointer",
1034 reg_req => { in => [ "sp", "gp", "none" ], out => [ "in_r1", "none" ] },
1035 emit => '. add %D0, %S0, %S1',
1036 outs => [ "stack:I|S", "M" ],
1041 comment => "construct Sub from stack pointer and copy to Register",
1042 reg_req => { in => [ "sp", "gp", "none" ], out => [ "in_r1", "gp", "none" ] },
1043 ins => [ "stack", "size", "mem" ],
1044 emit => ". sub %D0, %S0, %S1\n".
1046 outs => [ "stack:I|S", "addr", "M" ],
1051 comment => "load the TLS address",
1052 reg_req => { out => [ "gp" ] },
1057 # floating point constants
1062 comment => "construct a floating point constant",
1063 attr => "tarval *tv",
1064 init_attr => "attr->tv = tv;",
1065 mode => "get_tarval_mode(tv)",
1066 reg_req => { "out" => [ "fpa" ] },
1067 attr_type => "arm_fpaConst_attr_t",
1070 #---------------------------------------------------#
1073 # __ _| |_ _ __ _ __ ___ __| | ___ ___ #
1074 # \ \ / / _| '_ \ | '_ \ / _ \ / _` |/ _ \/ __| #
1075 # \ V /| | | |_) | | | | | (_) | (_| | __/\__ \ #
1076 # \_/ |_| | .__/ |_| |_|\___/ \__,_|\___||___/ #
1079 #---------------------------------------------------#