3 # This is a template specification for the Firm-Backend
5 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
9 $comment_string = '/*';
11 # the number of additional opcodes you want to register
12 #$additional_opcodes = 0;
14 # The node description is done as a perl hash initializer with the
15 # following structure:
20 # "op_flags" => "N|L|C|X|I|F|Y|H|c|K",
21 # "irn_flags" => "R|N|I"
22 # "arity" => "0|1|2|3 ... |variable|dynamic|any",
23 # "state" => "floats|pinned|mem_pinned|exc_pinned",
25 # { "type" => "type 1", "name" => "name 1" },
26 # { "type" => "type 2", "name" => "name 2" },
29 # "comment" => "any comment for constructor",
30 # "reg_req" => { "in" => [ "reg_class|register" ], "out" => [ "reg_class|register|in_rX" ] },
31 # "cmp_attr" => "c source code for comparing node attributes",
32 # "emit" => "emit code with templates",
33 # "attr" => "attitional attribute arguments for constructor"
34 # "init_attr" => "emit attribute initialization template"
35 # "rd_constructor" => "c source code which constructs an ir_node"
38 # ... # (all nodes you need to describe)
40 # ); # close the %nodes initializer
42 # op_flags: flags for the operation, OPTIONAL (default is "N")
43 # the op_flags correspond to the firm irop_flags:
46 # C irop_flag_commutative
47 # X irop_flag_cfopcode
48 # I irop_flag_ip_cfopcode
51 # H irop_flag_highlevel
52 # c irop_flag_constlike
55 # irn_flags: special node flags, OPTIONAL (default is 0)
56 # following irn_flags are supported:
59 # I ignore for register allocation
61 # state: state of the operation, OPTIONAL (default is "floats")
63 # arity: arity of the operation, MUST NOT BE OMITTED
65 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
66 # are always the first 3 arguments and are always autmatically
68 # If this key is missing the following arguments will be created:
69 # for i = 1 .. arity: ir_node *op_i
72 # outs: if a node defines more than one output, the names of the projections
73 # nodes having outs having automatically the mode mode_T
75 # comment: OPTIONAL comment for the node constructor
77 # rd_constructor: for every operation there will be a
78 # new_rd_<arch>_<op-name> function with the arguments from above
79 # which creates the ir_node corresponding to the defined operation
80 # you can either put the complete source code of this function here
82 # This key is OPTIONAL. If omitted, the following constructor will
84 # if (!op_<arch>_<op-name>) assert(0);
88 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
91 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
95 # 1 - caller save (register must be saved by the caller of a function)
96 # 2 - callee save (register must be saved by the called function)
97 # 4 - ignore (do not assign this register)
98 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
101 { "name" => "r0", "type" => 1 },
102 { "name" => "r1", "type" => 1 },
103 { "name" => "r2", "type" => 1 },
104 { "name" => "r3", "type" => 1 },
105 { "name" => "r4", "type" => 2 },
106 { "name" => "r5", "type" => 2 },
107 { "name" => "r6", "type" => 2 },
108 { "name" => "r7", "type" => 2 },
109 { "name" => "r8", "type" => 2 },
110 { "name" => "r9", "type" => 2 },
111 { "name" => "r10", "type" => 2 },
112 { "name" => "r11", "type" => 2 },
113 { "name" => "r12", "type" => 6 }, # reserved for linker
114 { "name" => "sp", "type" => 6 }, # this is our stack pointer
115 { "name" => "lr", "type" => 3 }, # this is our return address
116 { "name" => "pc", "type" => 6 }, # this is our program counter
117 { "mode" => "mode_Iu" }
120 { "name" => "f0", "type" => 1 },
121 { "name" => "f1", "type" => 1 },
122 { "name" => "f2", "type" => 1 },
123 { "name" => "f3", "type" => 1 },
124 { "name" => "f4", "type" => 2 },
125 { "name" => "f5", "type" => 2 },
126 { "name" => "f6", "type" => 2 },
127 { "name" => "f7", "type" => 2 },
128 { "mode" => "mode_E" }
132 #--------------------------------------------------#
135 # _ __ _____ __ _ _ __ ___ _ __ ___ #
136 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
137 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
138 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
141 #--------------------------------------------------#
145 #-----------------------------------------------------------------#
148 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
149 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
150 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
151 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
154 #-----------------------------------------------------------------#
156 # commutative operations
161 "comment" => "construct Add: Add(a, b) = Add(b, a) = a + b",
162 "attr" => "arm_shift_modifier mod, tarval *shf",
163 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
164 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
165 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
166 "emit" => '. add %D1, %S1, %S2%X0 /* Add(%S1, %S2) -> %D1, (%A1, %A2) */'
171 "comment" => "construct Add: Add(a, const) = Add(const, a) = a + const",
172 "attr" => "tarval *tv",
173 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
174 "cmp_attr" => 'return attr_a->value != attr_b->value;',
175 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
176 "emit" => '. add %D1, %S1, %C /* Add(%C, %S1) -> %D1, (%A1, const) */'
182 "comment" => "construct Mul: Mul(a, b) = Mul(b, a) = a * b",
183 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "!in_r1" ] },
184 "emit" =>'. mul %D1, %S1, %S2 /* Mul(%S1, %S2) -> %D1, (%A1, %A2) */'
190 "comment" => "construct signed 64bit Mul: Mul(a, b) = Mul(b, a) = a * b",
191 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp", "gp" ] },
192 "emit" =>'. smull %D1, %D2, %S1, %S2 /* SMull(%S1, %S2) -> %D1, %D2, (%A1, %A2) */',
193 "outs" => [ "low", "high" ],
199 "comment" => "construct unsigned 64bit Mul: Mul(a, b) = Mul(b, a) = a * b",
200 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp", "gp" ] },
201 "emit" =>'. umull %D1, %D2, %S1, %S2 /* UMull(%S1, %S2) -> %D1, %D2, (%A1, %A2) */',
202 "outs" => [ "low", "high" ],
208 "comment" => "construct Mla: Mla(a, b, c) = a * b + c",
209 "reg_req" => { "in" => [ "gp", "gp", "gp" ], "out" => [ "!in_r1" ] },
210 "emit" =>'. mla %D1, %S1, %S2, %S3 /* Mla(%S1, %S2, %S3) -> %D1, (%A1, %A2, %A3) */'
216 "comment" => "construct And: And(a, b) = And(b, a) = a AND b",
217 "attr" => "arm_shift_modifier mod, tarval *shf",
218 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
219 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
220 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
221 "emit" => '. and %D1, %S1, %S2%X0 /* And(%S1, %S2) -> %D1, (%A1, %A2) */'
226 "comment" => "construct And: And(a, const) = And(const, a) = a AND const",
227 "attr" => "tarval *tv",
228 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
229 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
230 "emit" => '. and %D1, %S1, %C /* And(%C, %S1) -> %D1, (%A1, const) */',
231 "cmp_attr" => 'return attr_a->value != attr_b->value;'
237 "comment" => "construct Or: Or(a, b) = Or(b, a) = a OR b",
238 "attr" => "arm_shift_modifier mod, tarval *shf",
239 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
240 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
241 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
242 "emit" => '. orr %D1, %S1, %S2%X0 /* Or(%S1, %S2) -> %D1, (%A1, %A2) */'
247 "comment" => "construct Or: Or(a, const) = Or(const, a) = a OR const",
248 "attr" => "tarval *tv",
249 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
250 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
251 "cmp_attr" => 'return attr_a->value != attr_b->value;',
252 "emit" => '. orr %D1, %S1, %C /* Or(%C, %S1) -> %D1, (%A1, const) */'
258 "comment" => "construct Eor: Eor(a, b) = Eor(b, a) = a EOR b",
259 "attr" => "arm_shift_modifier mod, tarval *shf",
260 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
261 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
262 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
263 "emit" => '. eor %D1, %S1, %S2%X0 /* Xor(%S1, %S2) -> %D1, (%A1, %A2) */'
268 "comment" => "construct Eor: Eor(a, const) = Eor(const, a) = a EOR const",
269 "attr" => "tarval *tv",
270 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
271 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
272 "cmp_attr" => 'return attr_a->value != attr_b->value;',
273 "emit" => '. eor %D1, %S1, %C /* Xor(%C, %S1) -> %D1, (%A1, const) */'
276 # not commutative operations
280 "comment" => "construct Bic: Bic(a, b) = a AND ~b",
281 "attr" => "arm_shift_modifier mod, tarval *shf",
282 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
283 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
284 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
285 "emit" => '. bic %D1, %S1, %S2%X0 /* AndNot(%S1, %S2) -> %D1, (%A1, %A2) */'
290 "comment" => "construct Bic: Bic(a, const) = a AND ~const",
291 "attr" => "tarval *tv",
292 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
293 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
294 "emit" => '. bic %D1, %S1, %C /* AndNot(%C, %S1) -> %D1, (%A1, const) */',
295 "cmp_attr" => 'return attr_a->value != attr_b->value;'
300 "comment" => "construct Sub: Sub(a, b) = a - b",
301 "attr" => "arm_shift_modifier mod, tarval *shf",
302 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
303 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
304 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
305 "emit" => '. sub %D1, %S1, %S2%X0 /* Sub(%S1, %S2) -> %D1, (%A1, %A2) */'
310 "comment" => "construct Sub: Sub(a, const) = a - const",
311 "attr" => "tarval *tv",
312 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
313 "cmp_attr" => 'return attr_a->value != attr_b->value;',
314 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
315 "emit" => '. sub %D1, %S1, %C /* Sub(%S1, %C) -> %D1, (%A1, const) */',
320 "comment" => "construct Rsb: Rsb(a, b) = b - a",
321 "attr" => "arm_shift_modifier mod, tarval *shf",
322 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
323 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
324 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
325 "emit" => '. rsb %D1, %S1, %S2%X0 /* Rsb(%S1, %S2) -> %D1, (%A1, %A2) */'
330 "comment" => "construct Rsb: Rsb(a, const) = const - a",
331 "attr" => "tarval *tv",
332 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
333 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
334 "emit" => '. rsb %D1, %S1, %C /* Rsb(%S1, %C) -> %D1, (%A1, const) */',
335 "cmp_attr" => 'return attr_a->value != attr_b->value;'
340 "comment" => "construct Shl: Shl(a, b) = a << b",
341 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
342 "emit" => '. mov %D1, %S1, lsl %S2 /* Shl(%S1, %S2) -> %D1, (%A1, %A2) */'
347 "comment" => "construct Shr: Shr(a, b) = a >> b",
348 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "in_r1" ] },
349 "emit" => '. mov %D1, %S1, lsr %S2 /* Shr(%S1, %S2) -> %D1, (%A1, %A2) */'
354 "comment" => "construct Shrs: Shrs(a, b) = a >> b",
355 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "in_r1" ] },
356 "emit" => '. mov %D1, %S1, asr %S2 /* Shrs(%S1, %S2) -> %D1, (%A1, %A2) */'
360 # "irn_flags" => "R",
361 # "comment" => "construct RotR: RotR(a, b) = a ROTR b",
362 # "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
363 # "emit" => '. mov %D1, %S1, ror %S2 /* RotR(%S1, %S2) -> %D1, (%A1, %A2) */'
364 ## "emit" => '. ror %S1, %S2, %D1 /* RotR(%S1, %S2) -> %D1, (%A1, %A2) */'
368 # "irn_flags" => "R",
369 # "comment" => "construct RotL: RotL(a, b) = a ROTL b",
370 # "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
371 # "emit" => '. rol %S1, %S2, %D1 /* RotL(%S1, %S2) -> %D1, (%A1, %A2) */'
375 # "irn_flags" => "R",
376 # "comment" => "construct RotL: RotL(a, const) = a ROTL const",
377 # "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
378 # "emit" => '. rol %S1, %C, %D1 /* RotL(%S1, %C) -> %D1, (%A1, const) */'
383 "comment" => "construct Mov: a = b",
384 "attr" => "arm_shift_modifier mod, tarval *shf",
385 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
386 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
387 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
388 "emit" => '. mov %D1, %S1%X0 /* Mov(%S1%X0) -> %D1, (%A1) */'
393 "comment" => "represents an integer constant",
394 "attr" => "tarval *tv",
395 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
396 "reg_req" => { "out" => [ "gp" ] },
397 "emit" => '. mov %D1, %C /* Mov Const into register */',
398 "cmp_attr" => 'return attr_a->value != attr_b->value;'
403 "comment" => "construct Not: Not(a) = !a",
404 "attr" => "arm_shift_modifier mod, tarval *shf",
405 "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
406 "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
407 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
408 "emit" => '. mvn %D1, %S1%X0 /* ~(%S1%X0) -> %D1, (%A1) */'
413 "comment" => "represents a negated integer constant",
414 "attr" => "tarval *tv",
415 "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
416 "cmp_attr" => 'return attr_a->value != attr_b->value;',
417 "reg_req" => { "out" => [ "gp" ] },
418 "emit" => '. mvn %D1, %C /* Mov ~Const into register */',
423 "comment" => "construct Abs: Abs(a) = |a|",
424 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
426 '. movs %S1, %S1, #0 /* set condition flag */\n
427 . rsbmi %D1, %S1, #0 /* Neg(%S1) -> %D1, (%A1) */'
435 "comment" => "allocate an empty register for calculations",
436 "reg_req" => { "out" => [ "gp" ] },
437 "emit" => '. /* %D1 now available for calculations */',
438 "cmp_attr" => 'return 1;'
442 "comment" => "implements a register copy",
443 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
449 "comment" => "implements a memcopy: CopyB(dst, src, size, mem) == memcpy(dst, src, size)",
450 "reg_req" => { "in" => [ "!sp", "!sp", "gp", "gp", "gp", "none" ], "out" => [ "none" ] },
456 "comment" => "represents a symbolic constant",
457 "attr" => "const char *label",
458 "init_attr" => ' attr->symconst_label = label;',
459 "reg_req" => { "out" => [ "gp" ] },
460 # "emit" => '. ldr %D1, %C /* Mov Const into register */',
462 ' /* should be identical but ...*/
463 return strcmp(attr_a->symconst_label, attr_b->symconst_label);'
467 "op_flags" => "L|X|Y",
468 "comment" => "construct conditional jump: CMP A, B && JMPxx LABEL",
469 "cmp_attr" => " return arm_comp_condJmp(attr_a, attr_b);\n",
470 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "none", "none"] },
474 "op_flags" => "L|X|Y",
475 "comment" => "construct switch",
476 "reg_req" => { "in" => [ "gp" ], "out" => [ "none" ] },
477 "cmp_attr" => " return 0;\n",
485 "state" => "exc_pinned",
486 "comment" => "construct Load: Load(ptr, mem) = LD ptr -> reg",
487 "reg_req" => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
488 "emit" => '. ldr %D1, [%S1, #0] /* Load((%S1)) -> %D1, (%A1) */',
489 "outs" => [ "res", "M" ],
495 "state" => "exc_pinned",
496 "comment" => "construct Load: Load(ptr, mem) = LD ptr -> reg",
497 "reg_req" => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
498 "emit" => '. ldrb %D1, [%S1, #0] /* Load((%S1)) -> %D1, (%A1) */',
499 "outs" => [ "res", "M" ],
505 "state" => "exc_pinned",
506 "comment" => "construct Load: Load(ptr, mem) = LD ptr -> reg",
507 "reg_req" => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
508 "emit" => '. ldrsb %D1, [%S1, #0] /* Load((%S1)) -> %D1, (%A1) */',
509 "outs" => [ "res", "M" ],
515 "state" => "exc_pinned",
516 "comment" => "construct Load: Load(ptr, mem) = LD ptr -> reg",
517 "reg_req" => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
518 "emit" => '. ldrh %D1, [%S1, #0] /* Load((%S1)) -> %D1, (%A1) */',
519 "outs" => [ "res", "M" ],
525 "state" => "exc_pinned",
526 "comment" => "construct Load: Load(ptr, mem) = LD ptr -> reg",
527 "reg_req" => { "in" => [ "gp", "none" ], "out" => [ "gp", "none" ] },
528 "emit" => '. ldrsh %D1, [%S1, #0] /* Load((%S1)) -> %D1, (%A1) */',
529 "outs" => [ "res", "M" ],
535 "state" => "exc_pinned",
536 "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
537 "reg_req" => { "in" => [ "gp", "gp", "none" ] },
538 "emit" => '. strb %S2, [%S1, #0] /* Store(%S2) -> (%S1), (%A1, %A2) */',
545 "state" => "exc_pinned",
546 "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
547 "reg_req" => { "in" => [ "gp", "gp", "none" ] },
548 "emit" => '. strsb %S2, [%S1, #0] /* Store(%S2) -> (%S1), (%A1, %A2) */',
555 "state" => "exc_pinned",
556 "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
557 "reg_req" => { "in" => [ "gp", "gp", "none" ] },
558 "emit" => '. strh %S2, [%S1, #0] /* Store(%S2) -> (%S1), (%A1, %A2) */',
565 "state" => "exc_pinned",
566 "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
567 "reg_req" => { "in" => [ "gp", "gp", "none" ] },
568 "emit" => '. strhs %S2, [%S1, #0] /* Store(%S2) -> (%S1), (%A1, %A2) */',
575 "state" => "exc_pinned",
576 "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
577 "reg_req" => { "in" => [ "gp", "gp", "none" ] },
578 "emit" => '. str %S2, [%S1, #0] /* Store(%S2) -> (%S1), (%A1, %A2) */',
582 "StoreStackM4Inc" => {
585 "state" => "exc_pinned",
586 "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
587 "reg_req" => { "in" => [ "sp", "gp", "gp", "gp", "gp", "none" ], "out" => [ "gp", "none" ] },
588 "emit" => '. stmfd %S1!, {%S2, %S3, %S4, %S5} /* Store multiple on Stack*/',
589 "outs" => [ "ptr", "M" ],
595 "state" => "exc_pinned",
596 "comment" => "construct Load: Load(ptr, mem) = LD ptr -> reg",
597 "reg_req" => { "in" => [ "sp", "none" ], "out" => [ "gp", "gp", "gp", "none" ] },
598 "emit" => '. ldmfd %S1, {%D1, %D2, %D3} /* Load multiple from Stack */',
599 "outs" => [ "res0", "res1", "res2", "M" ],
603 #---------------------------------------------------#
606 # | |_ _ __ __ _ _ __ ___ __| | ___ ___ #
607 # | _| '_ \ / _` | | '_ \ / _ \ / _` |/ _ \/ __| #
608 # | | | |_) | (_| | | | | | (_) | (_| | __/\__ \ #
609 # |_| | .__/ \__,_| |_| |_|\___/ \__,_|\___||___/ #
612 #---------------------------------------------------#
614 # commutative operations
619 "comment" => "construct FPA Add: Add(a, b) = Add(b, a) = a + b",
620 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
621 "emit" => '. adf%M %D1, %S1, %S2 /* FPA Add(%S1, %S2) -> %D1 */',
626 "comment" => "construct FPA Mul: Mul(a, b) = Mul(b, a) = a * b",
627 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
628 "emit" =>'. muf%M %D1, %S1, %S2 /* FPA Mul(%S1, %S2) -> %D1 */',
633 "comment" => "construct FPA Fast Mul: Mul(a, b) = Mul(b, a) = a * b",
634 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
635 "emit" =>'. fml%M %D1, %S1, %S2 /* FPA Fast Mul(%S1, %S2) -> %D1 */',
641 "comment" => "construct FPA Max: Max(a, b) = Max(b, a) = a > b ? a : b",
642 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
643 "emit" =>'. fmax %S1, %S2, %D1 /* FPA Max(%S1, %S2) -> %D1 */',
649 "comment" => "construct FPA Min: Min(a, b) = Min(b, a) = a < b ? a : b",
650 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
651 "emit" =>'. fmin %S1, %S2, %D1 /* FPA Min(%S1, %S2) -> %D1 */',
654 # not commutative operations
658 "comment" => "construct FPA Sub: Sub(a, b) = a - b",
659 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
660 "emit" => '. suf%M %D1, %S1, %S2 /* FPA Sub(%S1, %S2) -> %D1 */'
665 "comment" => "construct FPA reverse Sub: Sub(a, b) = b - a",
666 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
667 "emit" => '. rsf%M %D1, %S1, %S2 /* FPA reverse Sub(%S1, %S2) -> %D1 */'
671 "comment" => "construct FPA Div: Div(a, b) = a / b",
672 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
673 "emit" =>'. dvf%M %D1, %S1, %S2 /* FPA Div(%S1, %S2) -> %D1 */',
677 "comment" => "construct FPA reverse Div: Div(a, b) = b / a",
678 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
679 "emit" =>'. rdf%M %D1, %S1, %S2 /* FPA reverse Div(%S1, %S2) -> %D1 */',
683 "comment" => "construct FPA Fast Div: Div(a, b) = a / b",
684 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
685 "emit" =>'. fdv%M %D1, %S1, %S2 /* FPA Fast Div(%S1, %S2) -> %D1 */',
689 "comment" => "construct FPA Fast reverse Div: Div(a, b) = b / a",
690 "reg_req" => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
691 "emit" =>'. frd%M %D1, %S1, %S2 /* FPA Fast reverse Div(%S1, %S2) -> %D1 */',
696 "comment" => "construct FPA Move: b = a",
697 "reg_req" => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
698 "emit" => '. mvf%M %S1, %D1 /* FPA Mov %S1 -> %D1 */',
703 "comment" => "construct FPA Move Negated: b = -a",
704 "reg_req" => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
705 "emit" => '. mnf%M %S1, %D1 /* FPA Neg(%S1) -> %D1 */',
710 "comment" => "construct FPA Absolute value: fAbsd(a) = |a|",
711 "reg_req" => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
712 "emit" => '. abs%M %D1, %S1 /* FPA Abs(%S1) -> %D1 */',
720 "comment" => "represents a FPA constant",
721 "attr" => "tarval *val",
722 "init_attr" => 'attr->value = val;',
723 "reg_req" => { "out" => [ "fpa" ] },
724 "emit" => '. fmov %D1, %C /* Mov fConst into register */',
725 "cmp_attr" => 'return attr_a->value != attr_b->value;',
730 "comment" => "construct a FPA integer->float conversion",
731 "reg_req" => { "in" => ["gp"], "out" => [ "fpa" ] },
732 "emit" => '. flt%M %D1, %S1 /* convert int to fp */',
737 "comment" => "construct a FPA float->integer conversion",
738 "reg_req" => { "in" => ["fpa"], "out" => [ "gp" ] },
739 "emit" => '. fix %D1, %S1 /* convert fp to int */',
747 "state" => "exc_pinned",
748 "comment" => "construct FPA Load: Load(ptr, mem) = LD ptr",
749 "attr" => "ir_mode *op_mode",
750 "init_attr" => "attr->op_mode = op_mode;",
751 "reg_req" => { "in" => [ "gp", "none" ], "out" => [ "fpa", "none" ] },
752 "emit" => '. ldf%M %D1, [%S1, #0] /* Load((%S1)) -> %D1 */',
753 "outs" => [ "res", "M" ],
759 "state" => "exc_pinned",
760 "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
761 "attr" => "ir_mode *op_mode",
762 "init_attr" => "attr->op_mode = op_mode;",
763 "reg_req" => { "in" => [ "gp", "fpa", "none" ] },
764 "emit" => '. stf%M [%S2, #0], %S1 /* Store(%S2) -> (%S1), (%A1, %A2) */',
771 "state" => "exc_pinned",
772 "comment" => "construct fp double to 2 gp register transfer",
773 "reg_req" => { "in" => [ "fpa", "none" ], "out" => [ "gp", "gp" ] },
774 "outs" => [ "low", "high", "M" ],
778 #---------------------------------------------------#
781 # __ _| |_ _ __ _ __ ___ __| | ___ ___ #
782 # \ \ / / _| '_ \ | '_ \ / _ \ / _` |/ _ \/ __| #
783 # \ V /| | | |_) | | | | | (_) | (_| | __/\__ \ #
784 # \_/ |_| | .__/ |_| |_|\___/ \__,_|\___||___/ #
787 #---------------------------------------------------#